numam-dpdk/drivers
Ashwin Sekhar T K e587e0d5c1 common/cnxk: ensure ROC cache alignment of NPA stack size
When PLT_CACHE_LINE_SIZE is set to 64B, the memzone size reserved for
NPA stack could be a multiple of 64B. In such a case, when NDC SYNC
is initiated for the NPA LF, it could go and corrupt an additional
64B bytes as NDC flushes in multiples of ROC cache line size (128B).

So ensure that NPA stack size requested is a multiple of 128B.

Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-01-06 15:05:25 +01:00
..
baseband fix spelling in comments and strings 2022-01-11 12:16:53 +01:00
bus bus/ifpga: remove useless check while browsing devices 2022-01-19 17:52:19 +01:00
common common/cnxk: ensure ROC cache alignment of NPA stack size 2022-01-06 15:05:25 +01:00
compress fix spelling in comments and strings 2022-01-11 12:16:53 +01:00
crypto crypto/ipsec_mb: fix tainted data for session 2022-01-21 10:17:35 +01:00
dma dma/cnxk: fix installing internal headers 2022-01-27 18:11:11 +01:00
event event/cnxk: add timer adapter periodic mode support 2022-01-24 10:03:56 +01:00
gpu gpudev: add alignment for memory allocation 2022-01-21 11:33:25 +01:00
mempool drivers: remove octeontx2 drivers 2022-01-12 15:36:32 +01:00
net net/mlx5: fix MPRQ stride devargs adjustment 2021-12-05 12:22:09 +01:00
raw build: remove custom dependency checks in drivers 2022-01-21 15:40:58 +01:00
regex regex/cn9k: use cnxk infrastructure 2022-01-12 15:33:49 +01:00
vdpa build: remove custom dependency checks in drivers 2022-01-21 15:40:58 +01:00
meson.build gpudev: introduce GPU device class library 2021-11-08 17:20:52 +01:00