e9d48c0072
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
806 lines
21 KiB
C
806 lines
21 KiB
C
/*-
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* BSD LICENSE
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*
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* Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <stdint.h>
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#include <inttypes.h>
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#include <sys/types.h>
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#include <string.h>
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#include <sys/queue.h>
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#include <netinet/in.h>
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#include <setjmp.h>
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#include <stdarg.h>
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#include <ctype.h>
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#include <errno.h>
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#include <getopt.h>
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#include <rte_common.h>
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#include <rte_log.h>
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#include <rte_memory.h>
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#include <rte_memcpy.h>
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#include <rte_memzone.h>
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#include <rte_tailq.h>
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#include <rte_eal.h>
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#include <rte_per_lcore.h>
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#include <rte_launch.h>
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#include <rte_atomic.h>
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#include <rte_cycles.h>
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#include <rte_prefetch.h>
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#include <rte_lcore.h>
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#include <rte_per_lcore.h>
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#include <rte_branch_prediction.h>
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#include <rte_interrupts.h>
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#include <rte_pci.h>
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#include <rte_random.h>
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#include <rte_debug.h>
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#include <rte_ether.h>
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#include <rte_ethdev.h>
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#include <rte_ring.h>
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#include <rte_mempool.h>
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#include <rte_mbuf.h>
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#include "main.h"
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#define RTE_LOGTYPE_LSI RTE_LOGTYPE_USER1
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#define MBUF_SIZE (2048 + sizeof(struct rte_mbuf) + RTE_PKTMBUF_HEADROOM)
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#define NB_MBUF 8192
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/*
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* RX and TX Prefetch, Host, and Write-back threshold values should be
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* carefully set for optimal performance. Consult the network
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* controller's datasheet and supporting DPDK documentation for guidance
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* on how these parameters should be set.
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*/
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#define RX_PTHRESH 8 /**< Default values of RX prefetch threshold reg. */
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#define RX_HTHRESH 8 /**< Default values of RX host threshold reg. */
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#define RX_WTHRESH 4 /**< Default values of RX write-back threshold reg. */
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/*
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* These default values are optimized for use with the Intel(R) 82599 10 GbE
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* Controller and the DPDK ixgbe PMD. Consider using other values for other
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* network controllers and/or network drivers.
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*/
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#define TX_PTHRESH 36 /**< Default values of TX prefetch threshold reg. */
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#define TX_HTHRESH 0 /**< Default values of TX host threshold reg. */
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#define TX_WTHRESH 0 /**< Default values of TX write-back threshold reg. */
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#define MAX_PKT_BURST 32
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#define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */
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/*
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* Configurable number of RX/TX ring descriptors
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*/
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#define RTE_TEST_RX_DESC_DEFAULT 128
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#define RTE_TEST_TX_DESC_DEFAULT 512
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static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT;
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static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;
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/* ethernet addresses of ports */
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static struct ether_addr lsi_ports_eth_addr[RTE_MAX_ETHPORTS];
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/* mask of enabled ports */
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static uint32_t lsi_enabled_port_mask = 0;
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static unsigned int lsi_rx_queue_per_lcore = 1;
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/* destination port for L2 forwarding */
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static unsigned lsi_dst_ports[RTE_MAX_ETHPORTS] = {0};
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#define MAX_PKT_BURST 32
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struct mbuf_table {
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unsigned len;
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struct rte_mbuf *m_table[MAX_PKT_BURST];
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};
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#define MAX_RX_QUEUE_PER_LCORE 16
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#define MAX_TX_QUEUE_PER_PORT 16
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struct lcore_queue_conf {
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unsigned n_rx_port;
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unsigned rx_port_list[MAX_RX_QUEUE_PER_LCORE];
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unsigned tx_queue_id;
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struct mbuf_table tx_mbufs[RTE_MAX_ETHPORTS];
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} __rte_cache_aligned;
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struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE];
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static const struct rte_eth_conf port_conf = {
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.rxmode = {
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.split_hdr_size = 0,
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.header_split = 0, /**< Header Split disabled */
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.hw_ip_checksum = 0, /**< IP checksum offload disabled */
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.hw_vlan_filter = 0, /**< VLAN filtering disabled */
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.jumbo_frame = 0, /**< Jumbo Frame Support disabled */
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.hw_strip_crc = 0, /**< CRC stripped by hardware */
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},
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.txmode = {
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.mq_mode = ETH_MQ_TX_NONE,
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},
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.intr_conf = {
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.lsc = 1, /**< lsc interrupt feature enabled */
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},
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};
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static const struct rte_eth_rxconf rx_conf = {
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.rx_thresh = {
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.pthresh = RX_PTHRESH,
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.hthresh = RX_HTHRESH,
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.wthresh = RX_WTHRESH,
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},
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};
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static const struct rte_eth_txconf tx_conf = {
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.tx_thresh = {
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.pthresh = TX_PTHRESH,
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.hthresh = TX_HTHRESH,
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.wthresh = TX_WTHRESH,
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},
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.tx_free_thresh = 0, /* Use PMD default values */
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.tx_rs_thresh = 0, /* Use PMD default values */
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};
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struct rte_mempool * lsi_pktmbuf_pool = NULL;
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/* Per-port statistics struct */
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struct lsi_port_statistics {
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uint64_t tx;
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uint64_t rx;
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uint64_t dropped;
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} __rte_cache_aligned;
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struct lsi_port_statistics port_statistics[RTE_MAX_ETHPORTS];
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/* A tsc-based timer responsible for triggering statistics printout */
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#define TIMER_MILLISECOND 2000000ULL /* around 1ms at 2 Ghz */
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#define MAX_TIMER_PERIOD 86400 /* 1 day max */
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static int64_t timer_period = 10 * TIMER_MILLISECOND * 1000; /* default period is 10 seconds */
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/* Print out statistics on packets dropped */
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static void
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print_stats(void)
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{
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struct rte_eth_link link;
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uint64_t total_packets_dropped, total_packets_tx, total_packets_rx;
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unsigned portid;
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total_packets_dropped = 0;
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total_packets_tx = 0;
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total_packets_rx = 0;
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const char clr[] = { 27, '[', '2', 'J', '\0' };
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const char topLeft[] = { 27, '[', '1', ';', '1', 'H','\0' };
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/* Clear screen and move to top left */
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printf("%s%s", clr, topLeft);
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printf("\nPort statistics ====================================");
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for (portid = 0; portid < RTE_MAX_ETHPORTS; portid++) {
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/* skip ports that are not enabled */
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if ((lsi_enabled_port_mask & (1 << portid)) == 0)
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continue;
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memset(&link, 0, sizeof(link));
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rte_eth_link_get_nowait((uint8_t)portid, &link);
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printf("\nStatistics for port %u ------------------------------"
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"\nLink status: %25s"
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"\nLink speed: %26u"
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"\nLink duplex: %25s"
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"\nPackets sent: %24"PRIu64
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"\nPackets received: %20"PRIu64
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"\nPackets dropped: %21"PRIu64,
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portid,
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(link.link_status ? "Link up" : "Link down"),
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(unsigned)link.link_speed,
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(link.link_duplex == ETH_LINK_FULL_DUPLEX ? \
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"full-duplex" : "half-duplex"),
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port_statistics[portid].tx,
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port_statistics[portid].rx,
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port_statistics[portid].dropped);
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total_packets_dropped += port_statistics[portid].dropped;
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total_packets_tx += port_statistics[portid].tx;
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total_packets_rx += port_statistics[portid].rx;
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}
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printf("\nAggregate statistics ==============================="
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"\nTotal packets sent: %18"PRIu64
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"\nTotal packets received: %14"PRIu64
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"\nTotal packets dropped: %15"PRIu64,
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total_packets_tx,
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total_packets_rx,
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total_packets_dropped);
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printf("\n====================================================\n");
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}
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/* Send the packet on an output interface */
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static int
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lsi_send_burst(struct lcore_queue_conf *qconf, unsigned n, uint8_t port)
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{
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struct rte_mbuf **m_table;
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unsigned ret;
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unsigned queueid;
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queueid = (uint16_t) qconf->tx_queue_id;
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m_table = (struct rte_mbuf **)qconf->tx_mbufs[port].m_table;
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ret = rte_eth_tx_burst(port, (uint16_t) queueid, m_table, (uint16_t) n);
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port_statistics[port].tx += ret;
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if (unlikely(ret < n)) {
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port_statistics[port].dropped += (n - ret);
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do {
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rte_pktmbuf_free(m_table[ret]);
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} while (++ret < n);
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}
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return 0;
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}
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/* Send the packet on an output interface */
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static int
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lsi_send_packet(struct rte_mbuf *m, uint8_t port)
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{
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unsigned lcore_id, len;
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struct lcore_queue_conf *qconf;
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lcore_id = rte_lcore_id();
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qconf = &lcore_queue_conf[lcore_id];
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len = qconf->tx_mbufs[port].len;
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qconf->tx_mbufs[port].m_table[len] = m;
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len++;
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/* enough pkts to be sent */
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if (unlikely(len == MAX_PKT_BURST)) {
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lsi_send_burst(qconf, MAX_PKT_BURST, port);
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len = 0;
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}
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qconf->tx_mbufs[port].len = len;
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return 0;
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}
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static void
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lsi_simple_forward(struct rte_mbuf *m, unsigned portid)
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{
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struct ether_hdr *eth;
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void *tmp;
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unsigned dst_port = lsi_dst_ports[portid];
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eth = rte_pktmbuf_mtod(m, struct ether_hdr *);
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/* 02:00:00:00:00:xx */
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tmp = ð->d_addr.addr_bytes[0];
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*((uint64_t *)tmp) = 0x000000000002 + ((uint64_t)dst_port << 40);
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/* src addr */
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ether_addr_copy(&lsi_ports_eth_addr[dst_port], ð->s_addr);
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lsi_send_packet(m, (uint8_t) dst_port);
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}
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/* main processing loop */
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static void
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lsi_main_loop(void)
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{
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struct rte_mbuf *pkts_burst[MAX_PKT_BURST];
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struct rte_mbuf *m;
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unsigned lcore_id;
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uint64_t prev_tsc, diff_tsc, cur_tsc, timer_tsc;
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unsigned i, j, portid, nb_rx;
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struct lcore_queue_conf *qconf;
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const uint64_t drain_tsc = (rte_get_tsc_hz() + US_PER_S - 1) / US_PER_S * BURST_TX_DRAIN_US;
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prev_tsc = 0;
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timer_tsc = 0;
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lcore_id = rte_lcore_id();
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qconf = &lcore_queue_conf[lcore_id];
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if (qconf->n_rx_port == 0) {
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RTE_LOG(INFO, LSI, "lcore %u has nothing to do\n", lcore_id);
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return;
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}
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RTE_LOG(INFO, LSI, "entering main loop on lcore %u\n", lcore_id);
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for (i = 0; i < qconf->n_rx_port; i++) {
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portid = qconf->rx_port_list[i];
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RTE_LOG(INFO, LSI, " -- lcoreid=%u portid=%u\n", lcore_id,
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portid);
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}
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while (1) {
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cur_tsc = rte_rdtsc();
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/*
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* TX burst queue drain
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*/
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diff_tsc = cur_tsc - prev_tsc;
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if (unlikely(diff_tsc > drain_tsc)) {
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/* this could be optimized (use queueid instead of
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* portid), but it is not called so often */
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for (portid = 0; portid < RTE_MAX_ETHPORTS; portid++) {
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if (qconf->tx_mbufs[portid].len == 0)
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continue;
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lsi_send_burst(&lcore_queue_conf[lcore_id],
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qconf->tx_mbufs[portid].len,
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(uint8_t) portid);
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qconf->tx_mbufs[portid].len = 0;
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}
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/* if timer is enabled */
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if (timer_period > 0) {
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/* advance the timer */
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timer_tsc += diff_tsc;
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/* if timer has reached its timeout */
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if (unlikely(timer_tsc >= (uint64_t) timer_period)) {
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/* do this only on master core */
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if (lcore_id == rte_get_master_lcore()) {
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print_stats();
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/* reset the timer */
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timer_tsc = 0;
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}
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}
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}
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prev_tsc = cur_tsc;
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}
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/*
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* Read packet from RX queues
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*/
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for (i = 0; i < qconf->n_rx_port; i++) {
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portid = qconf->rx_port_list[i];
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nb_rx = rte_eth_rx_burst((uint8_t) portid, 0,
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pkts_burst, MAX_PKT_BURST);
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port_statistics[portid].rx += nb_rx;
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for (j = 0; j < nb_rx; j++) {
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m = pkts_burst[j];
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rte_prefetch0(rte_pktmbuf_mtod(m, void *));
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lsi_simple_forward(m, portid);
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}
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}
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}
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}
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static int
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lsi_launch_one_lcore(__attribute__((unused)) void *dummy)
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{
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lsi_main_loop();
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return 0;
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}
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/* display usage */
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static void
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lsi_usage(const char *prgname)
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{
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printf("%s [EAL options] -- -p PORTMASK [-q NQ]\n"
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" -p PORTMASK: hexadecimal bitmask of ports to configure\n"
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" -q NQ: number of queue (=ports) per lcore (default is 1)\n"
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" -T PERIOD: statistics will be refreshed each PERIOD seconds (0 to disable, 10 default, 86400 maximum)\n",
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prgname);
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}
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static int
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lsi_parse_portmask(const char *portmask)
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{
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char *end = NULL;
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unsigned long pm;
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/* parse hexadecimal string */
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pm = strtoul(portmask, &end, 16);
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if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0'))
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return -1;
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if (pm == 0)
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return -1;
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return pm;
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}
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static unsigned int
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lsi_parse_nqueue(const char *q_arg)
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{
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char *end = NULL;
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unsigned long n;
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/* parse hexadecimal string */
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n = strtoul(q_arg, &end, 10);
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if ((q_arg[0] == '\0') || (end == NULL) || (*end != '\0'))
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return 0;
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if (n == 0)
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return 0;
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if (n >= MAX_RX_QUEUE_PER_LCORE)
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return 0;
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return n;
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}
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static int
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lsi_parse_timer_period(const char *q_arg)
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{
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char *end = NULL;
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int n;
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/* parse number string */
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n = strtol(q_arg, &end, 10);
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if ((q_arg[0] == '\0') || (end == NULL) || (*end != '\0'))
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return -1;
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if (n >= MAX_TIMER_PERIOD)
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return -1;
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return n;
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}
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/* Parse the argument given in the command line of the application */
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static int
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lsi_parse_args(int argc, char **argv)
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{
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int opt, ret;
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char **argvopt;
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int option_index;
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char *prgname = argv[0];
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static struct option lgopts[] = {
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{NULL, 0, 0, 0}
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};
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argvopt = argv;
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while ((opt = getopt_long(argc, argvopt, "p:q:T:",
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lgopts, &option_index)) != EOF) {
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switch (opt) {
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/* portmask */
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case 'p':
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lsi_enabled_port_mask = lsi_parse_portmask(optarg);
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if (lsi_enabled_port_mask == 0) {
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printf("invalid portmask\n");
|
|
lsi_usage(prgname);
|
|
return -1;
|
|
}
|
|
break;
|
|
|
|
/* nqueue */
|
|
case 'q':
|
|
lsi_rx_queue_per_lcore = lsi_parse_nqueue(optarg);
|
|
if (lsi_rx_queue_per_lcore == 0) {
|
|
printf("invalid queue number\n");
|
|
lsi_usage(prgname);
|
|
return -1;
|
|
}
|
|
break;
|
|
|
|
/* timer period */
|
|
case 'T':
|
|
timer_period = lsi_parse_timer_period(optarg) * 1000 * TIMER_MILLISECOND;
|
|
if (timer_period < 0) {
|
|
printf("invalid timer period\n");
|
|
lsi_usage(prgname);
|
|
return -1;
|
|
}
|
|
break;
|
|
|
|
/* long options */
|
|
case 0:
|
|
lsi_usage(prgname);
|
|
return -1;
|
|
|
|
default:
|
|
lsi_usage(prgname);
|
|
return -1;
|
|
}
|
|
}
|
|
|
|
if (optind >= 0)
|
|
argv[optind-1] = prgname;
|
|
|
|
ret = optind-1;
|
|
optind = 0; /* reset getopt lib */
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* It will be called as the callback for specified port after a LSI interrupt
|
|
* has been fully handled. This callback needs to be implemented carefully as
|
|
* it will be called in the interrupt host thread which is different from the
|
|
* application main thread.
|
|
*
|
|
* @param port_id
|
|
* Port id.
|
|
* @param type
|
|
* event type.
|
|
* @param param
|
|
* Pointer to(address of) the parameters.
|
|
*
|
|
* @return
|
|
* void.
|
|
*/
|
|
static void
|
|
lsi_event_callback(uint8_t port_id, enum rte_eth_event_type type, void *param)
|
|
{
|
|
struct rte_eth_link link;
|
|
|
|
RTE_SET_USED(param);
|
|
|
|
printf("\n\nIn registered callback...\n");
|
|
printf("Event type: %s\n", type == RTE_ETH_EVENT_INTR_LSC ? "LSC interrupt" : "unknown event");
|
|
rte_eth_link_get_nowait(port_id, &link);
|
|
if (link.link_status) {
|
|
printf("Port %d Link Up - speed %u Mbps - %s\n\n",
|
|
port_id, (unsigned)link.link_speed,
|
|
(link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
|
|
("full-duplex") : ("half-duplex"));
|
|
} else
|
|
printf("Port %d Link Down\n\n", port_id);
|
|
}
|
|
|
|
/* Check the link status of all ports in up to 9s, and print them finally */
|
|
static void
|
|
check_all_ports_link_status(uint8_t port_num, uint32_t port_mask)
|
|
{
|
|
#define CHECK_INTERVAL 100 /* 100ms */
|
|
#define MAX_CHECK_TIME 90 /* 9s (90 * 100ms) in total */
|
|
uint8_t portid, count, all_ports_up, print_flag = 0;
|
|
struct rte_eth_link link;
|
|
|
|
printf("\nChecking link status");
|
|
fflush(stdout);
|
|
for (count = 0; count <= MAX_CHECK_TIME; count++) {
|
|
all_ports_up = 1;
|
|
for (portid = 0; portid < port_num; portid++) {
|
|
if ((port_mask & (1 << portid)) == 0)
|
|
continue;
|
|
memset(&link, 0, sizeof(link));
|
|
rte_eth_link_get_nowait(portid, &link);
|
|
/* print link status if flag set */
|
|
if (print_flag == 1) {
|
|
if (link.link_status)
|
|
printf("Port %d Link Up - speed %u "
|
|
"Mbps - %s\n", (uint8_t)portid,
|
|
(unsigned)link.link_speed,
|
|
(link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
|
|
("full-duplex") : ("half-duplex\n"));
|
|
else
|
|
printf("Port %d Link Down\n",
|
|
(uint8_t)portid);
|
|
continue;
|
|
}
|
|
/* clear all_ports_up flag if any link down */
|
|
if (link.link_status == 0) {
|
|
all_ports_up = 0;
|
|
break;
|
|
}
|
|
}
|
|
/* after finally printing all link status, get out */
|
|
if (print_flag == 1)
|
|
break;
|
|
|
|
if (all_ports_up == 0) {
|
|
printf(".");
|
|
fflush(stdout);
|
|
rte_delay_ms(CHECK_INTERVAL);
|
|
}
|
|
|
|
/* set the print_flag if all ports up or timeout */
|
|
if (all_ports_up == 1 || count == (MAX_CHECK_TIME - 1)) {
|
|
print_flag = 1;
|
|
printf("done\n");
|
|
}
|
|
}
|
|
}
|
|
|
|
int
|
|
MAIN(int argc, char **argv)
|
|
{
|
|
struct lcore_queue_conf *qconf;
|
|
struct rte_eth_dev_info dev_info;
|
|
int ret;
|
|
uint8_t nb_ports;
|
|
uint8_t portid, portid_last = 0;
|
|
unsigned lcore_id, rx_lcore_id;
|
|
unsigned nb_ports_in_mask = 0;
|
|
|
|
/* init EAL */
|
|
ret = rte_eal_init(argc, argv);
|
|
if (ret < 0)
|
|
rte_exit(EXIT_FAILURE, "rte_eal_init failed");
|
|
argc -= ret;
|
|
argv += ret;
|
|
|
|
/* parse application arguments (after the EAL ones) */
|
|
ret = lsi_parse_args(argc, argv);
|
|
if (ret < 0)
|
|
rte_exit(EXIT_FAILURE, "Invalid arguments");
|
|
|
|
/* create the mbuf pool */
|
|
lsi_pktmbuf_pool =
|
|
rte_mempool_create("mbuf_pool", NB_MBUF,
|
|
MBUF_SIZE, 32,
|
|
sizeof(struct rte_pktmbuf_pool_private),
|
|
rte_pktmbuf_pool_init, NULL,
|
|
rte_pktmbuf_init, NULL,
|
|
rte_socket_id(), 0);
|
|
if (lsi_pktmbuf_pool == NULL)
|
|
rte_panic("Cannot init mbuf pool\n");
|
|
|
|
/* init driver(s) */
|
|
if (rte_pmd_init_all() < 0)
|
|
rte_panic("Cannot init pmd\n");
|
|
|
|
if (rte_eal_pci_probe() < 0)
|
|
rte_panic("Cannot probe PCI\n");
|
|
|
|
nb_ports = rte_eth_dev_count();
|
|
if (nb_ports == 0)
|
|
rte_panic("No Ethernet port - bye\n");
|
|
|
|
if (nb_ports > RTE_MAX_ETHPORTS)
|
|
nb_ports = RTE_MAX_ETHPORTS;
|
|
|
|
/*
|
|
* Each logical core is assigned a dedicated TX queue on each port.
|
|
*/
|
|
for (portid = 0; portid < nb_ports; portid++) {
|
|
/* skip ports that are not enabled */
|
|
if ((lsi_enabled_port_mask & (1 << portid)) == 0)
|
|
continue;
|
|
|
|
/* save the destination port id */
|
|
if (nb_ports_in_mask % 2) {
|
|
lsi_dst_ports[portid] = portid_last;
|
|
lsi_dst_ports[portid_last] = portid;
|
|
}
|
|
else
|
|
portid_last = portid;
|
|
|
|
nb_ports_in_mask++;
|
|
|
|
rte_eth_dev_info_get(portid, &dev_info);
|
|
}
|
|
if (nb_ports_in_mask < 2 || nb_ports_in_mask % 2)
|
|
rte_exit(EXIT_FAILURE, "Current enabled port number is %u, "
|
|
"but it should be even and at least 2\n",
|
|
nb_ports_in_mask);
|
|
|
|
rx_lcore_id = 0;
|
|
qconf = &lcore_queue_conf[rx_lcore_id];
|
|
|
|
/* Initialize the port/queue configuration of each logical core */
|
|
for (portid = 0; portid < nb_ports; portid++) {
|
|
/* skip ports that are not enabled */
|
|
if ((lsi_enabled_port_mask & (1 << portid)) == 0)
|
|
continue;
|
|
|
|
/* get the lcore_id for this port */
|
|
while (rte_lcore_is_enabled(rx_lcore_id) == 0 ||
|
|
lcore_queue_conf[rx_lcore_id].n_rx_port ==
|
|
lsi_rx_queue_per_lcore) {
|
|
|
|
rx_lcore_id++;
|
|
if (rx_lcore_id >= RTE_MAX_LCORE)
|
|
rte_exit(EXIT_FAILURE, "Not enough cores\n");
|
|
}
|
|
if (qconf != &lcore_queue_conf[rx_lcore_id])
|
|
/* Assigned a new logical core in the loop above. */
|
|
qconf = &lcore_queue_conf[rx_lcore_id];
|
|
|
|
qconf->rx_port_list[qconf->n_rx_port] = portid;
|
|
qconf->n_rx_port++;
|
|
printf("Lcore %u: RX port %u\n",rx_lcore_id, (unsigned) portid);
|
|
}
|
|
|
|
/* Initialise each port */
|
|
for (portid = 0; portid < nb_ports; portid++) {
|
|
/* skip ports that are not enabled */
|
|
if ((lsi_enabled_port_mask & (1 << portid)) == 0) {
|
|
printf("Skipping disabled port %u\n", (unsigned) portid);
|
|
continue;
|
|
}
|
|
/* init port */
|
|
printf("Initializing port %u... ", (unsigned) portid);
|
|
fflush(stdout);
|
|
ret = rte_eth_dev_configure(portid, 1, 1, &port_conf);
|
|
if (ret < 0)
|
|
rte_exit(EXIT_FAILURE, "Cannot configure device: err=%d, port=%u\n",
|
|
ret, (unsigned) portid);
|
|
|
|
/* register lsi interrupt callback, need to be after
|
|
* rte_eth_dev_configure(). if (intr_conf.lsc == 0), no
|
|
* lsc interrupt will be present, and below callback to
|
|
* be registered will never be called.
|
|
*/
|
|
rte_eth_dev_callback_register(portid,
|
|
RTE_ETH_EVENT_INTR_LSC, lsi_event_callback, NULL);
|
|
|
|
rte_eth_macaddr_get(portid,
|
|
&lsi_ports_eth_addr[portid]);
|
|
|
|
/* init one RX queue */
|
|
fflush(stdout);
|
|
ret = rte_eth_rx_queue_setup(portid, 0, nb_rxd,
|
|
rte_eth_dev_socket_id(portid), &rx_conf,
|
|
lsi_pktmbuf_pool);
|
|
if (ret < 0)
|
|
rte_exit(EXIT_FAILURE, "rte_eth_rx_queue_setup: err=%d, port=%u\n",
|
|
ret, (unsigned) portid);
|
|
|
|
/* init one TX queue logical core on each port */
|
|
fflush(stdout);
|
|
ret = rte_eth_tx_queue_setup(portid, 0, nb_txd,
|
|
rte_eth_dev_socket_id(portid), &tx_conf);
|
|
if (ret < 0)
|
|
rte_exit(EXIT_FAILURE, "rte_eth_tx_queue_setup: err=%d,port=%u\n",
|
|
ret, (unsigned) portid);
|
|
|
|
/* Start device */
|
|
ret = rte_eth_dev_start(portid);
|
|
if (ret < 0)
|
|
rte_exit(EXIT_FAILURE, "rte_eth_dev_start: err=%d, port=%u\n",
|
|
ret, (unsigned) portid);
|
|
printf("done:\n");
|
|
|
|
printf("Port %u, MAC address: %02X:%02X:%02X:%02X:%02X:%02X\n\n",
|
|
(unsigned) portid,
|
|
lsi_ports_eth_addr[portid].addr_bytes[0],
|
|
lsi_ports_eth_addr[portid].addr_bytes[1],
|
|
lsi_ports_eth_addr[portid].addr_bytes[2],
|
|
lsi_ports_eth_addr[portid].addr_bytes[3],
|
|
lsi_ports_eth_addr[portid].addr_bytes[4],
|
|
lsi_ports_eth_addr[portid].addr_bytes[5]);
|
|
|
|
/* initialize port stats */
|
|
memset(&port_statistics, 0, sizeof(port_statistics));
|
|
}
|
|
|
|
check_all_ports_link_status(nb_ports, lsi_enabled_port_mask);
|
|
|
|
/* launch per-lcore init on every lcore */
|
|
rte_eal_mp_remote_launch(lsi_launch_one_lcore, NULL, CALL_MASTER);
|
|
RTE_LCORE_FOREACH_SLAVE(lcore_id) {
|
|
if (rte_eal_wait_lcore(lcore_id) < 0)
|
|
return -1;
|
|
}
|
|
|
|
return 0;
|
|
}
|