fea1d908d3
Fixed several typos and spelling errors in guide docs. Signed-off-by: John McNamara <john.mcnamara@intel.com>
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3.9 KiB
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103 lines
3.9 KiB
ReStructuredText
.. BSD LICENSE
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Copyright(c) 2015 Intel Corporation. All rights reserved.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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* Neither the name of Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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Packet Ordering Application
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============================
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The Packet Ordering sample app simply shows the impact of reordering a stream.
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It's meant to stress the library with different configurations for performance.
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Overview
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--------
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The application uses at least three CPU cores:
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* RX core (maser core) receives traffic from the NIC ports and feeds Worker
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cores with traffic through SW queues.
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* Worker core (slave core) basically do some light work on the packet.
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Currently it modifies the output port of the packet for configurations with
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more than one port enabled.
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* TX Core (slave core) receives traffic from Worker cores through software queues,
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inserts out-of-order packets into reorder buffer, extracts ordered packets
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from the reorder buffer and sends them to the NIC ports for transmission.
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Compiling the Application
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--------------------------
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#. Go to the example directory:
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.. code-block:: console
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export RTE_SDK=/path/to/rte_sdk
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cd ${RTE_SDK}/examples/helloworld
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#. Set the target (a default target is used if not specified). For example:
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.. code-block:: console
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export RTE_TARGET=x86_64-native-linuxapp-gcc
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See the *DPDK Getting Started* Guide for possible RTE_TARGET values.
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#. Build the application:
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.. code-block:: console
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make
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Running the Application
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-----------------------
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Refer to *DPDK Getting Started Guide* for general information on running applications
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and the Environment Abstraction Layer (EAL) options.
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Application Command Line
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~~~~~~~~~~~~~~~~~~~~~~~~
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The application execution command line is:
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.. code-block:: console
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./test-pipeline [EAL options] -- -p PORTMASK [--disable-reorder]
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The -c EAL CPU_COREMASK option has to contain at least 3 CPU cores.
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The first CPU core in the core mask is the master core and would be assigned to
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RX core, the last to TX core and the rest to Worker cores.
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The PORTMASK parameter must contain either 1 or even enabled port numbers.
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When setting more than 1 port, traffic would be forwarded in pairs.
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For example, if we enable 4 ports, traffic from port 0 to 1 and from 1 to 0,
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then the other pair from 2 to 3 and from 3 to 2, having [0,1] and [2,3] pairs.
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The disable-reorder long option does, as its name implies, disable the reordering
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of traffic, which should help evaluate reordering performance impact.
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