a0147be547
Xilinx acquired Solarflare in 2019. Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com> Acked-by: James Fox <jamesfox@xilinx.com>
623 lines
16 KiB
C
623 lines
16 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright(c) 2019-2020 Xilinx, Inc.
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* Copyright(c) 2016-2019 Solarflare Communications Inc.
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*
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* This software was jointly developed between OKTET Labs (under contract
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* for Solarflare) and Solarflare Communications, Inc.
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*/
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#include "efx.h"
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#include "sfc.h"
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#include "sfc_log.h"
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#include "sfc_kvargs.h"
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/** Default MAC statistics update period is 1 second */
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#define SFC_MAC_STATS_UPDATE_PERIOD_MS_DEF MS_PER_S
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/** The number of microseconds to sleep on attempt to get statistics update */
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#define SFC_MAC_STATS_UPDATE_RETRY_INTERVAL_US 10
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/** The number of attempts to await arrival of freshly generated statistics */
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#define SFC_MAC_STATS_UPDATE_NB_ATTEMPTS 50
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/**
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* Update MAC statistics in the buffer.
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*
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* @param sa Adapter
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*
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* @return Status code
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* @retval 0 Success
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* @retval EAGAIN Try again
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* @retval ENOMEM Memory allocation failure
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*/
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int
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sfc_port_update_mac_stats(struct sfc_adapter *sa)
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{
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struct sfc_port *port = &sa->port;
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efsys_mem_t *esmp = &port->mac_stats_dma_mem;
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uint32_t *genp = NULL;
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uint32_t gen_old;
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unsigned int nb_attempts = 0;
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int rc;
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SFC_ASSERT(rte_spinlock_is_locked(&port->mac_stats_lock));
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if (sa->state != SFC_ADAPTER_STARTED)
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return EINVAL;
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/*
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* If periodic statistics DMA'ing is off or if not supported,
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* make a manual request and keep an eye on timer if need be
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*/
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if (!port->mac_stats_periodic_dma_supported ||
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(port->mac_stats_update_period_ms == 0)) {
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if (port->mac_stats_update_period_ms != 0) {
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uint64_t timestamp = sfc_get_system_msecs();
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if ((timestamp -
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port->mac_stats_last_request_timestamp) <
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port->mac_stats_update_period_ms)
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return 0;
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port->mac_stats_last_request_timestamp = timestamp;
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}
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rc = efx_mac_stats_upload(sa->nic, esmp);
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if (rc != 0)
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return rc;
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genp = &port->mac_stats_update_generation;
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gen_old = *genp;
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}
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do {
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if (nb_attempts > 0)
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rte_delay_us(SFC_MAC_STATS_UPDATE_RETRY_INTERVAL_US);
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rc = efx_mac_stats_update(sa->nic, esmp,
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port->mac_stats_buf, genp);
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if (rc != 0)
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return rc;
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} while ((genp != NULL) && (*genp == gen_old) &&
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(++nb_attempts < SFC_MAC_STATS_UPDATE_NB_ATTEMPTS));
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return 0;
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}
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static void
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sfc_port_reset_sw_stats(struct sfc_adapter *sa)
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{
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struct sfc_port *port = &sa->port;
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/*
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* Reset diff stats explicitly since check which does not allow
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* the statistics to grow backward could deny it.
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*/
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port->ipackets = 0;
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}
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int
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sfc_port_reset_mac_stats(struct sfc_adapter *sa)
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{
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struct sfc_port *port = &sa->port;
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int rc;
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rte_spinlock_lock(&port->mac_stats_lock);
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rc = efx_mac_stats_clear(sa->nic);
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if (rc == 0)
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sfc_port_reset_sw_stats(sa);
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rte_spinlock_unlock(&port->mac_stats_lock);
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return rc;
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}
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static int
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sfc_port_init_dev_link(struct sfc_adapter *sa)
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{
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struct rte_eth_link *dev_link = &sa->eth_dev->data->dev_link;
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int rc;
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efx_link_mode_t link_mode;
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struct rte_eth_link current_link;
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rc = efx_port_poll(sa->nic, &link_mode);
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if (rc != 0)
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return rc;
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sfc_port_link_mode_to_info(link_mode, ¤t_link);
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EFX_STATIC_ASSERT(sizeof(*dev_link) == sizeof(rte_atomic64_t));
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rte_atomic64_set((rte_atomic64_t *)dev_link,
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*(uint64_t *)¤t_link);
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return 0;
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}
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#if EFSYS_OPT_LOOPBACK
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static efx_link_mode_t
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sfc_port_phy_caps_to_max_link_speed(uint32_t phy_caps)
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{
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if (phy_caps & (1u << EFX_PHY_CAP_100000FDX))
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return EFX_LINK_100000FDX;
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if (phy_caps & (1u << EFX_PHY_CAP_50000FDX))
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return EFX_LINK_50000FDX;
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if (phy_caps & (1u << EFX_PHY_CAP_40000FDX))
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return EFX_LINK_40000FDX;
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if (phy_caps & (1u << EFX_PHY_CAP_25000FDX))
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return EFX_LINK_25000FDX;
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if (phy_caps & (1u << EFX_PHY_CAP_10000FDX))
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return EFX_LINK_10000FDX;
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if (phy_caps & (1u << EFX_PHY_CAP_1000FDX))
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return EFX_LINK_1000FDX;
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return EFX_LINK_UNKNOWN;
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}
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#endif
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int
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sfc_port_start(struct sfc_adapter *sa)
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{
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struct sfc_port *port = &sa->port;
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int rc;
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uint32_t phy_adv_cap;
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const uint32_t phy_pause_caps =
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((1u << EFX_PHY_CAP_PAUSE) | (1u << EFX_PHY_CAP_ASYM));
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unsigned int i;
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sfc_log_init(sa, "entry");
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sfc_log_init(sa, "init filters");
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rc = efx_filter_init(sa->nic);
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if (rc != 0)
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goto fail_filter_init;
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sfc_log_init(sa, "init port");
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rc = efx_port_init(sa->nic);
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if (rc != 0)
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goto fail_port_init;
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#if EFSYS_OPT_LOOPBACK
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if (sa->eth_dev->data->dev_conf.lpbk_mode != 0) {
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efx_link_mode_t link_mode;
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link_mode =
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sfc_port_phy_caps_to_max_link_speed(port->phy_adv_cap);
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sfc_log_init(sa, "set loopback link_mode=%u type=%u", link_mode,
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sa->eth_dev->data->dev_conf.lpbk_mode);
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rc = efx_port_loopback_set(sa->nic, link_mode,
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sa->eth_dev->data->dev_conf.lpbk_mode);
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if (rc != 0)
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goto fail_loopback_set;
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}
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#endif
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sfc_log_init(sa, "set flow control to %#x autoneg=%u",
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port->flow_ctrl, port->flow_ctrl_autoneg);
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rc = efx_mac_fcntl_set(sa->nic, port->flow_ctrl,
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port->flow_ctrl_autoneg);
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if (rc != 0)
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goto fail_mac_fcntl_set;
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/* Preserve pause capabilities set by above efx_mac_fcntl_set() */
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efx_phy_adv_cap_get(sa->nic, EFX_PHY_CAP_CURRENT, &phy_adv_cap);
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SFC_ASSERT((port->phy_adv_cap & phy_pause_caps) == 0);
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phy_adv_cap = port->phy_adv_cap | (phy_adv_cap & phy_pause_caps);
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/*
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* No controls for FEC yet. Use default FEC mode.
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* I.e. advertise everything supported (*_FEC=1), but do not request
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* anything explicitly (*_FEC_REQUESTED=0).
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*/
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phy_adv_cap |= port->phy_adv_cap_mask &
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(1u << EFX_PHY_CAP_BASER_FEC |
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1u << EFX_PHY_CAP_RS_FEC |
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1u << EFX_PHY_CAP_25G_BASER_FEC);
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sfc_log_init(sa, "set phy adv caps to %#x", phy_adv_cap);
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rc = efx_phy_adv_cap_set(sa->nic, phy_adv_cap);
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if (rc != 0)
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goto fail_phy_adv_cap_set;
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sfc_log_init(sa, "set MAC PDU %u", (unsigned int)port->pdu);
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rc = efx_mac_pdu_set(sa->nic, port->pdu);
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if (rc != 0)
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goto fail_mac_pdu_set;
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if (!sfc_sa2shared(sa)->isolated) {
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struct rte_ether_addr *addr = &port->default_mac_addr;
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sfc_log_init(sa, "set MAC address");
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rc = efx_mac_addr_set(sa->nic, addr->addr_bytes);
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if (rc != 0)
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goto fail_mac_addr_set;
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sfc_log_init(sa, "set MAC filters");
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port->promisc = (sa->eth_dev->data->promiscuous != 0) ?
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B_TRUE : B_FALSE;
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port->allmulti = (sa->eth_dev->data->all_multicast != 0) ?
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B_TRUE : B_FALSE;
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rc = sfc_set_rx_mode_unchecked(sa);
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if (rc != 0)
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goto fail_mac_filter_set;
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sfc_log_init(sa, "set multicast address list");
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rc = efx_mac_multicast_list_set(sa->nic, port->mcast_addrs,
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port->nb_mcast_addrs);
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if (rc != 0)
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goto fail_mcast_address_list_set;
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}
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if (port->mac_stats_reset_pending) {
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rc = sfc_port_reset_mac_stats(sa);
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if (rc != 0)
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sfc_err(sa, "statistics reset failed (requested "
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"before the port was started)");
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port->mac_stats_reset_pending = B_FALSE;
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}
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efx_mac_stats_get_mask(sa->nic, port->mac_stats_mask,
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sizeof(port->mac_stats_mask));
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for (i = 0, port->mac_stats_nb_supported = 0; i < EFX_MAC_NSTATS; ++i)
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if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i))
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port->mac_stats_nb_supported++;
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port->mac_stats_update_generation = 0;
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if (port->mac_stats_update_period_ms != 0) {
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/*
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* Update MAC stats using periodic DMA;
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* any positive update interval different from
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* 1000 ms can be set only on SFN8xxx provided
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* that FW version is 6.2.1.1033 or higher
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*/
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sfc_log_init(sa, "request MAC stats DMA'ing");
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rc = efx_mac_stats_periodic(sa->nic, &port->mac_stats_dma_mem,
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port->mac_stats_update_period_ms,
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B_FALSE);
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if (rc == 0) {
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port->mac_stats_periodic_dma_supported = B_TRUE;
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} else if (rc == EOPNOTSUPP) {
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port->mac_stats_periodic_dma_supported = B_FALSE;
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port->mac_stats_last_request_timestamp = 0;
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} else {
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goto fail_mac_stats_periodic;
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}
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}
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if ((port->mac_stats_update_period_ms != 0) &&
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port->mac_stats_periodic_dma_supported) {
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/*
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* Request an explicit MAC stats upload immediately to
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* preclude bogus figures readback if the user decides
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* to read stats before periodic DMA is really started
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*/
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rc = efx_mac_stats_upload(sa->nic, &port->mac_stats_dma_mem);
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if (rc != 0)
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goto fail_mac_stats_upload;
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}
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sfc_log_init(sa, "disable MAC drain");
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rc = efx_mac_drain(sa->nic, B_FALSE);
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if (rc != 0)
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goto fail_mac_drain;
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/* Synchronize link status knowledge */
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rc = sfc_port_init_dev_link(sa);
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if (rc != 0)
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goto fail_port_init_dev_link;
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sfc_log_init(sa, "done");
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return 0;
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fail_port_init_dev_link:
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(void)efx_mac_drain(sa->nic, B_TRUE);
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fail_mac_drain:
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fail_mac_stats_upload:
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(void)efx_mac_stats_periodic(sa->nic, &port->mac_stats_dma_mem,
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0, B_FALSE);
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fail_mac_stats_periodic:
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fail_mcast_address_list_set:
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fail_mac_filter_set:
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fail_mac_addr_set:
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fail_mac_pdu_set:
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fail_phy_adv_cap_set:
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fail_mac_fcntl_set:
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#if EFSYS_OPT_LOOPBACK
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fail_loopback_set:
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#endif
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efx_port_fini(sa->nic);
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fail_port_init:
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efx_filter_fini(sa->nic);
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fail_filter_init:
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sfc_log_init(sa, "failed %d", rc);
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return rc;
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}
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void
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sfc_port_stop(struct sfc_adapter *sa)
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{
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sfc_log_init(sa, "entry");
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efx_mac_drain(sa->nic, B_TRUE);
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(void)efx_mac_stats_periodic(sa->nic, &sa->port.mac_stats_dma_mem,
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0, B_FALSE);
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efx_port_fini(sa->nic);
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efx_filter_fini(sa->nic);
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sfc_log_init(sa, "done");
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}
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int
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sfc_port_configure(struct sfc_adapter *sa)
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{
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const struct rte_eth_dev_data *dev_data = sa->eth_dev->data;
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struct sfc_port *port = &sa->port;
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const struct rte_eth_rxmode *rxmode = &dev_data->dev_conf.rxmode;
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sfc_log_init(sa, "entry");
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if (rxmode->offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
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port->pdu = rxmode->max_rx_pkt_len;
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else
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port->pdu = EFX_MAC_PDU(dev_data->mtu);
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return 0;
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}
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void
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sfc_port_close(struct sfc_adapter *sa)
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{
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sfc_log_init(sa, "entry");
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}
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int
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sfc_port_attach(struct sfc_adapter *sa)
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{
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struct sfc_port *port = &sa->port;
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const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
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const struct rte_ether_addr *from;
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uint32_t mac_nstats;
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size_t mac_stats_size;
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long kvarg_stats_update_period_ms;
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int rc;
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sfc_log_init(sa, "entry");
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efx_phy_adv_cap_get(sa->nic, EFX_PHY_CAP_PERM, &port->phy_adv_cap_mask);
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/* Enable flow control by default */
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port->flow_ctrl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
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port->flow_ctrl_autoneg = B_TRUE;
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RTE_BUILD_BUG_ON(sizeof(encp->enc_mac_addr) != sizeof(*from));
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from = (const struct rte_ether_addr *)(encp->enc_mac_addr);
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rte_ether_addr_copy(from, &port->default_mac_addr);
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port->max_mcast_addrs = EFX_MAC_MULTICAST_LIST_MAX;
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port->nb_mcast_addrs = 0;
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port->mcast_addrs = rte_calloc_socket("mcast_addr_list_buf",
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port->max_mcast_addrs,
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EFX_MAC_ADDR_LEN, 0,
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sa->socket_id);
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if (port->mcast_addrs == NULL) {
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rc = ENOMEM;
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goto fail_mcast_addr_list_buf_alloc;
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}
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rte_spinlock_init(&port->mac_stats_lock);
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rc = ENOMEM;
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port->mac_stats_buf = rte_calloc_socket("mac_stats_buf", EFX_MAC_NSTATS,
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sizeof(uint64_t), 0,
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sa->socket_id);
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if (port->mac_stats_buf == NULL)
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goto fail_mac_stats_buf_alloc;
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mac_nstats = efx_nic_cfg_get(sa->nic)->enc_mac_stats_nstats;
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mac_stats_size = RTE_ALIGN(mac_nstats * sizeof(uint64_t), EFX_BUF_SIZE);
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rc = sfc_dma_alloc(sa, "mac_stats", 0, mac_stats_size,
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sa->socket_id, &port->mac_stats_dma_mem);
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if (rc != 0)
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goto fail_mac_stats_dma_alloc;
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port->mac_stats_reset_pending = B_FALSE;
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|
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kvarg_stats_update_period_ms = SFC_MAC_STATS_UPDATE_PERIOD_MS_DEF;
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|
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rc = sfc_kvargs_process(sa, SFC_KVARG_STATS_UPDATE_PERIOD_MS,
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sfc_kvarg_long_handler,
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&kvarg_stats_update_period_ms);
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if ((rc == 0) &&
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((kvarg_stats_update_period_ms < 0) ||
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(kvarg_stats_update_period_ms > UINT16_MAX))) {
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sfc_err(sa, "wrong '" SFC_KVARG_STATS_UPDATE_PERIOD_MS "' "
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"was set (%ld);", kvarg_stats_update_period_ms);
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sfc_err(sa, "it must not be less than 0 "
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"or greater than %" PRIu16, UINT16_MAX);
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rc = EINVAL;
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goto fail_kvarg_stats_update_period_ms;
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} else if (rc != 0) {
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goto fail_kvarg_stats_update_period_ms;
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}
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|
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port->mac_stats_update_period_ms = kvarg_stats_update_period_ms;
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|
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sfc_log_init(sa, "done");
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return 0;
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|
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fail_kvarg_stats_update_period_ms:
|
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sfc_dma_free(sa, &port->mac_stats_dma_mem);
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|
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fail_mac_stats_dma_alloc:
|
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rte_free(port->mac_stats_buf);
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|
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fail_mac_stats_buf_alloc:
|
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rte_free(port->mcast_addrs);
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fail_mcast_addr_list_buf_alloc:
|
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sfc_log_init(sa, "failed %d", rc);
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return rc;
|
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}
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|
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void
|
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sfc_port_detach(struct sfc_adapter *sa)
|
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{
|
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struct sfc_port *port = &sa->port;
|
|
|
|
sfc_log_init(sa, "entry");
|
|
|
|
sfc_dma_free(sa, &port->mac_stats_dma_mem);
|
|
rte_free(port->mac_stats_buf);
|
|
|
|
rte_free(port->mcast_addrs);
|
|
|
|
sfc_log_init(sa, "done");
|
|
}
|
|
|
|
static boolean_t
|
|
sfc_get_requested_all_ucast(struct sfc_port *port)
|
|
{
|
|
return port->promisc;
|
|
}
|
|
|
|
static boolean_t
|
|
sfc_get_requested_all_mcast(struct sfc_port *port)
|
|
{
|
|
return port->promisc || port->allmulti;
|
|
}
|
|
|
|
int
|
|
sfc_set_rx_mode_unchecked(struct sfc_adapter *sa)
|
|
{
|
|
struct sfc_port *port = &sa->port;
|
|
boolean_t requested_all_ucast = sfc_get_requested_all_ucast(port);
|
|
boolean_t requested_all_mcast = sfc_get_requested_all_mcast(port);
|
|
int rc;
|
|
|
|
rc = efx_mac_filter_set(sa->nic, requested_all_ucast, B_TRUE,
|
|
requested_all_mcast, B_TRUE);
|
|
if (rc != 0)
|
|
return rc;
|
|
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
sfc_set_rx_mode(struct sfc_adapter *sa)
|
|
{
|
|
struct sfc_port *port = &sa->port;
|
|
boolean_t old_all_ucast;
|
|
boolean_t old_all_mcast;
|
|
boolean_t requested_all_ucast = sfc_get_requested_all_ucast(port);
|
|
boolean_t requested_all_mcast = sfc_get_requested_all_mcast(port);
|
|
boolean_t actual_all_ucast;
|
|
boolean_t actual_all_mcast;
|
|
int rc;
|
|
|
|
efx_mac_filter_get_all_ucast_mcast(sa->nic, &old_all_ucast,
|
|
&old_all_mcast);
|
|
|
|
rc = sfc_set_rx_mode_unchecked(sa);
|
|
if (rc != 0)
|
|
return rc;
|
|
|
|
efx_mac_filter_get_all_ucast_mcast(sa->nic, &actual_all_ucast,
|
|
&actual_all_mcast);
|
|
|
|
if (actual_all_ucast != requested_all_ucast ||
|
|
actual_all_mcast != requested_all_mcast) {
|
|
/*
|
|
* MAC filter set succeeded but not all requested modes
|
|
* were applied. The rollback is necessary to bring back the
|
|
* consistent old state.
|
|
*/
|
|
(void)efx_mac_filter_set(sa->nic, old_all_ucast, B_TRUE,
|
|
old_all_mcast, B_TRUE);
|
|
|
|
return EPERM;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
void
|
|
sfc_port_link_mode_to_info(efx_link_mode_t link_mode,
|
|
struct rte_eth_link *link_info)
|
|
{
|
|
SFC_ASSERT(link_mode < EFX_LINK_NMODES);
|
|
|
|
memset(link_info, 0, sizeof(*link_info));
|
|
if ((link_mode == EFX_LINK_DOWN) || (link_mode == EFX_LINK_UNKNOWN))
|
|
link_info->link_status = ETH_LINK_DOWN;
|
|
else
|
|
link_info->link_status = ETH_LINK_UP;
|
|
|
|
switch (link_mode) {
|
|
case EFX_LINK_10HDX:
|
|
link_info->link_speed = ETH_SPEED_NUM_10M;
|
|
link_info->link_duplex = ETH_LINK_HALF_DUPLEX;
|
|
break;
|
|
case EFX_LINK_10FDX:
|
|
link_info->link_speed = ETH_SPEED_NUM_10M;
|
|
link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
|
|
break;
|
|
case EFX_LINK_100HDX:
|
|
link_info->link_speed = ETH_SPEED_NUM_100M;
|
|
link_info->link_duplex = ETH_LINK_HALF_DUPLEX;
|
|
break;
|
|
case EFX_LINK_100FDX:
|
|
link_info->link_speed = ETH_SPEED_NUM_100M;
|
|
link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
|
|
break;
|
|
case EFX_LINK_1000HDX:
|
|
link_info->link_speed = ETH_SPEED_NUM_1G;
|
|
link_info->link_duplex = ETH_LINK_HALF_DUPLEX;
|
|
break;
|
|
case EFX_LINK_1000FDX:
|
|
link_info->link_speed = ETH_SPEED_NUM_1G;
|
|
link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
|
|
break;
|
|
case EFX_LINK_10000FDX:
|
|
link_info->link_speed = ETH_SPEED_NUM_10G;
|
|
link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
|
|
break;
|
|
case EFX_LINK_25000FDX:
|
|
link_info->link_speed = ETH_SPEED_NUM_25G;
|
|
link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
|
|
break;
|
|
case EFX_LINK_40000FDX:
|
|
link_info->link_speed = ETH_SPEED_NUM_40G;
|
|
link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
|
|
break;
|
|
case EFX_LINK_50000FDX:
|
|
link_info->link_speed = ETH_SPEED_NUM_50G;
|
|
link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
|
|
break;
|
|
case EFX_LINK_100000FDX:
|
|
link_info->link_speed = ETH_SPEED_NUM_100G;
|
|
link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
|
|
break;
|
|
default:
|
|
SFC_ASSERT(B_FALSE);
|
|
/* FALLTHROUGH */
|
|
case EFX_LINK_UNKNOWN:
|
|
case EFX_LINK_DOWN:
|
|
link_info->link_speed = ETH_SPEED_NUM_NONE;
|
|
link_info->link_duplex = 0;
|
|
break;
|
|
}
|
|
|
|
link_info->link_autoneg = ETH_LINK_AUTONEG;
|
|
}
|