50e2c7fdc1
cnxk platform supports red/yellow packet marking based on TM configuration. This patch set hooks to enable/disable packet marking for VLAN DEI, IP DSCP and IP ECN. Marking enabled only in scalar mode. Signed-off-by: Satha Rao <skoteshwar@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
107 lines
2.0 KiB
C
107 lines
2.0 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(C) 2021 Marvell.
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*/
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#ifndef __CN9K_ETHDEV_H__
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#define __CN9K_ETHDEV_H__
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#include <cnxk_ethdev.h>
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#include <cnxk_security.h>
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#include <cnxk_security_ar.h>
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struct cn9k_eth_txq {
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uint64_t send_hdr_w0;
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int64_t fc_cache_pkts;
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uint64_t *fc_mem;
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void *lmt_addr;
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rte_iova_t io_addr;
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uint64_t lso_tun_fmt;
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uint64_t ts_mem;
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uint16_t sqes_per_sqb_log2;
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int16_t nb_sqb_bufs_adj;
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rte_iova_t cpt_io_addr;
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uint64_t sa_base;
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uint64_t *cpt_fc;
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uint16_t cpt_desc;
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uint64_t mark_flag : 8;
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uint64_t mark_fmt : 48;
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} __plt_cache_aligned;
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struct cn9k_eth_rxq {
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uint64_t mbuf_initializer;
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uint64_t data_off;
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uintptr_t desc;
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void *lookup_mem;
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uintptr_t cq_door;
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uint64_t wdata;
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int64_t *cq_status;
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uint32_t head;
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uint32_t qmask;
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uint32_t available;
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uint16_t rq;
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struct cnxk_timesync_info *tstamp;
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} __plt_cache_aligned;
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/* Private data in sw rsvd area of struct roc_onf_ipsec_inb_sa */
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struct cn9k_inb_priv_data {
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void *userdata;
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uint32_t replay_win_sz;
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struct cnxk_on_ipsec_ar ar;
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struct cnxk_eth_sec_sess *eth_sec;
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};
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/* Private data in sw rsvd area of struct roc_onf_ipsec_outb_sa */
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struct cn9k_outb_priv_data {
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union {
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uint64_t esn;
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struct {
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uint32_t seq;
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uint32_t esn_hi;
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};
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};
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/* Rlen computation data */
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struct cnxk_ipsec_outb_rlens rlens;
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/* IP identifier */
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uint16_t ip_id;
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/* SA index */
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uint32_t sa_idx;
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/* Flags */
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uint16_t copy_salt : 1;
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/* Salt */
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uint32_t nonce;
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/* User data pointer */
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void *userdata;
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/* Back pointer to eth sec session */
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struct cnxk_eth_sec_sess *eth_sec;
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};
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struct cn9k_sec_sess_priv {
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union {
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struct {
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uint32_t sa_idx;
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uint8_t inb_sa : 1;
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uint8_t rsvd1 : 2;
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uint8_t roundup_byte : 5;
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uint8_t roundup_len;
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uint16_t partial_len;
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};
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uint64_t u64;
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};
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} __rte_packed;
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/* Rx and Tx routines */
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void cn9k_eth_set_rx_function(struct rte_eth_dev *eth_dev);
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void cn9k_eth_set_tx_function(struct rte_eth_dev *eth_dev);
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/* Security context setup */
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void cn9k_eth_sec_ops_override(void);
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#endif /* __CN9K_ETHDEV_H__ */
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