numam-dpdk/drivers
Viacheslav Ovsiienko f17e4b4ffe net/mlx5: add Tx scheduling check on queue creation
The send scheduling on timestamp offload requires the Send
Queue (SQ) shares its User Access Region (UAR) with the
pacing Clock Queue. The SQ can be created by mlx5 PMD either
with DevX or with Verbs. If the SQ is being created with
DevX, the dedicated UAR can be specified and all the SQs
share the single UAR. Once SQ is being created with Verbs
the SQ's UAR is allocated by the rdma-core library internally
on its own and there is no UAR sharing. This caused hardware
errors on WAIT WQEs and overall send scheduling malfunction.

If SQs are going to be created with Verbs and the send
scheduling offload is explicitly requested via tx_pp devarg
the device probing is rejected as device configuration
can't satisfy the requirements.

Fixes: 3ec73abeed ("net/mlx5/linux: fix Tx queue operations decision")
Fixes: 8f848f32fc ("net/mlx5: introduce send scheduling devargs")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-07-29 18:01:23 +02:00
..
baseband log: register with standardized names 2021-05-11 15:17:55 +02:00
bus net/dpaa2: add per-thread initialization API 2021-07-23 20:29:53 +02:00
common common/cnxk: support setting BPHY CGX/RPM FEC 2021-07-23 00:25:34 +02:00
compress compress/mlx5: fix overflow in queue size 2021-07-22 14:47:32 +02:00
crypto crypto/octeontx: enable build on non-Linux OS 2021-07-22 21:04:06 +02:00
event event/cnxk: support vectorized Tx event fast path 2021-07-16 14:16:50 +02:00
mempool mempool/octeontx2: fix shift calculation 2021-06-30 18:42:54 +02:00
net net/mlx5: add Tx scheduling check on queue creation 2021-07-29 18:01:23 +02:00
raw raw/cnxk_bphy: support setting FEC 2021-07-23 00:54:01 +02:00
regex regex/mlx5: fix redundancy in device removal 2021-07-22 15:19:37 +02:00
vdpa vdpa/mlx5: fix overflow in queue attribute 2021-07-22 14:48:07 +02:00
meson.build log: register with standardized names 2021-05-11 15:17:55 +02:00