0e7449cabc
efx_phy_adv_cap_set() sets all advertised phy capabilities including
pause capabilities which are also configured using efx_mac_fcntl_set().
If we set speed and autonegotiation capabilities only, we should
preserve already configured pause capabilities.
Fixes: d23f3a89ab
("net/sfc: support link speed and duplex settings")
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andrew Lee <alee@solarflare.com>
332 lines
8.6 KiB
C
332 lines
8.6 KiB
C
/*-
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* Copyright (c) 2016 Solarflare Communications Inc.
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* All rights reserved.
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*
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* This software was jointly developed between OKTET Labs (under contract
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* for Solarflare) and Solarflare Communications, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "efx.h"
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#include "sfc.h"
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#include "sfc_log.h"
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/**
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* Update MAC statistics in the buffer.
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*
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* @param sa Adapter
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*
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* @return Status code
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* @retval 0 Success
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* @retval EAGAIN Try again
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* @retval ENOMEM Memory allocation failure
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*/
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int
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sfc_port_update_mac_stats(struct sfc_adapter *sa)
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{
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struct sfc_port *port = &sa->port;
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int rc;
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SFC_ASSERT(rte_spinlock_is_locked(&port->mac_stats_lock));
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if (sa->state != SFC_ADAPTER_STARTED)
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return EINVAL;
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rc = efx_mac_stats_update(sa->nic, &port->mac_stats_dma_mem,
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port->mac_stats_buf, NULL);
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if (rc != 0)
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return rc;
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return 0;
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}
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static int
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sfc_port_init_dev_link(struct sfc_adapter *sa)
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{
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struct rte_eth_link *dev_link = &sa->eth_dev->data->dev_link;
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int rc;
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efx_link_mode_t link_mode;
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struct rte_eth_link current_link;
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rc = efx_port_poll(sa->nic, &link_mode);
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if (rc != 0)
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return rc;
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sfc_port_link_mode_to_info(link_mode, ¤t_link);
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EFX_STATIC_ASSERT(sizeof(*dev_link) == sizeof(rte_atomic64_t));
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rte_atomic64_set((rte_atomic64_t *)dev_link,
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*(uint64_t *)¤t_link);
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return 0;
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}
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int
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sfc_port_start(struct sfc_adapter *sa)
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{
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struct sfc_port *port = &sa->port;
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int rc;
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uint32_t phy_adv_cap;
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const uint32_t phy_pause_caps =
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((1u << EFX_PHY_CAP_PAUSE) | (1u << EFX_PHY_CAP_ASYM));
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sfc_log_init(sa, "entry");
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sfc_log_init(sa, "init filters");
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rc = efx_filter_init(sa->nic);
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if (rc != 0)
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goto fail_filter_init;
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sfc_log_init(sa, "init port");
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rc = efx_port_init(sa->nic);
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if (rc != 0)
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goto fail_port_init;
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sfc_log_init(sa, "set flow control to %#x autoneg=%u",
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port->flow_ctrl, port->flow_ctrl_autoneg);
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rc = efx_mac_fcntl_set(sa->nic, port->flow_ctrl,
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port->flow_ctrl_autoneg);
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if (rc != 0)
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goto fail_mac_fcntl_set;
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/* Preserve pause capabilities set by above efx_mac_fcntl_set() */
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efx_phy_adv_cap_get(sa->nic, EFX_PHY_CAP_CURRENT, &phy_adv_cap);
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SFC_ASSERT((port->phy_adv_cap & phy_pause_caps) == 0);
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phy_adv_cap = port->phy_adv_cap | (phy_adv_cap & phy_pause_caps);
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sfc_log_init(sa, "set phy adv caps to %#x", phy_adv_cap);
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rc = efx_phy_adv_cap_set(sa->nic, phy_adv_cap);
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if (rc != 0)
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goto fail_phy_adv_cap_set;
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sfc_log_init(sa, "set MAC PDU %u", (unsigned int)port->pdu);
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rc = efx_mac_pdu_set(sa->nic, port->pdu);
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if (rc != 0)
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goto fail_mac_pdu_set;
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sfc_log_init(sa, "set MAC address");
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rc = efx_mac_addr_set(sa->nic,
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sa->eth_dev->data->mac_addrs[0].addr_bytes);
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if (rc != 0)
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goto fail_mac_addr_set;
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sfc_log_init(sa, "set MAC filters");
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port->promisc = (sa->eth_dev->data->promiscuous != 0) ?
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B_TRUE : B_FALSE;
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port->allmulti = (sa->eth_dev->data->all_multicast != 0) ?
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B_TRUE : B_FALSE;
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rc = sfc_set_rx_mode(sa);
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if (rc != 0)
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goto fail_mac_filter_set;
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efx_mac_stats_get_mask(sa->nic, port->mac_stats_mask,
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sizeof(port->mac_stats_mask));
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/* Update MAC stats using periodic DMA.
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* Common code always uses 1000ms update period, so period_ms
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* parameter only needs to be non-zero to start updates.
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*/
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sfc_log_init(sa, "request MAC stats DMA'ing");
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rc = efx_mac_stats_periodic(sa->nic, &port->mac_stats_dma_mem,
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1000, B_FALSE);
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if (rc != 0)
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goto fail_mac_stats_periodic;
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sfc_log_init(sa, "disable MAC drain");
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rc = efx_mac_drain(sa->nic, B_FALSE);
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if (rc != 0)
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goto fail_mac_drain;
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/* Synchronize link status knowledge */
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rc = sfc_port_init_dev_link(sa);
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if (rc != 0)
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goto fail_port_init_dev_link;
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sfc_log_init(sa, "done");
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return 0;
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fail_port_init_dev_link:
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(void)efx_mac_drain(sa->nic, B_TRUE);
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fail_mac_drain:
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(void)efx_mac_stats_periodic(sa->nic, &port->mac_stats_dma_mem,
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0, B_FALSE);
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fail_mac_stats_periodic:
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fail_mac_filter_set:
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fail_mac_addr_set:
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fail_mac_pdu_set:
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fail_phy_adv_cap_set:
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fail_mac_fcntl_set:
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efx_port_fini(sa->nic);
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fail_port_init:
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efx_filter_fini(sa->nic);
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fail_filter_init:
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sfc_log_init(sa, "failed %d", rc);
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return rc;
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}
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void
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sfc_port_stop(struct sfc_adapter *sa)
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{
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sfc_log_init(sa, "entry");
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efx_mac_drain(sa->nic, B_TRUE);
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(void)efx_mac_stats_periodic(sa->nic, &sa->port.mac_stats_dma_mem,
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0, B_FALSE);
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efx_port_fini(sa->nic);
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efx_filter_fini(sa->nic);
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sfc_log_init(sa, "done");
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}
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int
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sfc_port_init(struct sfc_adapter *sa)
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{
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const struct rte_eth_dev_data *dev_data = sa->eth_dev->data;
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struct sfc_port *port = &sa->port;
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int rc;
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sfc_log_init(sa, "entry");
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/* Enable flow control by default */
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port->flow_ctrl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
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port->flow_ctrl_autoneg = B_TRUE;
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if (dev_data->dev_conf.rxmode.jumbo_frame)
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port->pdu = dev_data->dev_conf.rxmode.max_rx_pkt_len;
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else
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port->pdu = EFX_MAC_PDU(dev_data->mtu);
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rte_spinlock_init(&port->mac_stats_lock);
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rc = ENOMEM;
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port->mac_stats_buf = rte_calloc_socket("mac_stats_buf", EFX_MAC_NSTATS,
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sizeof(uint64_t), 0,
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sa->socket_id);
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if (port->mac_stats_buf == NULL)
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goto fail_mac_stats_buf_alloc;
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rc = sfc_dma_alloc(sa, "mac_stats", 0, EFX_MAC_STATS_SIZE,
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sa->socket_id, &port->mac_stats_dma_mem);
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if (rc != 0)
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goto fail_mac_stats_dma_alloc;
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sfc_log_init(sa, "done");
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return 0;
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fail_mac_stats_dma_alloc:
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rte_free(port->mac_stats_buf);
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fail_mac_stats_buf_alloc:
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sfc_log_init(sa, "failed %d", rc);
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return rc;
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}
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void
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sfc_port_fini(struct sfc_adapter *sa)
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{
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struct sfc_port *port = &sa->port;
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sfc_log_init(sa, "entry");
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sfc_dma_free(sa, &port->mac_stats_dma_mem);
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rte_free(port->mac_stats_buf);
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sfc_log_init(sa, "done");
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}
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int
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sfc_set_rx_mode(struct sfc_adapter *sa)
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{
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struct sfc_port *port = &sa->port;
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int rc;
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rc = efx_mac_filter_set(sa->nic, port->promisc, B_TRUE,
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port->promisc || port->allmulti, B_TRUE);
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return rc;
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}
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void
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sfc_port_link_mode_to_info(efx_link_mode_t link_mode,
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struct rte_eth_link *link_info)
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{
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SFC_ASSERT(link_mode < EFX_LINK_NMODES);
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memset(link_info, 0, sizeof(*link_info));
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if ((link_mode == EFX_LINK_DOWN) || (link_mode == EFX_LINK_UNKNOWN))
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link_info->link_status = ETH_LINK_DOWN;
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else
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link_info->link_status = ETH_LINK_UP;
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switch (link_mode) {
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case EFX_LINK_10HDX:
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link_info->link_speed = ETH_SPEED_NUM_10M;
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link_info->link_duplex = ETH_LINK_HALF_DUPLEX;
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break;
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case EFX_LINK_10FDX:
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link_info->link_speed = ETH_SPEED_NUM_10M;
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link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
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break;
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case EFX_LINK_100HDX:
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link_info->link_speed = ETH_SPEED_NUM_100M;
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link_info->link_duplex = ETH_LINK_HALF_DUPLEX;
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break;
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case EFX_LINK_100FDX:
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link_info->link_speed = ETH_SPEED_NUM_100M;
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link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
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break;
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case EFX_LINK_1000HDX:
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link_info->link_speed = ETH_SPEED_NUM_1G;
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link_info->link_duplex = ETH_LINK_HALF_DUPLEX;
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break;
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case EFX_LINK_1000FDX:
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link_info->link_speed = ETH_SPEED_NUM_1G;
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link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
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break;
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case EFX_LINK_10000FDX:
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link_info->link_speed = ETH_SPEED_NUM_10G;
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link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
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break;
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case EFX_LINK_40000FDX:
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link_info->link_speed = ETH_SPEED_NUM_40G;
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link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
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break;
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default:
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SFC_ASSERT(B_FALSE);
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/* FALLTHROUGH */
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case EFX_LINK_UNKNOWN:
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case EFX_LINK_DOWN:
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link_info->link_speed = ETH_SPEED_NUM_NONE;
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link_info->link_duplex = 0;
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break;
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}
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link_info->link_autoneg = ETH_LINK_AUTONEG;
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}
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