b140e9701c
Use lpm vector path to process event vector. Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: Shijith Thotton <sthotton@marvell.com>
246 lines
5.7 KiB
C
246 lines
5.7 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2016-2018 Intel Corporation.
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* Copyright(c) 2017-2018 Linaro Limited.
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*/
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#ifndef _L3FWD_NEON_H_
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#define _L3FWD_NEON_H_
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#include "l3fwd.h"
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#include "neon/port_group.h"
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#include "l3fwd_common.h"
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/*
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* Update source and destination MAC addresses in the ethernet header.
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* Perform RFC1812 checks and updates for IPV4 packets.
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*/
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static inline void
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processx4_step3(struct rte_mbuf *pkt[FWDSTEP], uint16_t dst_port[FWDSTEP])
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{
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uint32x4_t te[FWDSTEP];
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uint32x4_t ve[FWDSTEP];
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uint32_t *p[FWDSTEP];
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p[0] = rte_pktmbuf_mtod(pkt[0], uint32_t *);
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p[1] = rte_pktmbuf_mtod(pkt[1], uint32_t *);
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p[2] = rte_pktmbuf_mtod(pkt[2], uint32_t *);
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p[3] = rte_pktmbuf_mtod(pkt[3], uint32_t *);
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ve[0] = vreinterpretq_u32_s32(val_eth[dst_port[0]]);
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te[0] = vld1q_u32(p[0]);
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ve[1] = vreinterpretq_u32_s32(val_eth[dst_port[1]]);
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te[1] = vld1q_u32(p[1]);
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ve[2] = vreinterpretq_u32_s32(val_eth[dst_port[2]]);
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te[2] = vld1q_u32(p[2]);
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ve[3] = vreinterpretq_u32_s32(val_eth[dst_port[3]]);
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te[3] = vld1q_u32(p[3]);
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/* Update last 4 bytes */
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ve[0] = vsetq_lane_u32(vgetq_lane_u32(te[0], 3), ve[0], 3);
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ve[1] = vsetq_lane_u32(vgetq_lane_u32(te[1], 3), ve[1], 3);
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ve[2] = vsetq_lane_u32(vgetq_lane_u32(te[2], 3), ve[2], 3);
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ve[3] = vsetq_lane_u32(vgetq_lane_u32(te[3], 3), ve[3], 3);
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vst1q_u32(p[0], ve[0]);
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vst1q_u32(p[1], ve[1]);
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vst1q_u32(p[2], ve[2]);
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vst1q_u32(p[3], ve[3]);
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rfc1812_process((struct rte_ipv4_hdr *)
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((struct rte_ether_hdr *)p[0] + 1),
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&dst_port[0], pkt[0]->packet_type);
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rfc1812_process((struct rte_ipv4_hdr *)
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((struct rte_ether_hdr *)p[1] + 1),
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&dst_port[1], pkt[1]->packet_type);
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rfc1812_process((struct rte_ipv4_hdr *)
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((struct rte_ether_hdr *)p[2] + 1),
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&dst_port[2], pkt[2]->packet_type);
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rfc1812_process((struct rte_ipv4_hdr *)
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((struct rte_ether_hdr *)p[3] + 1),
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&dst_port[3], pkt[3]->packet_type);
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}
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/**
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* Process one packet:
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* Update source and destination MAC addresses in the ethernet header.
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* Perform RFC1812 checks and updates for IPV4 packets.
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*/
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static inline void
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process_packet(struct rte_mbuf *pkt, uint16_t *dst_port)
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{
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struct rte_ether_hdr *eth_hdr;
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uint32x4_t te, ve;
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eth_hdr = rte_pktmbuf_mtod(pkt, struct rte_ether_hdr *);
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te = vld1q_u32((uint32_t *)eth_hdr);
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ve = vreinterpretq_u32_s32(val_eth[dst_port[0]]);
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rfc1812_process((struct rte_ipv4_hdr *)(eth_hdr + 1), dst_port,
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pkt->packet_type);
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ve = vcopyq_laneq_u32(ve, 3, te, 3);
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vst1q_u32((uint32_t *)eth_hdr, ve);
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}
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/**
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* Send packets burst from pkts_burst to the ports in dst_port array
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*/
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static __rte_always_inline void
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send_packets_multi(struct lcore_conf *qconf, struct rte_mbuf **pkts_burst,
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uint16_t dst_port[MAX_PKT_BURST], int nb_rx)
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{
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int32_t k;
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int j = 0;
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uint16_t dlp;
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uint16_t *lp;
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uint16_t pnum[MAX_PKT_BURST + 1];
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/*
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* Finish packet processing and group consecutive
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* packets with the same destination port.
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*/
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k = RTE_ALIGN_FLOOR(nb_rx, FWDSTEP);
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if (k != 0) {
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uint16x8_t dp1, dp2;
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lp = pnum;
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lp[0] = 1;
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processx4_step3(pkts_burst, dst_port);
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/* dp1: <d[0], d[1], d[2], d[3], ... > */
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dp1 = vld1q_u16(dst_port);
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for (j = FWDSTEP; j != k; j += FWDSTEP) {
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processx4_step3(&pkts_burst[j], &dst_port[j]);
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/*
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* dp2:
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* <d[j-3], d[j-2], d[j-1], d[j], ... >
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*/
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dp2 = vld1q_u16(&dst_port[j - FWDSTEP + 1]);
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lp = port_groupx4(&pnum[j - FWDSTEP], lp, dp1, dp2);
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/*
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* dp1:
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* <d[j], d[j+1], d[j+2], d[j+3], ... >
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*/
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dp1 = vextq_u16(dp2, dp1, FWDSTEP - 1);
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}
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/*
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* dp2: <d[j-3], d[j-2], d[j-1], d[j-1], ... >
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*/
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dp2 = vextq_u16(dp1, dp1, 1);
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dp2 = vsetq_lane_u16(vgetq_lane_u16(dp2, 2), dp2, 3);
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lp = port_groupx4(&pnum[j - FWDSTEP], lp, dp1, dp2);
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/*
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* remove values added by the last repeated
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* dst port.
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*/
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lp[0]--;
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dlp = dst_port[j - 1];
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} else {
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/* set dlp and lp to the never used values. */
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dlp = BAD_PORT - 1;
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lp = pnum + MAX_PKT_BURST;
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}
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/* Process up to last 3 packets one by one. */
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switch (nb_rx % FWDSTEP) {
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case 3:
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process_packet(pkts_burst[j], dst_port + j);
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GROUP_PORT_STEP(dlp, dst_port, lp, pnum, j);
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j++;
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/* fallthrough */
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case 2:
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process_packet(pkts_burst[j], dst_port + j);
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GROUP_PORT_STEP(dlp, dst_port, lp, pnum, j);
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j++;
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/* fallthrough */
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case 1:
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process_packet(pkts_burst[j], dst_port + j);
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GROUP_PORT_STEP(dlp, dst_port, lp, pnum, j);
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j++;
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}
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/*
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* Send packets out, through destination port.
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* Consecutive packets with the same destination port
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* are already grouped together.
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* If destination port for the packet equals BAD_PORT,
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* then free the packet without sending it out.
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*/
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for (j = 0; j < nb_rx; j += k) {
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int32_t m;
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uint16_t pn;
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pn = dst_port[j];
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k = pnum[j];
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if (likely(pn != BAD_PORT))
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send_packetsx4(qconf, pn, pkts_burst + j, k);
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else
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for (m = j; m != j + k; m++)
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rte_pktmbuf_free(pkts_burst[m]);
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}
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}
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static __rte_always_inline uint16_t
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process_dst_port(uint16_t *dst_ports, uint16_t nb_elem)
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{
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uint16_t i = 0;
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#if defined(RTE_ARCH_ARM64)
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uint64_t res;
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while (nb_elem > 7) {
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uint16x8_t dp = vdupq_n_u16(dst_ports[0]);
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uint16x8_t dp1;
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dp1 = vld1q_u16(&dst_ports[i]);
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dp1 = vceqq_u16(dp1, dp);
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res = vget_lane_u64(vreinterpret_u64_u8(vshrn_n_u16(dp1, 4)),
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0);
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if (res != ~0ULL)
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return BAD_PORT;
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nb_elem -= 8;
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i += 8;
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}
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while (nb_elem > 3) {
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uint16x4_t dp = vdup_n_u16(dst_ports[0]);
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uint16x4_t dp1;
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dp1 = vld1_u16(&dst_ports[i]);
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dp1 = vceq_u16(dp1, dp);
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res = vget_lane_u64(vreinterpret_u64_u16(dp1), 0);
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if (res != ~0ULL)
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return BAD_PORT;
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nb_elem -= 4;
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i += 4;
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}
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#endif
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while (nb_elem) {
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if (dst_ports[i] != dst_ports[0])
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return BAD_PORT;
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nb_elem--;
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i++;
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}
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return dst_ports[0];
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}
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#endif /* _L3FWD_NEON_H_ */
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