ffc905f3b8
Create a rte_ethdev_driver.h file and move PMD specific APIs here. Drivers updated to include this new header file. There is no update in header content and since ethdev.h included by ethdev_driver.h, nothing changed from driver point of view, only logically grouping of APIs. From applications point of view they can't access to driver specific APIs anymore and they shouldn't. More PMD specific data structures still remain in ethdev.h because of inline functions in header use them. Those will be handled separately. Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com> Acked-by: Shreyansh Jain <shreyansh.jain@nxp.com> Acked-by: Andrew Rybchenko <arybchenko@solarflare.com> Acked-by: Thomas Monjalon <thomas@monjalon.net>
133 lines
3.3 KiB
C
133 lines
3.3 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2016 Cavium, Inc
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*/
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#ifndef __THUNDERX_NICVF_ETHDEV_H__
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#define __THUNDERX_NICVF_ETHDEV_H__
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#include <rte_ethdev_driver.h>
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#define THUNDERX_NICVF_PMD_VERSION "2.0"
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#define THUNDERX_REG_BYTES 8
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#define NICVF_INTR_POLL_INTERVAL_MS 50
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#define NICVF_HALF_DUPLEX 0x00
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#define NICVF_FULL_DUPLEX 0x01
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#define NICVF_UNKNOWN_DUPLEX 0xff
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#define NICVF_RSS_OFFLOAD_PASS1 ( \
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ETH_RSS_PORT | \
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ETH_RSS_IPV4 | \
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ETH_RSS_NONFRAG_IPV4_TCP | \
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ETH_RSS_NONFRAG_IPV4_UDP | \
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ETH_RSS_IPV6 | \
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ETH_RSS_NONFRAG_IPV6_TCP | \
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ETH_RSS_NONFRAG_IPV6_UDP)
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#define NICVF_RSS_OFFLOAD_TUNNEL ( \
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ETH_RSS_VXLAN | \
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ETH_RSS_GENEVE | \
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ETH_RSS_NVGRE)
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#define NICVF_TX_OFFLOAD_CAPA ( \
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DEV_TX_OFFLOAD_IPV4_CKSUM | \
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DEV_TX_OFFLOAD_UDP_CKSUM | \
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DEV_TX_OFFLOAD_TCP_CKSUM | \
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DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | \
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DEV_TX_OFFLOAD_MBUF_FAST_FREE | \
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DEV_TX_OFFLOAD_MULTI_SEGS)
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#define NICVF_RX_OFFLOAD_CAPA ( \
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DEV_RX_OFFLOAD_VLAN_STRIP | \
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DEV_RX_OFFLOAD_CRC_STRIP | \
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DEV_RX_OFFLOAD_JUMBO_FRAME | \
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DEV_RX_OFFLOAD_SCATTER)
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#define NICVF_DEFAULT_RX_FREE_THRESH 224
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#define NICVF_DEFAULT_TX_FREE_THRESH 224
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#define NICVF_TX_FREE_MPOOL_THRESH 16
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#define NICVF_MAX_RX_FREE_THRESH 1024
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#define NICVF_MAX_TX_FREE_THRESH 1024
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#define VLAN_TAG_SIZE 4 /* 802.3ac tag */
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static inline struct nicvf *
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nicvf_pmd_priv(struct rte_eth_dev *eth_dev)
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{
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return eth_dev->data->dev_private;
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}
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static inline uint64_t
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nicvf_mempool_phy_offset(struct rte_mempool *mp)
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{
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struct rte_mempool_memhdr *hdr;
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hdr = STAILQ_FIRST(&mp->mem_list);
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assert(hdr != NULL);
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return (uint64_t)((uintptr_t)hdr->addr - hdr->iova);
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}
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static inline uint16_t
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nicvf_mbuff_meta_length(struct rte_mbuf *mbuf)
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{
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return (uint16_t)((uintptr_t)mbuf->buf_addr - (uintptr_t)mbuf);
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}
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static inline uint16_t
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nicvf_netdev_qidx(struct nicvf *nic, uint8_t local_qidx)
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{
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uint16_t global_qidx = local_qidx;
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if (nic->sqs_mode)
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global_qidx += ((nic->sqs_id + 1) * MAX_CMP_QUEUES_PER_QS);
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return global_qidx;
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}
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/*
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* Simple phy2virt functions assuming mbufs are in a single huge page
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* V = P + offset
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* P = V - offset
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*/
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static inline uintptr_t
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nicvf_mbuff_phy2virt(rte_iova_t phy, uint64_t mbuf_phys_off)
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{
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return (uintptr_t)(phy + mbuf_phys_off);
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}
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static inline uintptr_t
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nicvf_mbuff_virt2phy(uintptr_t virt, uint64_t mbuf_phys_off)
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{
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return (rte_iova_t)(virt - mbuf_phys_off);
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}
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static inline void
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nicvf_tx_range(struct rte_eth_dev *dev, struct nicvf *nic, uint16_t *tx_start,
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uint16_t *tx_end)
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{
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uint16_t tmp;
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*tx_start = RTE_ALIGN_FLOOR(nicvf_netdev_qidx(nic, 0),
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MAX_SND_QUEUES_PER_QS);
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tmp = RTE_ALIGN_CEIL(nicvf_netdev_qidx(nic, 0) + 1,
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MAX_SND_QUEUES_PER_QS) - 1;
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*tx_end = dev->data->nb_tx_queues ?
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RTE_MIN(tmp, dev->data->nb_tx_queues - 1) : 0;
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}
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static inline void
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nicvf_rx_range(struct rte_eth_dev *dev, struct nicvf *nic, uint16_t *rx_start,
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uint16_t *rx_end)
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{
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uint16_t tmp;
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*rx_start = RTE_ALIGN_FLOOR(nicvf_netdev_qidx(nic, 0),
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MAX_RCV_QUEUES_PER_QS);
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tmp = RTE_ALIGN_CEIL(nicvf_netdev_qidx(nic, 0) + 1,
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MAX_RCV_QUEUES_PER_QS) - 1;
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*rx_end = dev->data->nb_rx_queues ?
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RTE_MIN(tmp, dev->data->nb_rx_queues - 1) : 0;
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}
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#endif /* __THUNDERX_NICVF_ETHDEV_H__ */
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