Timothy McDaniel faa6071869 event/dlb2: add v2.5 sparse CQ mode
Update the low level HW functions responsible for
configuring sparse CQ mode, where each cache line
contains just one QE instead of 4.

The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names.  Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:30 +02:00
2021-05-04 22:41:31 +02:00
2016-11-13 15:25:12 +01:00
2021-04-16 14:09:03 +02:00
2021-02-15 11:08:19 +01:00
2020-09-07 23:51:57 +02:00
2018-01-04 22:41:38 +01:00
2021-04-22 00:28:57 +02:00

DPDK is a set of libraries and drivers for fast packet processing.
It supports many processor architectures and both FreeBSD and Linux.

The DPDK uses the Open Source BSD-3-Clause license for the core libraries
and drivers. The kernel components are GPL-2.0 licensed.

Please check the doc directory for release notes,
API documentation, and sample application information.

For questions and usage discussions, subscribe to: users@dpdk.org
Report bugs and issues to the development mailing list: dev@dpdk.org
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