fbd5ceb0ef
Support to get OEM customized LED configuration information from firmware. And driver needs to adjust the process of PHY setup link, based on this LED configuration. Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
390 lines
10 KiB
C
390 lines
10 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2018-2021 Beijing WangXun Technology Co., Ltd.
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* Copyright(c) 2010-2017 Intel Corporation
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*/
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#include "ngbe_type.h"
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#include "ngbe_mng.h"
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/**
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* ngbe_hic_unlocked - Issue command to manageability block unlocked
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* @hw: pointer to the HW structure
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* @buffer: command to write and where the return status will be placed
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* @length: length of buffer, must be multiple of 4 bytes
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* @timeout: time in ms to wait for command completion
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*
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* Communicates with the manageability block. On success return 0
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* else returns semaphore error when encountering an error acquiring
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* semaphore or NGBE_ERR_HOST_INTERFACE_COMMAND when command fails.
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*
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* This function assumes that the NGBE_MNGSEM_SWMBX semaphore is held
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* by the caller.
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**/
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static s32
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ngbe_hic_unlocked(struct ngbe_hw *hw, u32 *buffer, u32 length, u32 timeout)
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{
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u32 value, loop;
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u16 i, dword_len;
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DEBUGFUNC("ngbe_hic_unlocked");
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if (!length || length > NGBE_PMMBX_BSIZE) {
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DEBUGOUT("Buffer length failure buffersize=%d.\n", length);
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return NGBE_ERR_HOST_INTERFACE_COMMAND;
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}
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/* Calculate length in DWORDs. We must be DWORD aligned */
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if (length % sizeof(u32)) {
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DEBUGOUT("Buffer length failure, not aligned to dword");
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return NGBE_ERR_INVALID_ARGUMENT;
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}
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dword_len = length >> 2;
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/* The device driver writes the relevant command block
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* into the ram area.
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*/
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for (i = 0; i < dword_len; i++) {
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wr32a(hw, NGBE_MNGMBX, i, cpu_to_le32(buffer[i]));
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buffer[i] = rd32a(hw, NGBE_MNGMBX, i);
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}
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ngbe_flush(hw);
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/* Setting this bit tells the ARC that a new command is pending. */
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wr32m(hw, NGBE_MNGMBXCTL,
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NGBE_MNGMBXCTL_SWRDY, NGBE_MNGMBXCTL_SWRDY);
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/* Check command completion */
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loop = po32m(hw, NGBE_MNGMBXCTL,
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NGBE_MNGMBXCTL_FWRDY, NGBE_MNGMBXCTL_FWRDY,
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&value, timeout, 1000);
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if (!loop || !(value & NGBE_MNGMBXCTL_FWACK)) {
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DEBUGOUT("Command has failed with no status valid.\n");
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return NGBE_ERR_HOST_INTERFACE_COMMAND;
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}
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return 0;
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}
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/**
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* ngbe_host_interface_command - Issue command to manageability block
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* @hw: pointer to the HW structure
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* @buffer: contains the command to write and where the return status will
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* be placed
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* @length: length of buffer, must be multiple of 4 bytes
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* @timeout: time in ms to wait for command completion
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* @return_data: read and return data from the buffer (true) or not (false)
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* Needed because FW structures are big endian and decoding of
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* these fields can be 8 bit or 16 bit based on command. Decoding
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* is not easily understood without making a table of commands.
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* So we will leave this up to the caller to read back the data
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* in these cases.
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*
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* Communicates with the manageability block. On success return 0
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* else returns semaphore error when encountering an error acquiring
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* semaphore or NGBE_ERR_HOST_INTERFACE_COMMAND when command fails.
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**/
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static s32
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ngbe_host_interface_command(struct ngbe_hw *hw, u32 *buffer,
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u32 length, u32 timeout, bool return_data)
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{
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u32 hdr_size = sizeof(struct ngbe_hic_hdr);
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struct ngbe_hic_hdr *resp = (struct ngbe_hic_hdr *)buffer;
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u16 buf_len;
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s32 err;
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u32 bi;
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u32 dword_len;
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DEBUGFUNC("ngbe_host_interface_command");
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if (length == 0 || length > NGBE_PMMBX_BSIZE) {
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DEBUGOUT("Buffer length failure buffersize=%d.\n", length);
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return NGBE_ERR_HOST_INTERFACE_COMMAND;
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}
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/* Take management host interface semaphore */
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err = hw->mac.acquire_swfw_sync(hw, NGBE_MNGSEM_SWMBX);
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if (err)
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return err;
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err = ngbe_hic_unlocked(hw, buffer, length, timeout);
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if (err)
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goto rel_out;
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if (!return_data)
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goto rel_out;
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/* Calculate length in DWORDs */
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dword_len = hdr_size >> 2;
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/* first pull in the header so we know the buffer length */
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for (bi = 0; bi < dword_len; bi++)
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buffer[bi] = rd32a(hw, NGBE_MNGMBX, bi);
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/*
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* If there is any thing in data position pull it in
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* Read Flash command requires reading buffer length from
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* two byes instead of one byte
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*/
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if (resp->cmd == 0x30) {
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for (; bi < dword_len + 2; bi++)
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buffer[bi] = rd32a(hw, NGBE_MNGMBX, bi);
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buf_len = (((u16)(resp->cmd_or_resp.ret_status) << 3)
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& 0xF00) | resp->buf_len;
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hdr_size += (2 << 2);
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} else {
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buf_len = resp->buf_len;
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}
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if (!buf_len)
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goto rel_out;
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if (length < buf_len + hdr_size) {
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DEBUGOUT("Buffer not large enough for reply message.\n");
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err = NGBE_ERR_HOST_INTERFACE_COMMAND;
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goto rel_out;
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}
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/* Calculate length in DWORDs, add 3 for odd lengths */
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dword_len = (buf_len + 3) >> 2;
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/* Pull in the rest of the buffer (bi is where we left off) */
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for (; bi <= dword_len; bi++)
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buffer[bi] = rd32a(hw, NGBE_MNGMBX, bi);
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rel_out:
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hw->mac.release_swfw_sync(hw, NGBE_MNGSEM_SWMBX);
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return err;
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}
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/**
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* ngbe_hic_sr_read - Read EEPROM word using a host interface cmd
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* assuming that the semaphore is already obtained.
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* @hw: pointer to hardware structure
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* @offset: offset of word in the EEPROM to read
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* @data: word read from the EEPROM
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*
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* Reads a 16 bit word from the EEPROM using the hostif.
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**/
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s32 ngbe_hic_sr_read(struct ngbe_hw *hw, u32 addr, u8 *buf, int len)
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{
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struct ngbe_hic_read_shadow_ram command;
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u32 value;
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int err, i = 0, j = 0;
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if (len > NGBE_PMMBX_DATA_SIZE)
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return NGBE_ERR_HOST_INTERFACE_COMMAND;
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memset(&command, 0, sizeof(command));
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command.hdr.req.cmd = FW_READ_SHADOW_RAM_CMD;
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command.hdr.req.buf_lenh = 0;
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command.hdr.req.buf_lenl = FW_READ_SHADOW_RAM_LEN;
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command.hdr.req.checksum = FW_DEFAULT_CHECKSUM;
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command.address = cpu_to_be32(addr);
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command.length = cpu_to_be16(len);
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err = ngbe_hic_unlocked(hw, (u32 *)&command,
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sizeof(command), NGBE_HI_COMMAND_TIMEOUT);
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if (err)
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return err;
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while (i < (len >> 2)) {
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value = rd32a(hw, NGBE_MNGMBX, FW_NVM_DATA_OFFSET + i);
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((u32 *)buf)[i] = value;
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i++;
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}
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value = rd32a(hw, NGBE_MNGMBX, FW_NVM_DATA_OFFSET + i);
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for (i <<= 2; i < len; i++)
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((u8 *)buf)[i] = ((u8 *)&value)[j++];
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return 0;
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}
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/**
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* ngbe_hic_sr_write - Write EEPROM word using hostif
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* @hw: pointer to hardware structure
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* @offset: offset of word in the EEPROM to write
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* @data: word write to the EEPROM
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*
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* Write a 16 bit word to the EEPROM using the hostif.
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**/
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s32 ngbe_hic_sr_write(struct ngbe_hw *hw, u32 addr, u8 *buf, int len)
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{
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struct ngbe_hic_write_shadow_ram command;
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u32 value;
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int err = 0, i = 0, j = 0;
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if (len > NGBE_PMMBX_DATA_SIZE)
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return NGBE_ERR_HOST_INTERFACE_COMMAND;
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memset(&command, 0, sizeof(command));
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command.hdr.req.cmd = FW_WRITE_SHADOW_RAM_CMD;
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command.hdr.req.buf_lenh = 0;
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command.hdr.req.buf_lenl = FW_WRITE_SHADOW_RAM_LEN;
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command.hdr.req.checksum = FW_DEFAULT_CHECKSUM;
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command.address = cpu_to_be32(addr);
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command.length = cpu_to_be16(len);
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while (i < (len >> 2)) {
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value = ((u32 *)buf)[i];
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wr32a(hw, NGBE_MNGMBX, FW_NVM_DATA_OFFSET + i, value);
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i++;
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}
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for (i <<= 2; i < len; i++)
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((u8 *)&value)[j++] = ((u8 *)buf)[i];
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wr32a(hw, NGBE_MNGMBX, FW_NVM_DATA_OFFSET + (i >> 2), value);
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UNREFERENCED_PARAMETER(&command);
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return err;
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}
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s32 ngbe_hic_pcie_read(struct ngbe_hw *hw, u16 addr, u32 *buf, int len)
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{
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struct ngbe_hic_read_pcie command;
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u32 value = 0;
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int err, i = 0;
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if (len > NGBE_PMMBX_DATA_SIZE)
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return NGBE_ERR_HOST_INTERFACE_COMMAND;
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memset(&command, 0, sizeof(command));
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command.hdr.cmd = FW_PCIE_READ_CMD;
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command.hdr.buf_len = sizeof(command) - sizeof(command.hdr);
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command.hdr.checksum = FW_DEFAULT_CHECKSUM;
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command.lan_id = hw->bus.lan_id;
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command.addr = addr;
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err = ngbe_host_interface_command(hw, (u32 *)&command,
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sizeof(command), NGBE_HI_COMMAND_TIMEOUT, false);
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if (err)
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return err;
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while (i < (len >> 2)) {
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value = rd32a(hw, NGBE_MNGMBX, FW_PCIE_BUSMASTER_OFFSET + i);
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((u32 *)buf)[i] = value;
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i++;
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}
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return 0;
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}
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s32 ngbe_hic_pcie_write(struct ngbe_hw *hw, u16 addr, u32 *buf, int len)
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{
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struct ngbe_hic_write_pcie command;
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u32 value = 0;
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int err, i = 0;
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while (i < (len >> 2)) {
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value = ((u32 *)buf)[i];
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i++;
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}
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memset(&command, 0, sizeof(command));
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command.hdr.cmd = FW_PCIE_WRITE_CMD;
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command.hdr.buf_len = sizeof(command) - sizeof(command.hdr);
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command.hdr.checksum = FW_DEFAULT_CHECKSUM;
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command.lan_id = hw->bus.lan_id;
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command.addr = addr;
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command.data = value;
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err = ngbe_host_interface_command(hw, (u32 *)&command,
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sizeof(command), NGBE_HI_COMMAND_TIMEOUT, false);
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if (err)
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return err;
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return 0;
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}
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s32 ngbe_hic_check_cap(struct ngbe_hw *hw)
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{
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struct ngbe_hic_read_shadow_ram command;
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s32 err;
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int i;
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DEBUGFUNC("\n");
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command.hdr.req.cmd = FW_EEPROM_CHECK_STATUS;
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command.hdr.req.buf_lenh = 0;
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command.hdr.req.buf_lenl = 0;
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command.hdr.req.checksum = FW_DEFAULT_CHECKSUM;
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/* convert offset from words to bytes */
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command.address = 0;
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/* one word */
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command.length = 0;
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for (i = 0; i <= FW_CEM_MAX_RETRIES; i++) {
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err = ngbe_host_interface_command(hw, (u32 *)&command,
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sizeof(command),
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NGBE_HI_COMMAND_TIMEOUT, true);
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if (err)
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continue;
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command.hdr.rsp.ret_status &= 0x1F;
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if (command.hdr.rsp.ret_status !=
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FW_CEM_RESP_STATUS_SUCCESS)
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err = NGBE_ERR_HOST_INTERFACE_COMMAND;
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break;
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}
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if (!err && command.address != FW_CHECKSUM_CAP_ST_PASS)
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err = NGBE_ERR_EEPROM_CHECKSUM;
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return err;
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}
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s32 ngbe_phy_led_oem_chk(struct ngbe_hw *hw, u32 *data)
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{
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struct ngbe_hic_read_shadow_ram command;
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s32 err;
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int i;
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DEBUGFUNC("\n");
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command.hdr.req.cmd = FW_PHY_LED_CONF;
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command.hdr.req.buf_lenh = 0;
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command.hdr.req.buf_lenl = 0;
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command.hdr.req.checksum = FW_DEFAULT_CHECKSUM;
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/* convert offset from words to bytes */
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command.address = 0;
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/* one word */
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command.length = 0;
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for (i = 0; i <= FW_CEM_MAX_RETRIES; i++) {
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err = ngbe_host_interface_command(hw, (u32 *)&command,
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sizeof(command),
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NGBE_HI_COMMAND_TIMEOUT, true);
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if (err)
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continue;
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command.hdr.rsp.ret_status &= 0x1F;
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if (command.hdr.rsp.ret_status !=
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FW_CEM_RESP_STATUS_SUCCESS)
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err = NGBE_ERR_HOST_INTERFACE_COMMAND;
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break;
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}
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if (err)
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return err;
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if (command.address == FW_CHECKSUM_CAP_ST_PASS) {
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*data = ((u32 *)&command)[2];
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err = 0;
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} else if (command.address == FW_CHECKSUM_CAP_ST_FAIL) {
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*data = FW_CHECKSUM_CAP_ST_FAIL;
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err = -1;
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} else {
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err = NGBE_ERR_EEPROM_CHECKSUM;
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}
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return err;
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}
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