fc1f2750a3
The 1.7 DPDK_Prog_Guide document in MSWord has been converted to rst format for use with Sphinx. There is an rst file for each chapter and an index.rst file which contains the table of contents. The top level index file has been modified to include this guide. This document contains some png image files. If any of these png files are modified they should be replaced with an svg file. This is the sixth document from a set of 6 documents. Signed-off-by: Bernard Iremonger <bernard.iremonger@intel.com>
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200 lines
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.. BSD LICENSE
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Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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* Neither the name of Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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Glossary
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========
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=============== =========================================================================================================
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Term Definition
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=============== =========================================================================================================
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ACL Access Control List
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API Application Programming Interface
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ASLR Linux* kernel Address-Space Layout Randomization
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BSD Berkeley Software Distribution
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Clr Clear
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CIDR Classless Inter-Domain Routing
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Control Plane The control plane is concerned with the routing of packets and with providing a start or end point.
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Core A core may include several lcores or threads if the processor supports hyperthreading.
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Core Components A set of libraries provided by the Intel® DPDK, including eal, ring, mempool, mbuf, timers, and so on.
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CPU Central Processing Unit
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CRC Cyclic Redundancy Check
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ctrlmbuf An *mbuf* carrying control data.
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Data Plane In contrast to the control plane,
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the data plane in a network architecture are the layers involved when forwarding packets.
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These layers must be highly optimized to achieve good performance.
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DIMM Dual In-line Memory Module
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Doxygen A documentation generator used in the Intel® DPDK to generate the API reference.
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DPDK Data Plane Development Kit
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DRAM Dynamic Random Access Memory
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EAL The Environment Abstraction Layer (EAL) provides a generic interface that hides the environment specifics
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from the applications and libraries.
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The services expected from the EAL are:
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development kit loading and launching, core affinity/ assignment procedures,
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system memory allocation/description, PCI bus access, inter-partition communication.
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FIFO First In First Out
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FPGA Field Programmable Gate Array
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GbE Gigabit Ethernet
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HW Hardware
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HPET High Precision Event Timer;
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a hardware timer that provides a precise time reference on x86 platforms.
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ID Identifier
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IOCTL Input/Output Control
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I/O Input/Output
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IP Internet Protocol
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IPv4 Internet Protocol version 4
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IPv6 Internet Protocol version 6
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lcore A logical execution unit of the processor, sometimes called a *hardware thread*.
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KNI Kernel Network Interface
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L1 Layer 1
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L2 Layer 2
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L3 Layer 3
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L4 Layer 4
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LAN Local Area Network
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LPM Longest Prefix Match
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master lcore The execution unit that executes the main() function and that launches other lcores.
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mbuf An mbuf is a data structure used internally to carry messages (mainly network packets).
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The name is derived from BSD stacks.
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To understand the concepts of packet buffers or mbuf,
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refer to *TCP/IP Illustrated, Volume 2: The Implementation*.
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MESI Modified Exclusive Shared Invalid (CPU cache coherency protocol)
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MTU Maximum Transfer Unit
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NIC Network Interface Card
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OOO Out Of Order (execution of instructions within the CPU pipeline)
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NUMA Non-uniform Memory Access
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PCI Peripheral Connect Interface
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PHY An abbreviation for the physical layer of the OSI model.
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pktmbuf An *mbuf* carrying a network packet.
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PMD Poll Mode Driver
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QoS Quality of Service
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RCU Read-Copy-Update algorithm, an alternative to simple rwlocks.
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Rd Read
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RED Random Early Detection
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RSS Receive Side Scaling
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RTE Run Time Environment.
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Provides a fast and simple framework for fast packet processing,
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in a lightweight environment as a Linux* application and
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using Poll Mode Drivers (PMDs) to increase speed.
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Rx Reception
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Slave lcore Any *lcore* that is not the *master lcore*.
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Socket A physical CPU, that includes several *cores*.
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SLA Service Level Agreement
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srTCM Single Rate Three Color Marking
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SRTD Scheduler Round Trip Delay
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SW Software
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Target In the Intel® DPDK, the target is a combination of architecture,
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machine, executive environment and toolchain.
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For example: i686-native-linuxapp-gcc.
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TCP Transmission Control Protocol
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TC Traffic Class
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TLB Translation Lookaside Buffer
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TLS Thread Local Storage
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trTCM Two Rate Three Color Marking
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TSC Time Stamp Counter
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Tx Transmission
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TUN/TAP TUN and TAP are virtual network kernel devices.
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VLAN Virtual Local Area Network
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Wr Write
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WRED Weighted Random Early Detection
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WRR Weighted Round Robin
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=============== =========================================================================================================
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