2016-08-02 16:34:45 +00:00
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/*-
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* BSD LICENSE
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*
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* Copyright (c) Intel Corporation.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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2017-07-21 21:44:43 +00:00
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#include "spdk/crc32.h"
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2016-08-02 16:34:45 +00:00
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2019-01-28 20:07:17 +00:00
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#if defined(__aarch64__) || defined(__AARCH64__)
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#ifdef __ARM_FEATURE_CRC32
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#define SPDK_HAVE_ARM_CRC
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#include <arm_acle.h>
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#endif
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#endif
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#if defined(__x86_64__) && defined(__SSE4_2__)
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#ifdef SPDK_CONFIG_ISAL
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#define SPDK_HAVE_ISAL
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#include <isa-l/include/crc.h>
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#else
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#define SPDK_HAVE_SSE4_2
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#include <x86intrin.h>
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#endif
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#endif
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2019-01-21 09:05:59 +00:00
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#ifdef SPDK_HAVE_ISAL
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uint32_t
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spdk_crc32c_update(const void *buf, size_t len, uint32_t crc)
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{
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return crc32_iscsi((unsigned char *)buf, len, crc);
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}
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#elif defined(SPDK_HAVE_SSE4_2)
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2017-07-21 23:51:25 +00:00
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uint32_t
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spdk_crc32c_update(const void *buf, size_t len, uint32_t crc)
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{
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uint64_t crc_tmp64;
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size_t count;
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/* _mm_crc32_u64() needs a 64-bit intermediate value */
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crc_tmp64 = crc;
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/* Process as much of the buffer as possible in 64-bit blocks. */
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count = len / 8;
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while (count--) {
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uint64_t block;
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/*
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* Use memcpy() to avoid unaligned loads, which are undefined behavior in C.
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* The compiler will optimize out the memcpy() in release builds.
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*/
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memcpy(&block, buf, sizeof(block));
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crc_tmp64 = _mm_crc32_u64(crc_tmp64, block);
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buf += sizeof(block);
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}
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crc = (uint32_t)crc_tmp64;
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/* Handle any trailing bytes. */
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count = len & 7;
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while (count--) {
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crc = _mm_crc32_u8(crc, *(const uint8_t *)buf);
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buf++;
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}
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return crc;
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}
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2018-12-13 07:24:48 +00:00
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#elif defined(SPDK_HAVE_ARM_CRC)
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uint32_t
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spdk_crc32c_update(const void *buf, size_t len, uint32_t crc)
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{
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size_t count;
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count = len / 8;
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while (count--) {
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uint64_t block;
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memcpy(&block, buf, sizeof(block));
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crc = __crc32cd(crc, block);
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buf += sizeof(block);
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}
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count = len & 7;
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while (count--) {
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crc = __crc32cb(crc, *(const uint8_t *)buf);
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buf++;
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}
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return crc;
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}
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#else /* Neither SSE 4.2 nor ARM CRC32 instructions available */
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2017-07-21 23:51:25 +00:00
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2017-07-21 21:44:43 +00:00
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static struct spdk_crc32_table g_crc32c_table;
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2016-08-02 16:34:45 +00:00
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2017-07-21 21:44:43 +00:00
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__attribute__((constructor)) static void
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spdk_crc32c_init(void)
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{
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spdk_crc32_table_init(&g_crc32c_table, SPDK_CRC32C_POLYNOMIAL_REFLECT);
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}
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2016-08-02 16:34:45 +00:00
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2017-07-21 21:44:43 +00:00
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uint32_t
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spdk_crc32c_update(const void *buf, size_t len, uint32_t crc)
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{
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return spdk_crc32_update(&g_crc32c_table, buf, len, crc);
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}
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2017-07-21 23:51:25 +00:00
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#endif
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