2018-02-28 14:13:32 +00:00
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# Peer-2-Peer DMAs {#peer_2_peer}
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Please note that the functionality discussed in this document is
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currently tagged as experimental.
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# In this document {#p2p_toc}
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* @ref p2p_overview
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* @ref p2p_nvme_api
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* @ref p2p_cmb_copy
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* @ref p2p_issues
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# Overview {#p2p_overview}
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Peer-2-Peer (P2P) is the concept of DMAing data directly from one PCI
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End Point (EP) to another without using a system memory buffer. The
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most obvious example of this from an SPDK perspective is using a NVMe
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Controller Memory Buffer (CMB) to enable direct copies of data between
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two NVMe SSDs.
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In this section of documentation we outline how to perform P2P
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operations in SPDK and outline some of the issues that can occur when
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performing P2P operations.
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# The P2P API for NVMe {#p2p_nvme_api}
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The functions that provide access to the NVMe CMBs for P2P
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capabilities are given in the table below.
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Key Functions | Description
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------------------------------------------- | -----------
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2020-02-10 21:13:53 +00:00
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spdk_nvme_ctrlr_map_cmb() | @copybrief spdk_nvme_ctrlr_map_cmb()
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spdk_nvme_ctrlr_unmap_cmb() | @copybrief spdk_nvme_ctrlr_unmap_cmb()
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2019-01-29 22:15:04 +00:00
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spdk_nvme_ctrlr_get_regs_cmbsz() | @copybrief spdk_nvme_ctrlr_get_regs_cmbsz()
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# Determining device support {#p2p_support}
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SPDK's identify example application displays whether a device has a controller
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memory buffer and which operations it supports. Run it as follows:
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~~~{.sh}
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2020-05-11 22:02:01 +00:00
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./build/examples/identify -r traddr:<pci id of ssd>
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~~~
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# cmb_copy: An example P2P Application {#p2p_cmb_copy}
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Run the cmb_copy example application.
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~~~{.sh}
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2020-05-11 22:02:01 +00:00
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./build/examples/cmb_copy -r <pci id of write ssd>-1-0-1 -w <pci id of write ssd>-1-0-1 -c <pci id of the ssd with cmb>
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~~~
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This should copy a single LBA (LBA 0) from namespace 1 on the read
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NVMe SSD to LBA 0 on namespace 1 on the write SSD using the CMB as the
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DMA buffer.
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# Issues with P2P {#p2p_issues}
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* In some systems when performing peer-2-peer DMAs between PCIe EPs
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that are directly connected to the Root Complex (RC) the DMA may
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fail or the performance may not be great. Basically your milage may
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vary. It is recommended that you use a PCIe switch (such as those
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provided by Broadcom or Microsemi) as that is know to provide good
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performance.
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* Even with a PCIe switch there may be occasions where peer-2-peer
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2018-08-27 08:42:35 +00:00
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DMAs fail to work. This is probably due to PCIe Access Control
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Services (ACS) being enabled by the BIOS and/or OS. You can disable
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ACS using setpci or via out of tree kernel patches that can be found
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on the internet.
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* In more complex topologies involving several switches it may be
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possible to construct multiple paths between EPs. This could lead to
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TLP ordering problems. If you are working in these environments be
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careful!
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