2016-10-10 03:54:38 +00:00
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/*-
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* BSD LICENSE
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*
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2019-11-18 16:59:36 +00:00
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* Copyright (c) Intel Corporation. All rights reserved.
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* Copyright (c) 2019 Mellanox Technologies LTD. All rights reserved.
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2016-10-10 03:54:38 +00:00
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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2017-07-13 04:08:53 +00:00
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#ifndef SPDK_BDEV_NVME_H
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#define SPDK_BDEV_NVME_H
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2016-10-10 03:54:38 +00:00
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2017-05-02 18:18:25 +00:00
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#include "spdk/stdinc.h"
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2016-10-25 23:19:53 +00:00
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2018-05-29 01:45:52 +00:00
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#include "spdk/queue.h"
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2017-01-25 23:05:09 +00:00
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#include "spdk/nvme.h"
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2018-05-29 01:45:52 +00:00
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#include "spdk/bdev_module.h"
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2016-10-10 03:54:38 +00:00
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2021-09-07 16:13:07 +00:00
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TAILQ_HEAD(nvme_bdev_ctrlrs, nvme_bdev_ctrlr);
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extern struct nvme_bdev_ctrlrs g_nvme_bdev_ctrlrs;
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2021-08-30 18:30:18 +00:00
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extern pthread_mutex_t g_bdev_nvme_mutex;
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extern bool g_bdev_nvme_module_finish;
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#define NVME_MAX_CONTROLLERS 1024
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typedef void (*spdk_bdev_create_nvme_fn)(void *ctx, size_t bdev_count, int rc);
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struct nvme_async_probe_ctx {
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struct spdk_nvme_probe_ctx *probe_ctx;
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const char *base_name;
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const char **names;
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uint32_t count;
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uint32_t prchk_flags;
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struct spdk_poller *poller;
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struct spdk_nvme_transport_id trid;
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struct spdk_nvme_ctrlr_opts opts;
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spdk_bdev_create_nvme_fn cb_fn;
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void *cb_ctx;
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uint32_t populates_in_progress;
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bool ctrlr_attached;
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bool probe_done;
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bool namespaces_populated;
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};
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struct nvme_ns {
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2021-09-02 12:33:32 +00:00
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uint32_t id;
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struct spdk_nvme_ns *ns;
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struct nvme_ctrlr *ctrlr;
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struct nvme_bdev *bdev;
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uint32_t ana_group_id;
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enum spdk_nvme_ana_state ana_state;
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2021-10-18 22:01:30 +00:00
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bool ana_state_updating;
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2021-09-02 12:33:32 +00:00
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struct nvme_async_probe_ctx *probe_ctx;
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2021-09-27 23:15:02 +00:00
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TAILQ_ENTRY(nvme_ns) tailq;
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2021-08-25 16:58:16 +00:00
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RB_ENTRY(nvme_ns) node;
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2021-08-30 18:30:18 +00:00
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};
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struct nvme_bdev_io;
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2021-09-07 16:13:07 +00:00
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struct nvme_bdev_ctrlr;
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2021-09-27 23:15:02 +00:00
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struct nvme_bdev;
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2021-10-15 08:10:42 +00:00
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struct nvme_io_path;
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2021-08-30 18:30:18 +00:00
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2021-09-14 18:26:50 +00:00
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struct nvme_path_id {
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2021-08-30 18:30:18 +00:00
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struct spdk_nvme_transport_id trid;
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2021-10-11 20:35:39 +00:00
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struct spdk_nvme_host_id hostid;
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2021-09-14 18:26:50 +00:00
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TAILQ_ENTRY(nvme_path_id) link;
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2021-08-30 18:30:18 +00:00
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bool is_failed;
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};
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2021-10-08 04:14:54 +00:00
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typedef void (*bdev_nvme_reset_cb)(void *cb_arg, bool success);
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2021-08-30 18:30:18 +00:00
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struct nvme_ctrlr {
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/**
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* points to pinned, physically contiguous memory region;
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* contains 4KB IDENTIFY structure for controller which is
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* target for CONTROLLER IDENTIFY command during initialization
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*/
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struct spdk_nvme_ctrlr *ctrlr;
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2021-09-21 19:17:12 +00:00
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struct nvme_path_id *active_path_id;
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2021-08-30 18:30:18 +00:00
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int ref;
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2021-10-08 03:29:29 +00:00
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uint32_t resetting : 1;
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uint32_t failover_in_progress : 1;
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uint32_t destruct : 1;
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2021-09-16 05:24:37 +00:00
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uint32_t ana_log_page_updating : 1;
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2021-08-30 18:30:18 +00:00
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/**
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* PI check flags. This flags is set to NVMe controllers created only
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* through bdev_nvme_attach_controller RPC or .INI config file. Hot added
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* NVMe controllers are not included.
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*/
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uint32_t prchk_flags;
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2021-08-25 16:58:16 +00:00
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RB_HEAD(nvme_ns_tree, nvme_ns) namespaces;
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2021-08-30 18:30:18 +00:00
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struct spdk_opal_dev *opal_dev;
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struct spdk_poller *adminq_timer_poller;
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struct spdk_thread *thread;
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bdev_nvme_reset_cb reset_cb_fn;
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void *reset_cb_arg;
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struct spdk_nvme_ctrlr_reset_ctx *reset_ctx;
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2021-07-09 08:51:32 +00:00
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/* Poller used to check for reset/detach completion */
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struct spdk_poller *reset_detach_poller;
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struct spdk_nvme_detach_ctx *detach_ctx;
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2021-08-30 18:30:18 +00:00
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/** linked list pointer for device list */
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TAILQ_ENTRY(nvme_ctrlr) tailq;
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2021-09-07 16:13:07 +00:00
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struct nvme_bdev_ctrlr *nbdev_ctrlr;
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2021-08-30 18:30:18 +00:00
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2021-09-14 18:26:50 +00:00
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TAILQ_HEAD(nvme_paths, nvme_path_id) trids;
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2021-08-30 18:30:18 +00:00
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uint32_t ana_log_page_size;
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struct spdk_nvme_ana_page *ana_log_page;
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struct spdk_nvme_ana_group_descriptor *copied_ana_desc;
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struct nvme_async_probe_ctx *probe_ctx;
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pthread_mutex_t mutex;
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};
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2021-09-07 16:13:07 +00:00
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struct nvme_bdev_ctrlr {
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char *name;
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TAILQ_HEAD(, nvme_ctrlr) ctrlrs;
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2021-09-27 23:15:02 +00:00
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TAILQ_HEAD(, nvme_bdev) bdevs;
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2021-09-07 16:13:07 +00:00
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TAILQ_ENTRY(nvme_bdev_ctrlr) tailq;
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};
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2021-08-30 18:30:18 +00:00
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struct nvme_bdev {
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struct spdk_bdev disk;
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2021-09-27 23:15:02 +00:00
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uint32_t nsid;
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struct nvme_bdev_ctrlr *nbdev_ctrlr;
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pthread_mutex_t mutex;
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int ref;
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TAILQ_HEAD(, nvme_ns) nvme_ns_list;
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2021-08-30 18:30:18 +00:00
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bool opal;
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2021-09-27 23:15:02 +00:00
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TAILQ_ENTRY(nvme_bdev) tailq;
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2021-08-30 18:30:18 +00:00
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};
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struct nvme_ctrlr_channel {
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struct spdk_nvme_qpair *qpair;
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struct nvme_poll_group *group;
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TAILQ_HEAD(, spdk_bdev_io) pending_resets;
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2021-09-15 03:10:35 +00:00
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TAILQ_ENTRY(nvme_ctrlr_channel) tailq;
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2021-10-15 08:10:42 +00:00
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/* The following is used to update io_path cache of nvme_bdev_channels. */
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TAILQ_HEAD(, nvme_io_path) io_path_list;
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2021-08-30 18:30:18 +00:00
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};
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2021-08-11 08:11:19 +00:00
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#define nvme_ctrlr_channel_get_ctrlr(ctrlr_ch) \
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(struct nvme_ctrlr *)spdk_io_channel_get_io_device(spdk_io_channel_from_ctx(ctrlr_ch))
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2021-09-27 23:15:02 +00:00
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struct nvme_io_path {
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2021-08-30 18:30:18 +00:00
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struct nvme_ns *nvme_ns;
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struct nvme_ctrlr_channel *ctrlr_ch;
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2021-09-27 23:15:02 +00:00
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STAILQ_ENTRY(nvme_io_path) stailq;
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2021-10-15 08:10:42 +00:00
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/* The following are used to update io_path cache of the nvme_bdev_channel. */
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struct nvme_bdev_channel *nbdev_ch;
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TAILQ_ENTRY(nvme_io_path) tailq;
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2021-09-27 23:15:02 +00:00
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};
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struct nvme_bdev_channel {
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2021-10-15 10:28:09 +00:00
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struct nvme_io_path *current_io_path;
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2021-10-07 22:11:17 +00:00
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STAILQ_HEAD(, nvme_io_path) io_path_list;
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TAILQ_HEAD(retry_io_head, spdk_bdev_io) retry_io_list;
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struct spdk_poller *retry_io_poller;
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2021-08-30 18:30:18 +00:00
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};
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2021-09-15 03:10:35 +00:00
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struct nvme_poll_group {
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struct spdk_nvme_poll_group *group;
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struct spdk_io_channel *accel_channel;
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struct spdk_poller *poller;
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bool collect_spin_stat;
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uint64_t spin_ticks;
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uint64_t start_ticks;
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uint64_t end_ticks;
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TAILQ_HEAD(, nvme_ctrlr_channel) ctrlr_ch_list;
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};
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2021-08-30 18:30:18 +00:00
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struct nvme_ctrlr *nvme_ctrlr_get_by_name(const char *name);
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2021-11-10 02:05:00 +00:00
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struct nvme_bdev_ctrlr *nvme_bdev_ctrlr_get_by_name(const char *name);
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2021-08-30 18:30:18 +00:00
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2021-11-10 02:05:00 +00:00
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typedef void (*nvme_bdev_ctrlr_for_each_fn)(struct nvme_bdev_ctrlr *nbdev_ctrlr, void *ctx);
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void nvme_bdev_ctrlr_for_each(nvme_bdev_ctrlr_for_each_fn fn, void *ctx);
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2021-08-30 18:30:18 +00:00
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void nvme_bdev_dump_trid_json(const struct spdk_nvme_transport_id *trid,
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struct spdk_json_write_ctx *w);
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struct nvme_ns *nvme_ctrlr_get_ns(struct nvme_ctrlr *nvme_ctrlr, uint32_t nsid);
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struct nvme_ns *nvme_ctrlr_get_first_active_ns(struct nvme_ctrlr *nvme_ctrlr);
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struct nvme_ns *nvme_ctrlr_get_next_active_ns(struct nvme_ctrlr *nvme_ctrlr, struct nvme_ns *ns);
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2019-09-13 09:45:53 +00:00
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2018-07-09 21:04:33 +00:00
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enum spdk_bdev_timeout_action {
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SPDK_BDEV_NVME_TIMEOUT_ACTION_NONE = 0,
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SPDK_BDEV_NVME_TIMEOUT_ACTION_RESET,
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SPDK_BDEV_NVME_TIMEOUT_ACTION_ABORT,
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};
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struct spdk_bdev_nvme_opts {
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enum spdk_bdev_timeout_action action_on_timeout;
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uint64_t timeout_us;
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2021-05-26 20:43:22 +00:00
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uint64_t timeout_admin_us;
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2020-11-27 16:10:36 +00:00
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uint32_t keep_alive_timeout_ms;
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2021-10-18 19:33:01 +00:00
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/* The number of attempts per I/O in the transport layer before an I/O fails. */
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uint32_t transport_retry_count;
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2019-09-03 03:48:49 +00:00
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uint32_t arbitration_burst;
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uint32_t low_priority_weight;
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uint32_t medium_priority_weight;
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uint32_t high_priority_weight;
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2018-07-09 21:04:33 +00:00
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uint64_t nvme_adminq_poll_period_us;
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2019-03-11 22:26:53 +00:00
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uint64_t nvme_ioq_poll_period_us;
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2019-07-10 05:13:31 +00:00
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uint32_t io_queue_requests;
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2019-11-18 16:59:36 +00:00
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bool delay_cmd_submit;
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2021-10-25 02:59:46 +00:00
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/* The number of attempts per I/O in the bdev layer before an I/O fails. */
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int32_t bdev_retry_count;
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2018-07-09 21:04:33 +00:00
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};
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2021-07-07 01:02:14 +00:00
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struct spdk_nvme_qpair *bdev_nvme_get_io_qpair(struct spdk_io_channel *ctrlr_io_ch);
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2020-05-10 07:46:07 +00:00
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void bdev_nvme_get_opts(struct spdk_bdev_nvme_opts *opts);
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int bdev_nvme_set_opts(const struct spdk_bdev_nvme_opts *opts);
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int bdev_nvme_set_hotplug(bool enabled, uint64_t period_us, spdk_msg_fn cb, void *cb_ctx);
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2018-07-09 21:04:33 +00:00
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2020-05-10 07:46:07 +00:00
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int bdev_nvme_create(struct spdk_nvme_transport_id *trid,
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const char *base_name,
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const char **names,
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uint32_t count,
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uint32_t prchk_flags,
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spdk_bdev_create_nvme_fn cb_fn,
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2021-01-21 11:53:16 +00:00
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void *cb_ctx,
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2021-09-07 16:13:07 +00:00
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struct spdk_nvme_ctrlr_opts *opts,
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bool multipath);
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2020-05-10 07:46:07 +00:00
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struct spdk_nvme_ctrlr *bdev_nvme_get_ctrlr(struct spdk_bdev *bdev);
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2016-10-10 03:54:38 +00:00
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2018-07-26 12:54:20 +00:00
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/**
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2021-03-03 16:32:54 +00:00
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* Delete NVMe controller with all bdevs on top of it, or delete the specified path
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* if there is any alternative path. Requires to pass name of NVMe controller.
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2018-07-26 12:54:20 +00:00
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*
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* \param name NVMe controller name
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2021-10-11 19:29:36 +00:00
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* \param path_id The specified path to remove (optional)
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2018-07-26 12:54:20 +00:00
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* \return zero on success, -EINVAL on wrong parameters or -ENODEV if controller is not found
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*/
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2021-10-11 19:29:36 +00:00
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int bdev_nvme_delete(const char *name, const struct nvme_path_id *path_id);
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2018-07-26 12:54:20 +00:00
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2021-06-16 17:24:56 +00:00
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/**
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* Reset NVMe controller.
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*
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* \param nvme_ctrlr The specified NVMe controller to reset
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* \param cb_fn Function to be called back after reset completes
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* \param cb_arg Argument for callback function
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* \return zero on success. Negated errno on the following error conditions:
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2021-07-20 15:36:17 +00:00
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* -ENXIO: controller is being destroyed.
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* -EBUSY: controller is already being reset.
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2021-06-16 17:24:56 +00:00
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*/
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int bdev_nvme_reset_rpc(struct nvme_ctrlr *nvme_ctrlr, bdev_nvme_reset_cb cb_fn, void *cb_arg);
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2018-10-29 02:45:42 +00:00
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#endif /* SPDK_BDEV_NVME_H */
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