nvme/rdma: Limit max_sges by command capsule size
According to NVMe over Fabrics spec number of SGLs supported by the controller is reported in MSDBD. But it is also implicitly limited by command capsule size (IOCCSZ) since SGL are passed in capsule. This patch adjusts max_sges to capsule size if required. Adjustment to MSDBD is also moved to transport layer because it is fabrics specific parameter and is not valid for PCIe transport. Signed-off-by: Evgeniy Kochetov <evgeniik@nvidia.com> Change-Id: I44918eb949345c61242ca50a524d21d04b6ac058 Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/11669 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Community-CI: Broadcom CI <spdk-ci.pdl@broadcom.com> Community-CI: Mellanox Build Bot Reviewed-by: Aleksey Marchuk <alexeymar@mellanox.com> Reviewed-by: Shuhei Matsumoto <smatsumoto@nvidia.com> Reviewed-by: Jim Harris <james.r.harris@intel.com>
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@ -1986,16 +1986,8 @@ nvme_ctrlr_identify_done(void *arg, const struct spdk_nvme_cpl *cpl)
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if (ctrlr->cdata.sgls.supported == 0x2) {
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ctrlr->flags |= SPDK_NVME_CTRLR_SGL_REQUIRES_DWORD_ALIGNMENT;
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}
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/*
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* Use MSDBD to ensure our max_sges doesn't exceed what the
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* controller supports.
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*/
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ctrlr->max_sges = nvme_transport_ctrlr_get_max_sges(ctrlr);
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if (ctrlr->cdata.nvmf_specific.msdbd != 0) {
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ctrlr->max_sges = spdk_min(ctrlr->cdata.nvmf_specific.msdbd, ctrlr->max_sges);
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} else {
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/* A value 0 indicates no limit. */
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}
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NVME_CTRLR_DEBUGLOG(ctrlr, "transport max_sges %u\n", ctrlr->max_sges);
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}
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@ -2434,8 +2434,21 @@ static uint16_t
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nvme_rdma_ctrlr_get_max_sges(struct spdk_nvme_ctrlr *ctrlr)
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{
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struct nvme_rdma_ctrlr *rctrlr = nvme_rdma_ctrlr(ctrlr);
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uint32_t max_sge = rctrlr->max_sge;
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uint32_t max_in_capsule_sge = (ctrlr->cdata.nvmf_specific.ioccsz * 16 -
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sizeof(struct spdk_nvme_cmd)) /
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sizeof(struct spdk_nvme_sgl_descriptor);
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return rctrlr->max_sge;
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/* Max SGE is limited by capsule size */
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max_sge = spdk_min(max_sge, max_in_capsule_sge);
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/* Max SGE may be limited by MSDBD */
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if (ctrlr->cdata.nvmf_specific.msdbd != 0) {
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max_sge = spdk_min(max_sge, ctrlr->cdata.nvmf_specific.msdbd);
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}
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/* Max SGE can't be less than 1 */
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max_sge = spdk_max(1, max_sge);
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return max_sge;
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}
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static int
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@ -1370,6 +1370,34 @@ test_nvme_rdma_poll_group_get_qpair_by_id(void)
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STAILQ_REMOVE_HEAD(&group.destroyed_qpairs, link);
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}
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static void
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test_nvme_rdma_ctrlr_get_max_sges(void)
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{
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struct nvme_rdma_ctrlr rctrlr = {};
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rctrlr.ctrlr.trid.trtype = SPDK_NVME_TRANSPORT_RDMA;
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rctrlr.max_sge = NVME_RDMA_MAX_SGL_DESCRIPTORS;
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rctrlr.ctrlr.cdata.nvmf_specific.msdbd = 16;
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rctrlr.ctrlr.cdata.nvmf_specific.ioccsz = 4096;
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CU_ASSERT(nvme_rdma_ctrlr_get_max_sges(&rctrlr.ctrlr) == 16);
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rctrlr.ctrlr.cdata.nvmf_specific.msdbd = 32;
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rctrlr.ctrlr.cdata.nvmf_specific.ioccsz = 4096;
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CU_ASSERT(nvme_rdma_ctrlr_get_max_sges(&rctrlr.ctrlr) == 16);
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rctrlr.ctrlr.cdata.nvmf_specific.msdbd = 8;
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rctrlr.ctrlr.cdata.nvmf_specific.ioccsz = 4096;
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CU_ASSERT(nvme_rdma_ctrlr_get_max_sges(&rctrlr.ctrlr) == 8);
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rctrlr.ctrlr.cdata.nvmf_specific.msdbd = 16;
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rctrlr.ctrlr.cdata.nvmf_specific.ioccsz = 4;
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CU_ASSERT(nvme_rdma_ctrlr_get_max_sges(&rctrlr.ctrlr) == 1);
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rctrlr.ctrlr.cdata.nvmf_specific.msdbd = 16;
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rctrlr.ctrlr.cdata.nvmf_specific.ioccsz = 6;
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CU_ASSERT(nvme_rdma_ctrlr_get_max_sges(&rctrlr.ctrlr) == 2);
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}
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int main(int argc, char **argv)
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{
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CU_pSuite suite = NULL;
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@ -1402,6 +1430,7 @@ int main(int argc, char **argv)
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CU_ADD_TEST(suite, test_rdma_ctrlr_get_memory_domains);
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CU_ADD_TEST(suite, test_rdma_get_memory_translation);
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CU_ADD_TEST(suite, test_nvme_rdma_poll_group_get_qpair_by_id);
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CU_ADD_TEST(suite, test_nvme_rdma_ctrlr_get_max_sges);
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CU_basic_set_mode(CU_BRM_VERBOSE);
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CU_basic_run_tests();
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