nvme: Add qpair option to batch command submissions
Avoid ringing the submission queue doorbell until the call to spdk_nvme_qpair_process_completions(). Change-Id: I7b3cd952e5ec79109eaa1c3a50f6537d7aaea51a Signed-off-by: Ben Walker <benjamin.walker@intel.com> Reviewed-on: https://review.gerrithub.io/c/spdk/spdk/+/447239 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com> Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
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@ -728,6 +728,17 @@ struct spdk_nvme_io_qpair_opts {
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* compatibility requirements, or driver-assisted striping.
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*/
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uint32_t io_queue_requests;
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/**
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* When submitting I/O via spdk_nvme_ns_read/write and similar functions,
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* don't immediately write the submission queue doorbell. Instead, write
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* to the doorbell as necessary inside spdk_nvme_qpair_process_completions().
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*
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* This results in better batching of I/O submission and consequently fewer
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* MMIO writes to the doorbell, which may increase performance.
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*
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* This only applies to local PCIe devices. */
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bool delay_pcie_doorbell;
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};
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/**
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@ -213,6 +213,10 @@ spdk_nvme_ctrlr_get_default_io_qpair_opts(struct spdk_nvme_ctrlr *ctrlr,
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opts->io_queue_requests = ctrlr->opts.io_queue_requests;
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}
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if (FIELD_OK(delay_pcie_doorbell)) {
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opts->delay_pcie_doorbell = false;
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}
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#undef FIELD_OK
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}
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@ -172,6 +172,7 @@ struct nvme_pcie_qpair {
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uint16_t max_completions_cap;
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uint16_t last_sq_tail;
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uint16_t sq_tail;
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uint16_t cq_head;
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uint16_t sq_head;
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@ -180,6 +181,8 @@ struct nvme_pcie_qpair {
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bool is_enabled;
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bool delay_pcie_doorbell;
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/*
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* Base qpair structure.
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* This is located after the hot data in this structure so that the important parts of
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@ -674,6 +677,7 @@ nvme_pcie_ctrlr_construct_admin_qpair(struct spdk_nvme_ctrlr *ctrlr)
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}
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pqpair->num_entries = NVME_ADMIN_ENTRIES;
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pqpair->delay_pcie_doorbell = false;
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ctrlr->adminq = &pqpair->qpair;
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@ -941,7 +945,7 @@ nvme_pcie_qpair_reset(struct spdk_nvme_qpair *qpair)
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{
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struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
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pqpair->sq_tail = pqpair->cq_head = 0;
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pqpair->last_sq_tail = pqpair->sq_tail = pqpair->cq_head = 0;
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/*
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* First time through the completion queue, HW will set phase
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@ -1212,7 +1216,9 @@ nvme_pcie_qpair_submit_tracker(struct spdk_nvme_qpair *qpair, struct nvme_tracke
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SPDK_ERRLOG("sq_tail is passing sq_head!\n");
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}
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nvme_pcie_qpair_ring_sq_doorbell(qpair);
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if (!pqpair->delay_pcie_doorbell) {
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nvme_pcie_qpair_ring_sq_doorbell(qpair);
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}
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}
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static void
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@ -1588,6 +1594,7 @@ nvme_pcie_ctrlr_create_io_qpair(struct spdk_nvme_ctrlr *ctrlr, uint16_t qid,
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}
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pqpair->num_entries = opts->io_queue_size;
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pqpair->delay_pcie_doorbell = opts->delay_pcie_doorbell;
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qpair = &pqpair->qpair;
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@ -2125,6 +2132,13 @@ nvme_pcie_qpair_process_completions(struct spdk_nvme_qpair *qpair, uint32_t max_
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}
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}
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if (pqpair->delay_pcie_doorbell) {
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if (pqpair->last_sq_tail != pqpair->sq_tail) {
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nvme_pcie_qpair_ring_sq_doorbell(qpair);
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pqpair->last_sq_tail = pqpair->sq_tail;
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}
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}
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if (spdk_unlikely(ctrlr->timeout_enabled)) {
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/*
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* User registered for timeout callback
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