fio_plugin: Use the new DIF library in FIO plugin
Apply the new DIF library to DIF generation and verification. Condition to use DIF generation and verification are changed only about DIF type. DIF type 3 is supported in this patch. DIX is not supported in this patch. The case that PI is located to the first 8 bytes of the metadata is not supported in this patch too to because how to pass PI location is not fixed yet. But this limitation will not be critical because PI is located to the last 8 bytes of the metadata by default. DIF insertion and strip will be required not to destroy data by DIF generation. But this is still added in the TODO list even after this patch. Change-Id: If08bcaaaa9f4e0fb4f373ef844b88b38cfffc6b5 Signed-off-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com> Reviewed-on: https://review.gerrithub.io/c/441283 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com> Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
This commit is contained in:
Shuhei Matsumoto
Darek Stojaczyk
parent
fa92414ce4
commit
6e769bec2c
@ -38,7 +38,7 @@
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#include "spdk/string.h"
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#include "spdk/log.h"
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#include "spdk/endian.h"
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#include "spdk/crc16.h"
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#include "spdk/dif.h"
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#include "config-host.h"
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#include "fio.h"
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@ -66,11 +66,10 @@ struct spdk_fio_options {
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struct spdk_fio_request {
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struct io_u *io;
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/** Offset in current iovec, fio only uses 1 vector */
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uint32_t iov_offset;
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uint32_t iov_offset;
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/** Application tag and its mask for NVMe PI */
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uint16_t appmask;
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uint16_t apptag;
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/** Context for NVMe PI */
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struct spdk_dif_ctx dif_ctx;
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struct spdk_fio_thread *fio_thread;
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};
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@ -219,12 +218,6 @@ fio_do_nvme_pi_check(struct spdk_fio_qpair *fio_qpair)
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return false;
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}
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/* Type3 don't support REFTAG */
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if (spdk_nvme_ns_get_pi_type(ns) ==
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SPDK_NVME_FMT_NVM_PROTECTION_TYPE3) {
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return false;
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}
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return true;
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}
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@ -537,104 +530,61 @@ static void spdk_fio_io_u_free(struct thread_data *td, struct io_u *io_u)
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static void
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fio_extended_lba_setup_pi(struct spdk_fio_qpair *fio_qpair, struct io_u *io_u)
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{
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struct spdk_nvme_ns *ns = NULL;
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struct spdk_nvme_ns *ns = fio_qpair->ns;
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struct spdk_fio_request *fio_req = io_u->engine_data;
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struct spdk_nvme_protection_info *pi;
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uint16_t crc16;
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uint32_t i, md_size, sector_size, pi_offset, extended_lba_size, lba_count;
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uint32_t md_size, extended_lba_size, lba_count;
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uint64_t lba;
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struct iovec iov;
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int rc;
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ns = fio_qpair->ns;
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sector_size = spdk_nvme_ns_get_sector_size(ns);
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extended_lba_size = spdk_nvme_ns_get_extended_sector_size(ns);
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md_size = spdk_nvme_ns_get_md_size(ns);
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extended_lba_size = sector_size + md_size;
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lba = io_u->offset / extended_lba_size;
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lba_count = io_u->xfer_buflen / extended_lba_size;
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if (fio_qpair->io_flags & SPDK_NVME_IO_FLAGS_PRCHK_APPTAG) {
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/* Let's use number of lbas for application tag */
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fio_req->appmask = 0xffff;
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fio_req->apptag = FIO_NVME_PI_APPTAG;
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rc = spdk_dif_ctx_init(&fio_req->dif_ctx, extended_lba_size, md_size,
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true, false,
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(enum spdk_dif_type)spdk_nvme_ns_get_pi_type(ns),
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fio_qpair->io_flags, lba, 0xFFFF, FIO_NVME_PI_APPTAG);
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if (rc != 0) {
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fprintf(stderr, "Initialization of DIF context failed\n");
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return;
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}
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for (i = 0; i < lba_count; i++) {
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pi_offset = (extended_lba_size * (i + 1)) - 8;
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pi = (struct spdk_nvme_protection_info *)(io_u->buf + pi_offset);
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memset(pi, 0, sizeof(*pi));
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if (io_u->ddir != DDIR_WRITE) {
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return;
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}
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if (io_u->ddir == DDIR_WRITE) {
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if (fio_qpair->io_flags & SPDK_NVME_IO_FLAGS_PRCHK_GUARD) {
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/* CRC buffer should not include PI */
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crc16 = spdk_crc16_t10dif(0, io_u->buf + extended_lba_size * i,
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extended_lba_size - 8);
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to_be16(&pi->guard, crc16);
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}
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if (fio_qpair->io_flags & SPDK_NVME_IO_FLAGS_PRCHK_APPTAG) {
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/* Let's use number of lbas for application tag */
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to_be16(&pi->app_tag, FIO_NVME_PI_APPTAG);
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}
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if (fio_qpair->io_flags & SPDK_NVME_IO_FLAGS_PRCHK_REFTAG) {
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to_be32(&pi->ref_tag, (uint32_t)lba + i);
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}
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}
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iov.iov_base = io_u->buf;
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iov.iov_len = io_u->xfer_buflen;
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rc = spdk_dif_generate(&iov, 1, lba_count, &fio_req->dif_ctx);
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if (rc != 0) {
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fprintf(stderr, "Generation of DIF failed\n");
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}
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}
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static void
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fio_extended_lba_verify_pi(struct spdk_fio_qpair *fio_qpair, struct io_u *io_u)
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{
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struct spdk_nvme_ns *ns = NULL;
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struct spdk_nvme_protection_info *pi;
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uint16_t crc16, guard, app_tag;
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uint32_t i, md_size, sector_size, pi_offset, extended_lba_size, ref_tag, lba_count;
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uint64_t lba;
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struct spdk_nvme_ns *ns = fio_qpair->ns;
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struct spdk_fio_request *fio_req = io_u->engine_data;
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uint32_t lba_count;
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struct iovec iov;
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struct spdk_dif_error err_blk = {};
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int rc;
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ns = fio_qpair->ns;
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sector_size = spdk_nvme_ns_get_sector_size(ns);
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md_size = spdk_nvme_ns_get_md_size(ns);
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extended_lba_size = sector_size + md_size;
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lba = io_u->offset / extended_lba_size;
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lba_count = io_u->xfer_buflen / extended_lba_size;
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if (io_u->ddir != DDIR_READ) {
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return;
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}
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for (i = 0; i < lba_count; i++) {
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pi_offset = (extended_lba_size * (i + 1)) - 8;
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pi = (struct spdk_nvme_protection_info *)(io_u->buf + pi_offset);
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iov.iov_base = io_u->buf;
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iov.iov_len = io_u->xfer_buflen;
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lba_count = io_u->xfer_buflen / spdk_nvme_ns_get_extended_sector_size(ns);
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if (fio_qpair->io_flags & SPDK_NVME_IO_FLAGS_PRCHK_GUARD) {
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/* CRC buffer should not include last 8 bytes of PI */
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crc16 = spdk_crc16_t10dif(0, io_u->buf + extended_lba_size * i,
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extended_lba_size - 8);
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to_be16(&guard, crc16);
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if (pi->guard != guard) {
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fprintf(stdout, "Get Guard Error LBA 0x%16.16"PRIx64","
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" Expected 0x%04x but returned with 0x%04x,"
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" may read the LBA without write it first\n",
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lba + i, guard, pi->guard);
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}
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}
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if (fio_qpair->io_flags & SPDK_NVME_IO_FLAGS_PRCHK_APPTAG) {
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/* Previously we used the number of lbas as
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* application tag for writes
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*/
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to_be16(&app_tag, FIO_NVME_PI_APPTAG);
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if (pi->app_tag != app_tag) {
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fprintf(stdout, "Get Application Tag Error LBA 0x%16.16"PRIx64","
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" Expected 0x%04x but returned with 0x%04x,"
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" may read the LBA without write it first\n",
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lba + i, app_tag, pi->app_tag);
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}
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}
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if (fio_qpair->io_flags & SPDK_NVME_IO_FLAGS_PRCHK_REFTAG) {
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to_be32(&ref_tag, (uint32_t)lba + i);
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if (pi->ref_tag != ref_tag) {
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fprintf(stdout, "Get Reference Tag Error LBA 0x%16.16"PRIx64","
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" Expected 0x%08x but returned with 0x%08x,"
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" may read the LBA without write it first\n",
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lba + i, ref_tag, pi->ref_tag);
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}
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}
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rc = spdk_dif_verify(&iov, 1, lba_count, &fio_req->dif_ctx, &err_blk);
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if (rc != 0) {
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fprintf(stderr, "DIF error detected. type=%d, offset=%" PRIu32 "\n",
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err_blk.err_type, err_blk.err_offset);
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}
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}
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@ -691,6 +641,7 @@ spdk_fio_queue(struct thread_data *td, struct io_u *io_u)
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struct spdk_fio_request *fio_req = io_u->engine_data;
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struct spdk_fio_qpair *fio_qpair;
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struct spdk_nvme_ns *ns = NULL;
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struct spdk_dif_ctx *dif_ctx = &fio_req->dif_ctx;
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uint32_t block_size;
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uint64_t lba;
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uint32_t lba_count;
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@ -723,24 +674,24 @@ spdk_fio_queue(struct thread_data *td, struct io_u *io_u)
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if (!g_spdk_enable_sgl) {
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rc = spdk_nvme_ns_cmd_read_with_md(ns, fio_qpair->qpair, io_u->buf, NULL, lba, lba_count,
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spdk_fio_completion_cb, fio_req,
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fio_qpair->io_flags, fio_req->appmask, fio_req->apptag);
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dif_ctx->dif_flags, dif_ctx->apptag_mask, dif_ctx->app_tag);
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} else {
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rc = spdk_nvme_ns_cmd_readv_with_md(ns, fio_qpair->qpair, lba,
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lba_count, spdk_fio_completion_cb, fio_req, fio_qpair->io_flags,
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lba_count, spdk_fio_completion_cb, fio_req, dif_ctx->dif_flags,
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spdk_nvme_io_reset_sgl, spdk_nvme_io_next_sge, NULL,
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fio_req->appmask, fio_req->apptag);
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dif_ctx->apptag_mask, dif_ctx->app_tag);
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}
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break;
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case DDIR_WRITE:
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if (!g_spdk_enable_sgl) {
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rc = spdk_nvme_ns_cmd_write_with_md(ns, fio_qpair->qpair, io_u->buf, NULL, lba, lba_count,
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spdk_fio_completion_cb, fio_req,
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fio_qpair->io_flags, fio_req->appmask, fio_req->apptag);
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dif_ctx->dif_flags, dif_ctx->apptag_mask, dif_ctx->app_tag);
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} else {
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rc = spdk_nvme_ns_cmd_writev_with_md(ns, fio_qpair->qpair, lba,
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lba_count, spdk_fio_completion_cb, fio_req, fio_qpair->io_flags,
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lba_count, spdk_fio_completion_cb, fio_req, dif_ctx->dif_flags,
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spdk_nvme_io_reset_sgl, spdk_nvme_io_next_sge, NULL,
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fio_req->appmask, fio_req->apptag);
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dif_ctx->apptag_mask, dif_ctx->app_tag);
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}
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break;
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default:
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