nvme: improve comment for nvme_pcie_ctrlr_get_max_xfer_size
NVME_MAX_PRP_LIST_ENTRIES has changed over time, so let's just remove the reference to the exact value here. Also explain a bit more why the max size isn't (NUM_ENTRIES + 1) * page_size. While here, do a small whitespace cleanup as well. Signed-off-by: Jim Harris <james.r.harris@intel.com> Change-Id: Ib75813788abdd3dbb43192f9fdc27f99b33aeadf Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/7328 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Changpeng Liu <changpeng.liu@intel.com> Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com> Reviewed-by: Aleksey Marchuk <alexeymar@mellanox.com>
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@ -271,15 +271,19 @@ nvme_pcie_ctrlr_get_cmbsz(struct nvme_pcie_ctrlr *pctrlr, union spdk_nvme_cmbsz_
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&cmbsz->raw);
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}
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static uint32_t
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static uint32_t
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nvme_pcie_ctrlr_get_max_xfer_size(struct spdk_nvme_ctrlr *ctrlr)
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{
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/*
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* For commands requiring more than 2 PRP entries, one PRP will be
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* embedded in the command (prp1), and the rest of the PRP entries
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* will be in a list pointed to by the command (prp2). This means
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* that real max number of PRP entries we support is 506+1, which
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* results in a max xfer size of 506*ctrlr->page_size.
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* will be in a list pointed to by the command (prp2). The number
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* of PRP entries in the list is defined by
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* NVME_MAX_PRP_LIST_ENTRIES.
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*
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* Note that the max xfer size is not (MAX_ENTRIES + 1) * page_size
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* because the first PRP entry may not be aligned on a 4KiB
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* boundary.
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*/
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return NVME_MAX_PRP_LIST_ENTRIES * ctrlr->page_size;
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}
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