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nvme/pcie: Don't store cmb.end

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This isn't actually necessary.

Change-Id: Ic229b44f4eaf628a468fa8c2fa526162e426ec57
Signed-off-by: Ben Walker <benjamin.walker@intel.com>
Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/789
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com>
Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
Reviewed-by: Darek Stojaczyk <dariusz.stojaczyk@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
This commit is contained in:
Ben Walker 2020-02-11 11:11:45 -07:00 committed by Tomasz Zawadzki
parent 9ad044c464
commit d3f661cfd7
1 changed files with 0 additions and 4 deletions
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4
lib/nvme/nvme_pcie.c
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@ -87,9 +87,6 @@ struct nvme_pcie_ctrlr {
/* Current offset of controller memory buffer, relative to start of BAR virt addr */
uint64_t current_offset;
/* Last valid offset into CMB, this differs if CMB memory registration occurs or not */
uint64_t end;
void *mem_register_addr;
size_t mem_register_size;
} cmb;
@ -520,7 +517,6 @@ nvme_pcie_ctrlr_map_cmb(struct nvme_pcie_ctrlr *pctrlr)
pctrlr->cmb.bar_pa = bar_phys_addr;
pctrlr->cmb.size = size;
pctrlr->cmb.current_offset = offset;
pctrlr->cmb.end = offset + size;
if (!cmbsz.bits.sqs) {
pctrlr->ctrlr.opts.use_cmb_sqs = false;