Commit Graph

6 Commits

Author SHA1 Message Date
ChengqiangMeng
1c3bc9d64d rdma/common.c: Fix possible memory leaks
Signed-off-by: ChengqiangMeng <chengqiangx.meng@intel.com>
Change-Id: I134f3ca3dfb0c747b0ca8544068961a53470106f
Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/7262
Reviewed-by: <dongx.yi@intel.com>
Reviewed-by: <qun.wan@intel.com>
Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
Reviewed-by: Aleksey Marchuk <alexeymar@mellanox.com>
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
Community-CI: Mellanox Build Bot
2021-04-12 09:44:41 +00:00
Alexey Marchuk
1eae58ff6d rdma: Add statistics per qpair
These statistics can help to estimate efficiency of
Work Requests batching and show busy/idle polls ratio.

Send: the doorbell updates statistics for verbs
provider are incremented per each ibv_post_send call,
for mlx5_dv per each ibv_wr_complete call.

Recv: the doorbell updates statistics for both
providers are updated when either ibv_post_recv
or ibv_post_srq_recv functions are called.

Each qpair on initialization accepts an optional
pointer to shared statistics (nvmf/nvme poll groups).
If the pointer to statistics is not provided then
qpair allocates its own structure. That is done
to support cases when NVME RDMA initiator doesn't
use poll groups, so we can avoid checks that qpair
has statistics in IO path

Change-Id: I07dea603cb870b85ea23c42e8e2c4520b1c66252
Signed-off-by: Alexey Marchuk <alexeymar@mellanox.com>
Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/6293
Community-CI: Broadcom CI
Community-CI: Mellanox Build Bot
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
2021-03-01 10:17:13 +00:00
Alexey Marchuk
9451030761 rdma: Add functions to queue and flush recv WRs
Change-Id: I77e286efd48330fcb6c1c85d1515656e49587983
Signed-off-by: Alexey Marchuk <alexeymar@mellanox.com>
Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/6290
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com>
Community-CI: Mellanox Build Bot
2021-02-22 10:05:27 +00:00
Alexey Marchuk
27d8fd9f4c rdma: Add functions to work with SRQ
Add 4 new functions to create/delete SRQ, queue and flush
recv Work Requests.

Change-Id: I55401d22724cf1ce24f2cca588f2bd1384cdbcd0
Signed-off-by: Alexey Marchuk <alexeymar@mellanox.com>
Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/6289
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
Community-CI: Mellanox Build Bot
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
2021-02-17 10:19:28 +00:00
Alexey Marchuk
3289ab6d93 rdma: Remove check for translation length
With min supported DPDK >= 19.11 there is no need
to check that the buffer can be split over
several Memory Regions so we can remove this check.
Keep assert that translation length is not less than
request as a sanity check.

Change-Id: If61e673ecde28bbda8eb57a2768085715bed141a
Signed-off-by: Alexey Marchuk <alexeymar@mellanox.com>
Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/5938
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
Community-CI: Mellanox Build Bot
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com>
2021-01-18 13:02:20 +00:00
Alexey Marchuk
7fabdd12b6 rdma: Add functions to support memory translation
This is the first commit in a series which aim is to
unify MRs registration and memory translation in
NVMEoF target and NVME initiator RDMA transports.

Next patches will add usage of new functions in
RDMA transports.

Change-Id: I93153d497fc4554ced14edbe545961b78bda91e3
Signed-off-by: Alexey Marchuk <alexeymar@mellanox.com>
Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/5121
Community-CI: Broadcom CI
Community-CI: Mellanox Build Bot
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com>
2021-01-14 16:19:48 +00:00