Because ppc64 has less strict memory ordering behaviour
than x86 we need to introduce a memory barrier when
polling for completions due to possible reordering
of tracker and cpl access.
Change-Id: Id17116c38b2ba69154c175c539fc97c60897deb0
Signed-off-by: Jonas Pfefferle <jpf@zurich.ibm.com>
Reviewed-on: https://review.gerrithub.io/383728
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Daniel Verkamp <daniel.verkamp@intel.com>
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