eecc6dc8e6
Makes the code slightly more readable. Change-Id: Iebf8fb07bceacf433d4bdad0a30419a3faab7eee Signed-off-by: Darek Stojaczyk <dariusz.stojaczyk@intel.com> Reviewed-on: https://review.gerrithub.io/c/439370 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Chandler-Test-Pool: SPDK Automated Test System <sys_sgsw@intel.com> Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com> Reviewed-by: Jim Harris <james.r.harris@intel.com>
594 lines
16 KiB
C
594 lines
16 KiB
C
/*-
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* BSD LICENSE
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*
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* Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "spdk/stdinc.h"
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#include "spdk/mmio.h"
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#include "spdk/string.h"
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#include "spdk/env.h"
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#include "spdk_internal/virtio.h"
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#include "spdk_internal/memory.h"
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struct virtio_hw {
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uint8_t use_msix;
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uint32_t notify_off_multiplier;
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uint8_t *isr;
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uint16_t *notify_base;
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struct {
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/** Mem-mapped resources from given PCI BAR */
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void *vaddr;
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/** Length of the address space */
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uint32_t len;
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} pci_bar[6];
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struct virtio_pci_common_cfg *common_cfg;
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struct spdk_pci_device *pci_dev;
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/** Device-specific PCI config space */
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void *dev_cfg;
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};
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struct virtio_pci_probe_ctx {
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virtio_pci_create_cb enum_cb;
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void *enum_ctx;
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uint16_t device_id;
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};
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/*
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* Following macros are derived from linux/pci_regs.h, however,
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* we can't simply include that header here, as there is no such
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* file for non-Linux platform.
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*/
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#define PCI_CAPABILITY_LIST 0x34
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#define PCI_CAP_ID_VNDR 0x09
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#define PCI_CAP_ID_MSIX 0x11
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static inline int
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check_vq_phys_addr_ok(struct virtqueue *vq)
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{
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/* Virtio PCI device VIRTIO_PCI_QUEUE_PF register is 32bit,
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* and only accepts 32 bit page frame number.
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* Check if the allocated physical memory exceeds 16TB.
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*/
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if ((vq->vq_ring_mem + vq->vq_ring_size - 1) >>
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(VIRTIO_PCI_QUEUE_ADDR_SHIFT + 32)) {
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SPDK_ERRLOG("vring address shouldn't be above 16TB!\n");
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return 0;
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}
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return 1;
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}
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static void
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free_virtio_hw(struct virtio_hw *hw)
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{
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unsigned i;
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for (i = 0; i < 6; ++i) {
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if (hw->pci_bar[i].vaddr == NULL) {
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continue;
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}
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spdk_pci_device_unmap_bar(hw->pci_dev, i, hw->pci_bar[i].vaddr);
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}
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free(hw);
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}
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static void
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pci_dump_json_info(struct virtio_dev *dev, struct spdk_json_write_ctx *w)
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{
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struct virtio_hw *hw = dev->ctx;
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struct spdk_pci_addr pci_addr = spdk_pci_device_get_addr((struct spdk_pci_device *)hw->pci_dev);
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char addr[32];
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spdk_json_write_name(w, "type");
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if (dev->modern) {
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spdk_json_write_string(w, "pci-modern");
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} else {
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spdk_json_write_string(w, "pci-legacy");
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}
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spdk_json_write_name(w, "pci_address");
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spdk_pci_addr_fmt(addr, sizeof(addr), &pci_addr);
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spdk_json_write_string(w, addr);
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}
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static void
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pci_write_json_config(struct virtio_dev *dev, struct spdk_json_write_ctx *w)
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{
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struct virtio_hw *hw = dev->ctx;
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struct spdk_pci_addr pci_addr = spdk_pci_device_get_addr(hw->pci_dev);
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char addr[32];
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spdk_pci_addr_fmt(addr, sizeof(addr), &pci_addr);
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spdk_json_write_named_string(w, "trtype", "pci");
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spdk_json_write_named_string(w, "traddr", addr);
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}
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static inline void
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io_write64_twopart(uint64_t val, uint32_t *lo, uint32_t *hi)
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{
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spdk_mmio_write_4(lo, val & ((1ULL << 32) - 1));
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spdk_mmio_write_4(hi, val >> 32);
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}
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static int
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modern_read_dev_config(struct virtio_dev *dev, size_t offset,
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void *dst, int length)
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{
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struct virtio_hw *hw = dev->ctx;
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int i;
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uint8_t *p;
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uint8_t old_gen, new_gen;
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do {
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old_gen = spdk_mmio_read_1(&hw->common_cfg->config_generation);
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p = dst;
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for (i = 0; i < length; i++) {
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*p++ = spdk_mmio_read_1((uint8_t *)hw->dev_cfg + offset + i);
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}
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new_gen = spdk_mmio_read_1(&hw->common_cfg->config_generation);
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} while (old_gen != new_gen);
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return 0;
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}
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static int
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modern_write_dev_config(struct virtio_dev *dev, size_t offset,
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const void *src, int length)
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{
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struct virtio_hw *hw = dev->ctx;
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int i;
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const uint8_t *p = src;
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for (i = 0; i < length; i++) {
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spdk_mmio_write_1(((uint8_t *)hw->dev_cfg) + offset + i, *p++);
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}
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return 0;
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}
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static uint64_t
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modern_get_features(struct virtio_dev *dev)
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{
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struct virtio_hw *hw = dev->ctx;
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uint32_t features_lo, features_hi;
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spdk_mmio_write_4(&hw->common_cfg->device_feature_select, 0);
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features_lo = spdk_mmio_read_4(&hw->common_cfg->device_feature);
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spdk_mmio_write_4(&hw->common_cfg->device_feature_select, 1);
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features_hi = spdk_mmio_read_4(&hw->common_cfg->device_feature);
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return ((uint64_t)features_hi << 32) | features_lo;
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}
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static int
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modern_set_features(struct virtio_dev *dev, uint64_t features)
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{
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struct virtio_hw *hw = dev->ctx;
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if ((features & (1ULL << VIRTIO_F_VERSION_1)) == 0) {
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SPDK_ERRLOG("VIRTIO_F_VERSION_1 feature is not enabled.\n");
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return -EINVAL;
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}
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spdk_mmio_write_4(&hw->common_cfg->guest_feature_select, 0);
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spdk_mmio_write_4(&hw->common_cfg->guest_feature, features & ((1ULL << 32) - 1));
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spdk_mmio_write_4(&hw->common_cfg->guest_feature_select, 1);
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spdk_mmio_write_4(&hw->common_cfg->guest_feature, features >> 32);
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dev->negotiated_features = features;
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return 0;
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}
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static void
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modern_destruct_dev(struct virtio_dev *vdev)
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{
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struct virtio_hw *hw = vdev->ctx;
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struct spdk_pci_device *pci_dev = hw->pci_dev;
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free_virtio_hw(hw);
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spdk_pci_device_detach(pci_dev);
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}
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static uint8_t
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modern_get_status(struct virtio_dev *dev)
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{
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struct virtio_hw *hw = dev->ctx;
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return spdk_mmio_read_1(&hw->common_cfg->device_status);
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}
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static void
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modern_set_status(struct virtio_dev *dev, uint8_t status)
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{
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struct virtio_hw *hw = dev->ctx;
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spdk_mmio_write_1(&hw->common_cfg->device_status, status);
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}
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static uint16_t
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modern_get_queue_size(struct virtio_dev *dev, uint16_t queue_id)
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{
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struct virtio_hw *hw = dev->ctx;
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spdk_mmio_write_2(&hw->common_cfg->queue_select, queue_id);
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return spdk_mmio_read_2(&hw->common_cfg->queue_size);
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}
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static int
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modern_setup_queue(struct virtio_dev *dev, struct virtqueue *vq)
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{
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struct virtio_hw *hw = dev->ctx;
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uint64_t desc_addr, avail_addr, used_addr;
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uint16_t notify_off;
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void *queue_mem;
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uint64_t queue_mem_phys_addr;
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/* To ensure physical address contiguity we make the queue occupy
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* only a single hugepage (2MB). As of Virtio 1.0, the queue size
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* always falls within this limit.
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*/
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if (vq->vq_ring_size > VALUE_2MB) {
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return -ENOMEM;
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}
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queue_mem = spdk_dma_zmalloc(vq->vq_ring_size, VALUE_2MB, &queue_mem_phys_addr);
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if (queue_mem == NULL) {
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return -ENOMEM;
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}
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vq->vq_ring_mem = queue_mem_phys_addr;
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vq->vq_ring_virt_mem = queue_mem;
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if (!check_vq_phys_addr_ok(vq)) {
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spdk_dma_free(queue_mem);
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return -ENOMEM;
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}
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desc_addr = vq->vq_ring_mem;
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avail_addr = desc_addr + vq->vq_nentries * sizeof(struct vring_desc);
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used_addr = (avail_addr + offsetof(struct vring_avail, ring[vq->vq_nentries])
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+ VIRTIO_PCI_VRING_ALIGN - 1) & ~(VIRTIO_PCI_VRING_ALIGN - 1);
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spdk_mmio_write_2(&hw->common_cfg->queue_select, vq->vq_queue_index);
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io_write64_twopart(desc_addr, &hw->common_cfg->queue_desc_lo,
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&hw->common_cfg->queue_desc_hi);
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io_write64_twopart(avail_addr, &hw->common_cfg->queue_avail_lo,
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&hw->common_cfg->queue_avail_hi);
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io_write64_twopart(used_addr, &hw->common_cfg->queue_used_lo,
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&hw->common_cfg->queue_used_hi);
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notify_off = spdk_mmio_read_2(&hw->common_cfg->queue_notify_off);
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vq->notify_addr = (void *)((uint8_t *)hw->notify_base +
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notify_off * hw->notify_off_multiplier);
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spdk_mmio_write_2(&hw->common_cfg->queue_enable, 1);
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SPDK_DEBUGLOG(SPDK_LOG_VIRTIO_PCI, "queue %"PRIu16" addresses:\n", vq->vq_queue_index);
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SPDK_DEBUGLOG(SPDK_LOG_VIRTIO_PCI, "\t desc_addr: %" PRIx64 "\n", desc_addr);
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SPDK_DEBUGLOG(SPDK_LOG_VIRTIO_PCI, "\t aval_addr: %" PRIx64 "\n", avail_addr);
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SPDK_DEBUGLOG(SPDK_LOG_VIRTIO_PCI, "\t used_addr: %" PRIx64 "\n", used_addr);
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SPDK_DEBUGLOG(SPDK_LOG_VIRTIO_PCI, "\t notify addr: %p (notify offset: %"PRIu16")\n",
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vq->notify_addr, notify_off);
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return 0;
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}
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static void
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modern_del_queue(struct virtio_dev *dev, struct virtqueue *vq)
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{
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struct virtio_hw *hw = dev->ctx;
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spdk_mmio_write_2(&hw->common_cfg->queue_select, vq->vq_queue_index);
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io_write64_twopart(0, &hw->common_cfg->queue_desc_lo,
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&hw->common_cfg->queue_desc_hi);
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io_write64_twopart(0, &hw->common_cfg->queue_avail_lo,
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&hw->common_cfg->queue_avail_hi);
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io_write64_twopart(0, &hw->common_cfg->queue_used_lo,
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&hw->common_cfg->queue_used_hi);
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spdk_mmio_write_2(&hw->common_cfg->queue_enable, 0);
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spdk_dma_free(vq->vq_ring_virt_mem);
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}
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static void
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modern_notify_queue(struct virtio_dev *dev, struct virtqueue *vq)
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{
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spdk_mmio_write_2(vq->notify_addr, vq->vq_queue_index);
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}
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static const struct virtio_dev_ops modern_ops = {
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.read_dev_cfg = modern_read_dev_config,
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.write_dev_cfg = modern_write_dev_config,
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.get_status = modern_get_status,
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.set_status = modern_set_status,
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.get_features = modern_get_features,
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.set_features = modern_set_features,
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.destruct_dev = modern_destruct_dev,
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.get_queue_size = modern_get_queue_size,
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.setup_queue = modern_setup_queue,
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.del_queue = modern_del_queue,
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.notify_queue = modern_notify_queue,
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.dump_json_info = pci_dump_json_info,
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.write_json_config = pci_write_json_config,
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};
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static void *
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get_cfg_addr(struct virtio_hw *hw, struct virtio_pci_cap *cap)
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{
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uint8_t bar = cap->bar;
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uint32_t length = cap->length;
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uint32_t offset = cap->offset;
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if (bar > 5) {
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SPDK_ERRLOG("invalid bar: %"PRIu8"\n", bar);
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return NULL;
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}
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if (offset + length < offset) {
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SPDK_ERRLOG("offset(%"PRIu32") + length(%"PRIu32") overflows\n",
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offset, length);
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return NULL;
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}
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if (offset + length > hw->pci_bar[bar].len) {
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SPDK_ERRLOG("invalid cap: overflows bar space: %"PRIu32" > %"PRIu32"\n",
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offset + length, hw->pci_bar[bar].len);
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return NULL;
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}
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if (hw->pci_bar[bar].vaddr == NULL) {
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SPDK_ERRLOG("bar %"PRIu8" base addr is NULL\n", bar);
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return NULL;
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}
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return hw->pci_bar[bar].vaddr + offset;
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}
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static int
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virtio_read_caps(struct virtio_hw *hw)
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{
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uint8_t pos;
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struct virtio_pci_cap cap;
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int ret;
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ret = spdk_pci_device_cfg_read(hw->pci_dev, &pos, 1, PCI_CAPABILITY_LIST);
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if (ret < 0) {
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SPDK_DEBUGLOG(SPDK_LOG_VIRTIO_PCI, "failed to read pci capability list\n");
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return ret;
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}
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while (pos) {
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ret = spdk_pci_device_cfg_read(hw->pci_dev, &cap, sizeof(cap), pos);
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if (ret < 0) {
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SPDK_ERRLOG("failed to read pci cap at pos: %"PRIx8"\n", pos);
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break;
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}
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if (cap.cap_vndr == PCI_CAP_ID_MSIX) {
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hw->use_msix = 1;
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}
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if (cap.cap_vndr != PCI_CAP_ID_VNDR) {
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SPDK_DEBUGLOG(SPDK_LOG_VIRTIO_PCI,
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"[%2"PRIx8"] skipping non VNDR cap id: %02"PRIx8"\n",
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pos, cap.cap_vndr);
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goto next;
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}
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SPDK_DEBUGLOG(SPDK_LOG_VIRTIO_PCI,
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"[%2"PRIx8"] cfg type: %"PRIu8", bar: %"PRIu8", offset: %04"PRIx32", len: %"PRIu32"\n",
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pos, cap.cfg_type, cap.bar, cap.offset, cap.length);
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switch (cap.cfg_type) {
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case VIRTIO_PCI_CAP_COMMON_CFG:
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hw->common_cfg = get_cfg_addr(hw, &cap);
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break;
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case VIRTIO_PCI_CAP_NOTIFY_CFG:
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spdk_pci_device_cfg_read(hw->pci_dev, &hw->notify_off_multiplier,
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4, pos + sizeof(cap));
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hw->notify_base = get_cfg_addr(hw, &cap);
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break;
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case VIRTIO_PCI_CAP_DEVICE_CFG:
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hw->dev_cfg = get_cfg_addr(hw, &cap);
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break;
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case VIRTIO_PCI_CAP_ISR_CFG:
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hw->isr = get_cfg_addr(hw, &cap);
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break;
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}
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next:
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pos = cap.cap_next;
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}
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if (hw->common_cfg == NULL || hw->notify_base == NULL ||
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hw->dev_cfg == NULL || hw->isr == NULL) {
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SPDK_DEBUGLOG(SPDK_LOG_VIRTIO_PCI, "no modern virtio pci device found.\n");
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if (ret < 0) {
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return ret;
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} else {
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return -EINVAL;
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}
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}
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SPDK_DEBUGLOG(SPDK_LOG_VIRTIO_PCI, "found modern virtio pci device.\n");
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SPDK_DEBUGLOG(SPDK_LOG_VIRTIO_PCI, "common cfg mapped at: %p\n", hw->common_cfg);
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SPDK_DEBUGLOG(SPDK_LOG_VIRTIO_PCI, "device cfg mapped at: %p\n", hw->dev_cfg);
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SPDK_DEBUGLOG(SPDK_LOG_VIRTIO_PCI, "isr cfg mapped at: %p\n", hw->isr);
|
|
SPDK_DEBUGLOG(SPDK_LOG_VIRTIO_PCI, "notify base: %p, notify off multiplier: %u\n",
|
|
hw->notify_base, hw->notify_off_multiplier);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
virtio_pci_dev_probe(struct spdk_pci_device *pci_dev, struct virtio_pci_probe_ctx *ctx)
|
|
{
|
|
struct virtio_hw *hw;
|
|
uint8_t *bar_vaddr;
|
|
uint64_t bar_paddr, bar_len;
|
|
int rc;
|
|
unsigned i;
|
|
char bdf[32];
|
|
struct spdk_pci_addr addr;
|
|
|
|
addr = spdk_pci_device_get_addr(pci_dev);
|
|
rc = spdk_pci_addr_fmt(bdf, sizeof(bdf), &addr);
|
|
if (rc != 0) {
|
|
SPDK_ERRLOG("Ignoring a device with non-parseable PCI address\n");
|
|
return -1;
|
|
}
|
|
|
|
hw = calloc(1, sizeof(*hw));
|
|
if (hw == NULL) {
|
|
SPDK_ERRLOG("%s: calloc failed\n", bdf);
|
|
return -1;
|
|
}
|
|
|
|
hw->pci_dev = pci_dev;
|
|
|
|
for (i = 0; i < 6; ++i) {
|
|
rc = spdk_pci_device_map_bar(pci_dev, i, (void *) &bar_vaddr, &bar_paddr,
|
|
&bar_len);
|
|
if (rc != 0) {
|
|
SPDK_ERRLOG("%s: failed to memmap PCI BAR %u\n", bdf, i);
|
|
free_virtio_hw(hw);
|
|
return -1;
|
|
}
|
|
|
|
hw->pci_bar[i].vaddr = bar_vaddr;
|
|
hw->pci_bar[i].len = bar_len;
|
|
}
|
|
|
|
/* Virtio PCI caps exist only on modern PCI devices.
|
|
* Legacy devices are not supported.
|
|
*/
|
|
if (virtio_read_caps(hw) != 0) {
|
|
SPDK_NOTICELOG("Ignoring legacy PCI device at %s\n", bdf);
|
|
free_virtio_hw(hw);
|
|
return -1;
|
|
}
|
|
|
|
rc = ctx->enum_cb((struct virtio_pci_ctx *)hw, ctx->enum_ctx);
|
|
if (rc != 0) {
|
|
free_virtio_hw(hw);
|
|
}
|
|
|
|
return rc;
|
|
}
|
|
|
|
static int
|
|
virtio_pci_dev_probe_cb(void *probe_ctx, struct spdk_pci_device *pci_dev)
|
|
{
|
|
struct virtio_pci_probe_ctx *ctx = probe_ctx;
|
|
uint16_t pci_device_id = spdk_pci_device_get_device_id(pci_dev);
|
|
|
|
if (pci_device_id != ctx->device_id) {
|
|
return 1;
|
|
}
|
|
|
|
return virtio_pci_dev_probe(pci_dev, ctx);
|
|
}
|
|
|
|
int
|
|
virtio_pci_dev_enumerate(virtio_pci_create_cb enum_cb, void *enum_ctx,
|
|
uint16_t pci_device_id)
|
|
{
|
|
struct virtio_pci_probe_ctx ctx;
|
|
|
|
if (!spdk_process_is_primary()) {
|
|
SPDK_WARNLOG("virtio_pci secondary process support is not implemented yet.\n");
|
|
return 0;
|
|
}
|
|
|
|
ctx.enum_cb = enum_cb;
|
|
ctx.enum_ctx = enum_ctx;
|
|
ctx.device_id = pci_device_id;
|
|
|
|
return spdk_pci_enumerate(spdk_pci_virtio_get_driver(),
|
|
virtio_pci_dev_probe_cb, &ctx);
|
|
}
|
|
|
|
int
|
|
virtio_pci_dev_attach(virtio_pci_create_cb enum_cb, void *enum_ctx,
|
|
uint16_t pci_device_id, struct spdk_pci_addr *pci_address)
|
|
{
|
|
struct virtio_pci_probe_ctx ctx;
|
|
|
|
if (!spdk_process_is_primary()) {
|
|
SPDK_WARNLOG("virtio_pci secondary process support is not implemented yet.\n");
|
|
return 0;
|
|
}
|
|
|
|
ctx.enum_cb = enum_cb;
|
|
ctx.enum_ctx = enum_ctx;
|
|
ctx.device_id = pci_device_id;
|
|
|
|
return spdk_pci_device_attach(spdk_pci_virtio_get_driver(),
|
|
virtio_pci_dev_probe_cb, &ctx, pci_address);
|
|
}
|
|
|
|
int
|
|
virtio_pci_dev_init(struct virtio_dev *vdev, const char *name,
|
|
struct virtio_pci_ctx *pci_ctx)
|
|
{
|
|
int rc;
|
|
|
|
rc = virtio_dev_construct(vdev, name, &modern_ops, pci_ctx);
|
|
if (rc != 0) {
|
|
return rc;
|
|
}
|
|
|
|
vdev->is_hw = 1;
|
|
vdev->modern = 1;
|
|
|
|
return 0;
|
|
}
|
|
|
|
SPDK_LOG_REGISTER_COMPONENT("virtio_pci", SPDK_LOG_VIRTIO_PCI)
|