Stephen Bates 627bee96a4 nvme_pci: Correct bug in CMB allocation
There was a bug reported by Cunyin Chang with regards to how the
cmb_current_offset was calculated when the CMB offset into the CMB BAR
is non-zero. This patch fixes this issue and also fixes the problem
that the last valid offset into the BAR *may* differ if registration
is utilized or not (due to the 2MiB alignment and length requirements
for registered memory).

Change-Id: Id08d6a5a40b828338f6a66599171cc8dd59768a3
Signed-off-by: Stephen Bates <sbates@raithlin.com>
Reviewed-on: https://review.gerrithub.io/401832
Reviewed-by: Daniel Verkamp <daniel.verkamp@intel.com>
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
2018-03-02 13:31:48 -05:00
..
2018-02-28 10:17:13 -05:00
2017-09-19 17:15:15 -04:00
2017-12-26 13:03:29 -05:00