5d926c48ea
On aarch64 platforms, doorbells update from guest VM may not be seen on SPDK target side. This is because there is memory type mismatch situation here. That is on guest VM side, the doorbells are treated as device memory while on SPDK target side, it is treated as normal memory. And this situation cause problem on ARM platform. Refer to "https://developer.arm.com/documentation/102376/0100/ Memory-aliasing-and-mismatched-memory-types". Only using spdk_mb() cannot fix this. Use "dc civac" to invalidate cache may solve this. Profiling data did not show big performance degradataion. Signed-off-by: Rui Chang <rui.chang@arm.com> Change-Id: I9a18718f8c4307b3007b18c32ab02e6796548958 Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/10222 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Community-CI: Broadcom CI <spdk-ci.pdl@broadcom.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
124 lines
4.0 KiB
C
124 lines
4.0 KiB
C
/*-
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* BSD LICENSE
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*
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* Copyright (c) Intel Corporation.
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* Copyright (c) 2017, IBM Corporation.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/** \file
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* Memory barriers
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*/
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#ifndef SPDK_BARRIER_H
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#define SPDK_BARRIER_H
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#include "spdk/stdinc.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** Compiler memory barrier */
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#define spdk_compiler_barrier() __asm volatile("" ::: "memory")
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/** Read memory barrier */
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#define spdk_rmb() _spdk_rmb()
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/** Write memory barrier */
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#define spdk_wmb() _spdk_wmb()
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/** Full read/write memory barrier */
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#define spdk_mb() _spdk_mb()
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/** SMP read memory barrier. */
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#define spdk_smp_rmb() _spdk_smp_rmb()
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/** SMP write memory barrier. */
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#define spdk_smp_wmb() _spdk_smp_wmb()
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/** SMP read/write memory barrier. */
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#define spdk_smp_mb() _spdk_smp_mb()
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/** Invalidate data cache, input is data pointer */
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#define spdk_ivdt_dcache(pdata) _spdk_ivdt_dcache(pdata)
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#ifdef __PPC64__
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#define _spdk_rmb() __asm volatile("sync" ::: "memory")
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#define _spdk_wmb() __asm volatile("sync" ::: "memory")
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#define _spdk_mb() __asm volatile("sync" ::: "memory")
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#define _spdk_smp_rmb() __asm volatile("lwsync" ::: "memory")
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#define _spdk_smp_wmb() __asm volatile("lwsync" ::: "memory")
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#define _spdk_smp_mb() spdk_mb()
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#define _spdk_ivdt_dcache(pdata)
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#elif defined(__aarch64__)
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#define _spdk_rmb() __asm volatile("dsb ld" ::: "memory")
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#define _spdk_wmb() __asm volatile("dsb st" ::: "memory")
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#define _spdk_mb() __asm volatile("dsb sy" ::: "memory")
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#define _spdk_smp_rmb() __asm volatile("dmb ishld" ::: "memory")
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#define _spdk_smp_wmb() __asm volatile("dmb ishst" ::: "memory")
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#define _spdk_smp_mb() __asm volatile("dmb ish" ::: "memory")
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#define _spdk_ivdt_dcache(pdata) asm volatile("dc civac, %0" : : "r"(pdata) : "memory");
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#elif defined(__i386__) || defined(__x86_64__)
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#define _spdk_rmb() __asm volatile("lfence" ::: "memory")
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#define _spdk_wmb() __asm volatile("sfence" ::: "memory")
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#define _spdk_mb() __asm volatile("mfence" ::: "memory")
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#define _spdk_smp_rmb() spdk_compiler_barrier()
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#define _spdk_smp_wmb() spdk_compiler_barrier()
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#if defined(__x86_64__)
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#define _spdk_smp_mb() __asm volatile("lock addl $0, -128(%%rsp); " ::: "memory");
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#elif defined(__i386__)
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#define _spdk_smp_mb() __asm volatile("lock addl $0, -128(%%esp); " ::: "memory");
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#endif
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#define _spdk_ivdt_dcache(pdata)
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#else
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#define _spdk_rmb()
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#define _spdk_wmb()
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#define _spdk_mb()
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#define _spdk_smp_rmb()
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#define _spdk_smp_wmb()
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#define _spdk_smp_mb()
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#define _spdk_ivdt_dcache(pdata)
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#error Unknown architecture
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif
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