d2bbef66dc
This patch extends existing ISA-L support for NVMe/SCSI T10 CRC-16 protection check (PI). The choice of which algorithm to use is set via an existing configure parameter. The default for x86 systems with appropriate CPU instructions is to us ISA-L. Testing shows that PI checking/generation will run at device speed using ISA-L. The table-based algorithm is much faster than the original algorithm and is provided to speed up calculations on non-x86 systems. This patch also fixes one issue in a false configure error if nasm is at a higher version than currently checked (i.e. 2.13.03) Local performance testing yeilds these results: Original - 15 mbit/sec. (code removed) Table - 400 mbit/sec. (27 times faster than original) ISA-L - 3,400 mbit/sec. (227 times faster than original) Signed-off-by: James Bergsten <jamesx.bergsten@intel.com> Change-Id: Idc7f1d97252644d839621ffe9fa995edd922da52 Signed-off-by: James Bergsten <jamesx.bergsten@intel.com> Reviewed-on: https://review.gerrithub.io/c/spdk/spdk/+/443646 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com>