GangCao 3bce351916 iscsi: enable per-core cache for PDU data-out pool
With the preferred per core operation for the lockless
consideration, having some per core cache instead of
the shared gloal cache will help the performance.

Change-Id: Ib3cfaac5bad7062b15643d5b151d4c7c6051ddf1
Signed-off-by: GangCao <gang.cao@intel.com>
Reviewed-on: https://review.gerrithub.io/404533
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
Reviewed-by: Daniel Verkamp <daniel.verkamp@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
2018-04-03 11:57:17 -04:00
..
2018-03-30 16:18:34 -04:00