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Interrupt stuff

This commit is contained in:
HyperAssembler 2015-04-22 01:06:15 -07:00
parent 056a79709d
commit c2a9e43ad3
9 changed files with 127 additions and 42 deletions
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39
x64/src/asm/common/sys.asm Normal file
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@ -0,0 +1,39 @@
%ifndef _SYS_ASM_
%define _SYS_ASM_
%macro pushaq
push rax ;save current rax
push rbx ;save current rbx
push rcx ;save current rcx
push rdx ;save current rdx
push rbp ;save current rbp
push rdi ;save current rdi
push rsi ;save current rsi
push r8 ;save current r8
push r9 ;save current r9
push r10 ;save current r10
push r11 ;save current r11
push r12 ;save current r12
push r13 ;save current r13
push r14 ;save current r14
push r15 ;save current r15
%endmacro
%macro popaq
pop r15 ;restore current r15
pop r14 ;restore current r14
pop r13 ;restore current r13
pop r12 ;restore current r12
pop r11 ;restore current r11
pop r10 ;restore current r10
pop r9 ;restore current r9
pop r8 ;restore current r8
pop rsi ;restore current rsi
pop rdi ;restore current rdi
pop rbp ;restore current rbp
pop rdx ;restore current rdx
pop rcx ;restore current rcx
pop rbx ;restore current rbx
pop rax ;restore current rax
%endmacro
%endif

23
x64/src/asm/hal/io.asm
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@ -1,5 +1,11 @@
%include "../common/sys.asm"
global hal_write_port
global hal_read_port
global hal_enable_interrupt
global hal_disable_interrupt
extern hal_interrupt_handler_dummy
[SECTION .text]
[BITS 64]
hal_write_port:
@ -16,4 +22,19 @@ xor rax,rax
in eax,dx
nop
nop
ret
ret
hal_disable_interrupt:
cli
ret
hal_enable_interrupt:
sti
ret
hal_interrupt_handler_wrapper:
pushaq
cld
call hal_interrupt_handler_dummy
popaq
iretq

8
x64/src/c/hal/hal.c
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@ -2,6 +2,7 @@
#include "multiboot.h"
#include "print.h"
#include "mem.h"
#include "io.h"
uint8_t g_gdt[8*9];
uint8_t g_idt[21*16];
@ -66,4 +67,11 @@ void NATIVE64 hal_init(multiboot_info_t* m_info)
{
hal_printf("AIPC detected...");
}
for(uint64_t i = 0; i <= 21; i++)
{
hal_set_interrupt_handler(i, hal_interrupt_handler_wrapper);
}
return;
}

8
x64/src/c/hal/hal.h
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@ -4,18 +4,10 @@
#include "../common/type.h"
#include "multiboot.h"
//INTERRUPT
void NATIVE64 hal_set_interrupt_handler(uint64_t index, void (*handler)(void));
void NATIVE64 hal_enable_interrupt();
void NATIVE64 hal_disable_interrupt();
//concurrency
extern void NATIVE64 hal_spin_lock(uint32_t * lock);
extern void NATIVE64 hal_spin_unlock(uint32_t * lock);
//output
void NATIVE64 hal_printf(char const *format, ...);
//inti
void NATIVE64 hal_init(multiboot_info_t* m_info);

36
x64/src/c/hal/io.c Normal file
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@ -0,0 +1,36 @@
#include "io.h"
#include "print.h"
void hal_interrupt_handler_dummy(void)
{
hal_printf("Yep... That just happened, an interrupt...\n");
return;
}
void NATIVE64 hal_write_gate(void *const gate, uint64_t const offset, uint32_t const selector, uint32_t const attr)
{
((uint8_t*)gate)[0] = (uint8_t)(offset & 0xFF);
((uint8_t*)gate)[1] = (uint8_t)((offset >> 8) & 0xFF);
((uint8_t*)gate)[2] = (uint8_t)(selector & 0xFF);
((uint8_t*)gate)[3] = (uint8_t)((selector >> 8) & 0xFF);
((uint8_t*)gate)[4] = (uint8_t)(attr & 0xFF);
((uint8_t*)gate)[5] = (uint8_t)((attr >> 8) & 0xFF);
((uint8_t*)gate)[6] = (uint8_t)((offset >> 16) & 0xFF);
((uint8_t*)gate)[7] = (uint8_t)((offset >> 24) & 0xFF);
((uint8_t*)gate)[8] = (uint8_t)((offset >> 32) & 0xFF);
((uint8_t*)gate)[9] = (uint8_t)((offset >> 40) & 0xFF);
((uint8_t*)gate)[10] = (uint8_t)((offset >> 48) & 0xFF);
((uint8_t*)gate)[11] = (uint8_t)((offset >> 56) & 0xFF);
((uint8_t*)gate)[12] = 0;
((uint8_t*)gate)[13] = 0;
((uint8_t*)gate)[14] = 0;
((uint8_t*)gate)[15] = 0;
return;
}
void NATIVE64 hal_set_interrupt_handler(uint64_t index, void (*handler)(void))
{
hal_write_gate(g_idt + 16*index, (uint64_t)handler, SEG_SELECTOR(1,0), GATE_DPL_0 | GATE_PRESENT | GATE_TYPE_INTERRUPT);
return;
}

20
x64/src/c/hal/io.h
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@ -2,6 +2,26 @@
#define _HAL_IO_H_
#include "../common/kdef.h"
#include "../common/type.h"
#define GATE_DPL_0 (0ull << 13)
#define GATE_DPL_1 (1ull << 13)
#define GATE_DPL_2 (2ull << 13)
#define GATE_DPL_3 (3ull << 13)
#define GATE_PRESENT (1ull << 15)
#define GATE_TYPE_CALL (12ull << 8)
#define GATE_TYPE_INTERRUPT (14ull << 8)
#define GATE_TYPE_TRAP (15ull << 8)
extern void NATIVE64 hal_write_port(uint64_t port, int64_t data);
extern int64_t NATIVE64 hal_read_port(uint64_t port);
void NATIVE64 hal_interrupt_handler_dummy();
void NATIVE64 hal_set_interrupt_handler(uint64_t index, void (*handler)());
extern void NATIVE64 hal_enable_interrupt();
extern void NATIVE64 hal_disable_interrupt();
extern void NATIVE64 hal_interrupt_handler_wrapper();
void NATIVE64 hal_write_gate(void *const gate, uint64_t const offset, uint32_t const selector, uint32_t const attr);
extern uint8_t g_idt[];
#endif

21
x64/src/c/hal/mem.c
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@ -70,27 +70,6 @@ void NATIVE64 hal_write_pml4_entry(void *const base, uint64_t const pdpt_addr, u
return;
}
void NATIVE64 hal_write_gate(void *const gate, uint64_t const offset, uint32_t const selector, uint32_t const attr)
{
((uint8_t*)gate)[0] = (uint8_t)(offset & 0xFF);
((uint8_t*)gate)[1] = (uint8_t)((offset >> 8) & 0xFF);
((uint8_t*)gate)[2] = (uint8_t)(selector & 0xFF);
((uint8_t*)gate)[3] = (uint8_t)((selector >> 8) & 0xFF);
((uint8_t*)gate)[4] = (uint8_t)(attr & 0xFF);
((uint8_t*)gate)[5] = (uint8_t)((attr >> 8) & 0xFF);
((uint8_t*)gate)[6] = (uint8_t)((offset >> 16) & 0xFF);
((uint8_t*)gate)[7] = (uint8_t)((offset >> 24) & 0xFF);
((uint8_t*)gate)[8] = (uint8_t)((offset >> 32) & 0xFF);
((uint8_t*)gate)[9] = (uint8_t)((offset >> 40) & 0xFF);
((uint8_t*)gate)[10] = (uint8_t)((offset >> 48) & 0xFF);
((uint8_t*)gate)[11] = (uint8_t)((offset >> 56) & 0xFF);
((uint8_t*)gate)[12] = 0;
((uint8_t*)gate)[13] = 0;
((uint8_t*)gate)[14] = 0;
((uint8_t*)gate)[15] = 0;
return;
}
void NATIVE64 hal_write_segment_descriptor(void *const gdt, uint32_t const base, uint32_t const limit, uint64_t const attr)
{
if (gdt == NULL)

11
x64/src/c/hal/mem.h
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@ -55,15 +55,6 @@
#define SEG_AVAILABLE (1ull << 52)
#define SEG_32_BITS (1ull << 54)
#define GATE_DPL_0 (0ull << 13)
#define GATE_DPL_1 (1ull << 13)
#define GATE_DPL_2 (2ull << 13)
#define GATE_DPL_3 (3ull << 13)
#define GATE_PRESENT (1ull << 15)
#define GATE_TYPE_CALL (12ull << 8)
#define GATE_TYPE_INTERRUPT (14ull << 8)
#define GATE_TYPE_TRAP (15ull << 8)
#define PML4_ENTRY_NUM(mem) ((mem) / (4096ull * 512ull * 512ull * 512ull))
#define PDPT_ENTRY_NUM(mem) ((mem) / (4096ull * 512ull * 512ull))
#define PD_ENTRY_NUM(mem) ((mem) / (4096ull*512ull))
@ -105,6 +96,4 @@ void NATIVE64 hal_write_pd_entry(void *const base, uint64_t const pt_addr, uint6
void NATIVE64 hal_write_pt_entry(void *const base, uint64_t const p_addr, uint64_t const attr);
void NATIVE64 hal_write_gate(void *const gate, uint64_t const offset, uint32_t const selector, uint32_t const attr);
#endif

3
x64/src/c/kernel/entry.c
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@ -1,6 +1,7 @@
#include "../common/kdef.h"
#include "../common/type.h"
#include "../hal/hal.h"
#include "../hal/print.h"
extern char kernel_start[];
extern char kernel_end[];
@ -9,4 +10,4 @@ void NATIVE64 kmain(multiboot_info_t *multiboot_info)
hal_init(multiboot_info);
hal_printf("Finished setting up HAL\n");
HLT_CPU();
}
}