2018-06-14 06:56:07 +00:00
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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2017-11-13 20:15:33 +00:00
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/*
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* Copyright (C) 2017 Marvell Technology Group Ltd.
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*
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* Device Tree file for Marvell Armada AP810 OCTA cores.
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*/
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#include "armada-ap810-ap0.dtsi"
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "marvell,armada-ap810-octa";
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2019-01-11 05:27:30 +00:00
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cpu0: cpu@0 {
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2017-11-13 20:15:33 +00:00
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device_type = "cpu";
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compatible = "arm,cortex-a72", "arm,armv8";
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reg = <0x000>;
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enable-method = "psci";
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};
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2019-01-11 05:27:30 +00:00
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cpu1: cpu@1 {
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2017-11-13 20:15:33 +00:00
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device_type = "cpu";
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compatible = "arm,cortex-a72", "arm,armv8";
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reg = <0x001>;
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enable-method = "psci";
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};
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2019-01-11 05:27:30 +00:00
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cpu2: cpu@100 {
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2017-11-13 20:15:33 +00:00
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device_type = "cpu";
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compatible = "arm,cortex-a72", "arm,armv8";
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reg = <0x100>;
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enable-method = "psci";
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};
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2019-01-11 05:27:30 +00:00
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cpu3: cpu@101 {
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2017-11-13 20:15:33 +00:00
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device_type = "cpu";
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compatible = "arm,cortex-a72", "arm,armv8";
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reg = <0x101>;
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enable-method = "psci";
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};
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2019-01-11 05:27:30 +00:00
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cpu4: cpu@200 {
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2017-11-13 20:15:33 +00:00
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device_type = "cpu";
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compatible = "arm,cortex-a72", "arm,armv8";
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reg = <0x200>;
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enable-method = "psci";
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};
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2019-01-11 05:27:30 +00:00
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cpu5: cpu@201 {
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2017-11-13 20:15:33 +00:00
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device_type = "cpu";
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compatible = "arm,cortex-a72", "arm,armv8";
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reg = <0x201>;
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enable-method = "psci";
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};
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2019-01-11 05:27:30 +00:00
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cpu6: cpu@300 {
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2017-11-13 20:15:33 +00:00
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device_type = "cpu";
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compatible = "arm,cortex-a72", "arm,armv8";
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reg = <0x300>;
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enable-method = "psci";
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};
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2019-01-11 05:27:30 +00:00
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cpu7: cpu@301 {
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2017-11-13 20:15:33 +00:00
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device_type = "cpu";
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compatible = "arm,cortex-a72", "arm,armv8";
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reg = <0x301>;
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enable-method = "psci";
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};
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};
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};
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