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freebsd-dev/sys/dev/aic7xxx/ahc_pci.c

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Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
/*
* Product specific probe and attach routines for:
* 3940, 2940, aic7895, aic7890, aic7880,
* aic7870, aic7860 and aic7850 SCSI controllers
*
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
* Copyright (c) 1995, 1996, 1997, 1998, 1999, 2000 Justin T. Gibbs
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions, and the following disclaimer,
* without modification, immediately at the beginning of the file.
* 2. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
* Alternatively, this software may be distributed under the terms of the
* GNU Public License ("GPL").
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
$Id$ -> $FreeBSD$
1999-08-28 01:08:13 +00:00
* $FreeBSD$
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
#include <sys/module.h>
#include <sys/bus.h>
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
#include <pci/pcireg.h>
#include <pci/pcivar.h>
#include <machine/bus_memio.h>
#include <machine/bus_pio.h>
#include <machine/bus.h>
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
#include <machine/resource.h>
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
#include <machine/clock.h>
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
#include <sys/rman.h>
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
#include <cam/cam.h>
#include <cam/cam_ccb.h>
#include <cam/cam_sim.h>
Pull in new ccb_hdr list types.
1998-12-15 08:24:45 +00:00
#include <cam/cam_xpt_sim.h>
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
#include <cam/scsi/scsi_all.h>
#include <dev/aic7xxx/aic7xxx.h>
#include <dev/aic7xxx/93cx6.h>
#include <aic7xxx_reg.h>
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
#define AHC_PCI_IOADDR PCIR_MAPS /* I/O Address */
#define AHC_PCI_MEMADDR (PCIR_MAPS + 4) /* Mem I/O Address */
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
static __inline uint64_t
Take the subvendor and subdevice ids into account during device probe. Sync up device Ids with the master Adaptec list. Add probe support for the 2940 Pro although it isn't obvious that all of the termination support is correct for this adapter yet.
1999-05-14 05:09:24 +00:00
ahc_compose_id(u_int device, u_int vendor, u_int subdevice, u_int subvendor)
{
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
uint64_t id;
Take the subvendor and subdevice ids into account during device probe. Sync up device Ids with the master Adaptec list. Add probe support for the 2940 Pro although it isn't obvious that all of the termination support is correct for this adapter yet.
1999-05-14 05:09:24 +00:00
id = subvendor
| (subdevice << 16)
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
| ((uint64_t)vendor << 32)
| ((uint64_t)device << 48);
Take the subvendor and subdevice ids into account during device probe. Sync up device Ids with the master Adaptec list. Add probe support for the 2940 Pro although it isn't obvious that all of the termination support is correct for this adapter yet.
1999-05-14 05:09:24 +00:00
return (id);
}
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
#define ID_ALL_MASK 0xFFFFFFFFFFFFFFFFull
#define ID_DEV_VENDOR_MASK 0xFFFFFFFF00000000ull
Take the subvendor and subdevice ids into account during device probe. Sync up device Ids with the master Adaptec list. Add probe support for the 2940 Pro although it isn't obvious that all of the termination support is correct for this adapter yet.
1999-05-14 05:09:24 +00:00
#define ID_AIC7850 0x5078900400000000ull
#define ID_AHA_2910_15_20_30C 0x5078900478509004ull
#define ID_AIC7855 0x5578900400000000ull
Add support for the aic7859 which is found on the 2930CU. Break out the detection logic for the aic7855 and properly report these chips as 7855s instead of 7850s. The 2940AU_CN is an aic7860 based card, not aic7860. Not setting CACHETHEN turned out to be a bad idea. It can cause spurious corruption under heavy PCI load with multiple masters.
1999-08-30 16:11:46 +00:00
#define ID_AIC7859 0x3860900400000000ull
#define ID_AHA_2930CU 0x3860900438699004ull
Take the subvendor and subdevice ids into account during device probe. Sync up device Ids with the master Adaptec list. Add probe support for the 2940 Pro although it isn't obvious that all of the termination support is correct for this adapter yet.
1999-05-14 05:09:24 +00:00
#define ID_AIC7860 0x6078900400000000ull
#define ID_AIC7860C 0x6078900478609004ull
#define ID_AHA_2940AU_0 0x6178900400000000ull
#define ID_AHA_2940AU_1 0x6178900478619004ull
Add support for the aic7859 which is found on the 2930CU. Break out the detection logic for the aic7855 and properly report these chips as 7855s instead of 7850s. The 2940AU_CN is an aic7860 based card, not aic7860. Not setting CACHETHEN turned out to be a bad idea. It can cause spurious corruption under heavy PCI load with multiple masters.
1999-08-30 16:11:46 +00:00
#define ID_AHA_2940AU_CN 0x2178900478219004ull
Take the subvendor and subdevice ids into account during device probe. Sync up device Ids with the master Adaptec list. Add probe support for the 2940 Pro although it isn't obvious that all of the termination support is correct for this adapter yet.
1999-05-14 05:09:24 +00:00
#define ID_AHA_2930C_VAR 0x6038900438689004ull
#define ID_AIC7870 0x7078900400000000ull
#define ID_AHA_2940 0x7178900400000000ull
#define ID_AHA_3940 0x7278900400000000ull
#define ID_AHA_398X 0x7378900400000000ull
#define ID_AHA_2944 0x7478900400000000ull
#define ID_AHA_3944 0x7578900400000000ull
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
#define ID_AHA_4944 0x7678900400000000ull
Take the subvendor and subdevice ids into account during device probe. Sync up device Ids with the master Adaptec list. Add probe support for the 2940 Pro although it isn't obvious that all of the termination support is correct for this adapter yet.
1999-05-14 05:09:24 +00:00
#define ID_AIC7880 0x8078900400000000ull
#define ID_AIC7880_B 0x8078900478809004ull
#define ID_AHA_2940U 0x8178900400000000ull
#define ID_AHA_3940U 0x8278900400000000ull
#define ID_AHA_2944U 0x8478900400000000ull
#define ID_AHA_3944U 0x8578900400000000ull
#define ID_AHA_398XU 0x8378900400000000ull
#define ID_AHA_4944U 0x8678900400000000ull
#define ID_AHA_2940UB 0x8178900478819004ull
#define ID_AHA_2930U 0x8878900478889004ull
#define ID_AHA_2940U_PRO 0x8778900478879004ull
#define ID_AHA_2940U_CN 0x0078900478009004ull
#define ID_AIC7895 0x7895900478959004ull
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
#define ID_AIC7895_RAID_PORT 0x7893900478939004ull
Take the subvendor and subdevice ids into account during device probe. Sync up device Ids with the master Adaptec list. Add probe support for the 2940 Pro although it isn't obvious that all of the termination support is correct for this adapter yet.
1999-05-14 05:09:24 +00:00
#define ID_AHA_2940U_DUAL 0x7895900478919004ull
#define ID_AHA_3940AU 0x7895900478929004ull
#define ID_AHA_3944AU 0x7895900478949004ull
#define ID_AIC7890 0x001F9005000F9005ull
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
#define ID_AAA_131U2 0x0013900500039005ull
Take the subvendor and subdevice ids into account during device probe. Sync up device Ids with the master Adaptec list. Add probe support for the 2940 Pro although it isn't obvious that all of the termination support is correct for this adapter yet.
1999-05-14 05:09:24 +00:00
#define ID_AHA_2930U2 0x0011900501819005ull
#define ID_AHA_2940U2B 0x00109005A1009005ull
#define ID_AHA_2940U2_OEM 0x0010900521809005ull
#define ID_AHA_2940U2 0x00109005A1809005ull
#define ID_AHA_2950U2B 0x00109005E1009005ull
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
#define ID_AIC7892 0x008F9005FFFF9005ull
#define ID_AHA_29160 0x00809005E2A09005ull
#define ID_AHA_29160_CPQ 0x00809005E2A00E11ull
#define ID_AHA_29160N 0x0080900562A09005ull
#define ID_AHA_29160B 0x00809005E2209005ull
#define ID_AHA_19160B 0x0081900562A19005ull
Take the subvendor and subdevice ids into account during device probe. Sync up device Ids with the master Adaptec list. Add probe support for the 2940 Pro although it isn't obvious that all of the termination support is correct for this adapter yet.
1999-05-14 05:09:24 +00:00
#define ID_AIC7896 0x005F9005FFFF9005ull
#define ID_AHA_3950U2B_0 0x00509005FFFF9005ull
#define ID_AHA_3950U2B_1 0x00509005F5009005ull
#define ID_AHA_3950U2D_0 0x00519005FFFF9005ull
#define ID_AHA_3950U2D_1 0x00519005B5009005ull
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
#define ID_AIC7899 0x00CF9005FFFF9005ull
#define ID_AHA_3960D 0x00C09005F6209005ull /* AKA AHA-39160 */
#define ID_AHA_3960D_CPQ 0x00C09005F6200E11ull
Take the subvendor and subdevice ids into account during device probe. Sync up device Ids with the master Adaptec list. Add probe support for the 2940 Pro although it isn't obvious that all of the termination support is correct for this adapter yet.
1999-05-14 05:09:24 +00:00
#define ID_AIC7810 0x1078900400000000ull
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
#define ID_AIC7815 0x7815900400000000ull
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
typedef int (ahc_device_setup_t)(device_t, struct ahc_probe_config *);
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
static ahc_device_setup_t ahc_aic7850_setup;
Add support for the aic7859 which is found on the 2930CU. Break out the detection logic for the aic7855 and properly report these chips as 7855s instead of 7850s. The 2940AU_CN is an aic7860 based card, not aic7860. Not setting CACHETHEN turned out to be a bad idea. It can cause spurious corruption under heavy PCI load with multiple masters.
1999-08-30 16:11:46 +00:00
static ahc_device_setup_t ahc_aic7855_setup;
static ahc_device_setup_t ahc_aic7859_setup;
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
static ahc_device_setup_t ahc_aic7860_setup;
static ahc_device_setup_t ahc_aic7870_setup;
static ahc_device_setup_t ahc_aha394X_setup;
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
static ahc_device_setup_t ahc_aha494X_setup;
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
static ahc_device_setup_t ahc_aha398X_setup;
static ahc_device_setup_t ahc_aic7880_setup;
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
static ahc_device_setup_t ahc_2940Pro_setup;
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
static ahc_device_setup_t ahc_aha394XU_setup;
static ahc_device_setup_t ahc_aha398XU_setup;
static ahc_device_setup_t ahc_aic7890_setup;
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
static ahc_device_setup_t ahc_aic7892_setup;
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
static ahc_device_setup_t ahc_aic7895_setup;
static ahc_device_setup_t ahc_aic7896_setup;
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
static ahc_device_setup_t ahc_aic7899_setup;
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
static ahc_device_setup_t ahc_raid_setup;
static ahc_device_setup_t ahc_aha394XX_setup;
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
static ahc_device_setup_t ahc_aha494XX_setup;
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
static ahc_device_setup_t ahc_aha398XX_setup;
struct ahc_pci_identity {
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
uint64_t full_id;
uint64_t id_mask;
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
char *name;
ahc_device_setup_t *setup;
};
struct ahc_pci_identity ahc_pci_ident_table [] =
{
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
/* aic7850 based controllers */
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
{
ID_AHA_2910_15_20_30C,
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
ID_ALL_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 2910/15/20/30C SCSI adapter",
ahc_aic7850_setup
},
Add support for the aic7859 which is found on the 2930CU. Break out the detection logic for the aic7855 and properly report these chips as 7855s instead of 7850s. The 2940AU_CN is an aic7860 based card, not aic7860. Not setting CACHETHEN turned out to be a bad idea. It can cause spurious corruption under heavy PCI load with multiple masters.
1999-08-30 16:11:46 +00:00
/* aic7859 based controllers */
{
When booting verbose, indicate if we are using manual termination settings for U2 cards. Don't assume that all aic7859 cards are 2930CUs.
1999-12-12 04:54:14 +00:00
ID_AHA_2930CU,
ID_ALL_MASK,
Add support for the aic7859 which is found on the 2930CU. Break out the detection logic for the aic7855 and properly report these chips as 7855s instead of 7850s. The 2940AU_CN is an aic7860 based card, not aic7860. Not setting CACHETHEN turned out to be a bad idea. It can cause spurious corruption under heavy PCI load with multiple masters.
1999-08-30 16:11:46 +00:00
"Adaptec 2930CU SCSI adapter",
ahc_aic7859_setup
},
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
/* aic7860 based controllers */
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
{
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
ID_AHA_2940AU_0 & ID_DEV_VENDOR_MASK,
ID_DEV_VENDOR_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 2940A Ultra SCSI adapter",
ahc_aic7860_setup
},
Add support for the aic7859 which is found on the 2930CU. Break out the detection logic for the aic7855 and properly report these chips as 7855s instead of 7850s. The 2940AU_CN is an aic7860 based card, not aic7860. Not setting CACHETHEN turned out to be a bad idea. It can cause spurious corruption under heavy PCI load with multiple masters.
1999-08-30 16:11:46 +00:00
{
ID_AHA_2940AU_CN & ID_DEV_VENDOR_MASK,
ID_DEV_VENDOR_MASK,
"Adaptec 2940A/CN Ultra SCSI adapter",
ahc_aic7860_setup
},
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
{
Simplify my license. Don't arbitrarily limit the initiator ID of the card to something <= 7. Fix a bug in the checksum code that would incorrectly prevent a valid checksum of zero. (cp) Don't touch rely on seeprom data when configuring termination. We may not have seeprom data. (cp) Treat all ULTRA2 capable adapters the same way when reading or writing the BRDCTL register. We previously only did this correctly for aic7890/91 chips. This should correct some problems with termination settings on aic7896/97 adapters. (cp) Changes marked with "(cp)" Pointed out by: Chuck Paterson <cp@bsdi.com>
1999-12-06 18:29:03 +00:00
ID_AHA_2930C_VAR & ID_DEV_VENDOR_MASK,
Add support for the aic7859 which is found on the 2930CU. Break out the detection logic for the aic7855 and properly report these chips as 7855s instead of 7850s. The 2940AU_CN is an aic7860 based card, not aic7860. Not setting CACHETHEN turned out to be a bad idea. It can cause spurious corruption under heavy PCI load with multiple masters.
1999-08-30 16:11:46 +00:00
ID_DEV_VENDOR_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 2930C SCSI adapter (VAR)",
ahc_aic7860_setup
},
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
/* aic7870 based controllers */
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
{
ID_AHA_2940,
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
ID_ALL_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 2940 SCSI adapter",
ahc_aic7870_setup
},
{
ID_AHA_3940,
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
ID_ALL_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 3940 SCSI adapter",
ahc_aha394X_setup
},
{
ID_AHA_398X,
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
ID_ALL_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 398X SCSI RAID adapter",
ahc_aha398X_setup
},
{
ID_AHA_2944,
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
ID_ALL_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 2944 SCSI adapter",
ahc_aic7870_setup
},
{
ID_AHA_3944,
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
ID_ALL_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 3944 SCSI adapter",
ahc_aha394X_setup
},
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
{
ID_AHA_4944,
ID_ALL_MASK,
"Adaptec 4944 SCSI adapter",
ahc_aha494X_setup
},
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
/* aic7880 based controllers */
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
{
Ignore subvendor and subdevice ids for all ai7880 parts. These chips only support 'mirroring' the vendor and device ids, so we don't lose any information. Certain revisions of the aic7880 will not perform the mirroring so to match all possiblities would double the number of table entries. This change also allows us to match things like the 2944B which I missed in the original table.
1999-05-26 16:59:17 +00:00
ID_AHA_2940U & ID_DEV_VENDOR_MASK,
ID_DEV_VENDOR_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 2940 Ultra SCSI adapter",
ahc_aic7880_setup
},
{
Ignore subvendor and subdevice ids for all ai7880 parts. These chips only support 'mirroring' the vendor and device ids, so we don't lose any information. Certain revisions of the aic7880 will not perform the mirroring so to match all possiblities would double the number of table entries. This change also allows us to match things like the 2944B which I missed in the original table.
1999-05-26 16:59:17 +00:00
ID_AHA_3940U & ID_DEV_VENDOR_MASK,
ID_DEV_VENDOR_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 3940 Ultra SCSI adapter",
ahc_aha394XU_setup
},
{
Ignore subvendor and subdevice ids for all ai7880 parts. These chips only support 'mirroring' the vendor and device ids, so we don't lose any information. Certain revisions of the aic7880 will not perform the mirroring so to match all possiblities would double the number of table entries. This change also allows us to match things like the 2944B which I missed in the original table.
1999-05-26 16:59:17 +00:00
ID_AHA_2944U & ID_DEV_VENDOR_MASK,
ID_DEV_VENDOR_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 2944 Ultra SCSI adapter",
ahc_aic7880_setup
},
{
Ignore subvendor and subdevice ids for all ai7880 parts. These chips only support 'mirroring' the vendor and device ids, so we don't lose any information. Certain revisions of the aic7880 will not perform the mirroring so to match all possiblities would double the number of table entries. This change also allows us to match things like the 2944B which I missed in the original table.
1999-05-26 16:59:17 +00:00
ID_AHA_3944U & ID_DEV_VENDOR_MASK,
ID_DEV_VENDOR_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 3944 Ultra SCSI adapter",
ahc_aha394XU_setup
},
{
Ignore subvendor and subdevice ids for all ai7880 parts. These chips only support 'mirroring' the vendor and device ids, so we don't lose any information. Certain revisions of the aic7880 will not perform the mirroring so to match all possiblities would double the number of table entries. This change also allows us to match things like the 2944B which I missed in the original table.
1999-05-26 16:59:17 +00:00
ID_AHA_398XU & ID_DEV_VENDOR_MASK,
ID_DEV_VENDOR_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 398X Ultra SCSI RAID adapter",
ahc_aha398XU_setup
},
{
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
/*
* XXX Don't know the slot numbers
* so we can't identify channels
*/
Ignore subvendor and subdevice ids for all ai7880 parts. These chips only support 'mirroring' the vendor and device ids, so we don't lose any information. Certain revisions of the aic7880 will not perform the mirroring so to match all possiblities would double the number of table entries. This change also allows us to match things like the 2944B which I missed in the original table.
1999-05-26 16:59:17 +00:00
ID_AHA_4944U & ID_DEV_VENDOR_MASK,
ID_DEV_VENDOR_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 4944 Ultra SCSI adapter",
ahc_aic7880_setup
},
{
Ignore subvendor and subdevice ids for all ai7880 parts. These chips only support 'mirroring' the vendor and device ids, so we don't lose any information. Certain revisions of the aic7880 will not perform the mirroring so to match all possiblities would double the number of table entries. This change also allows us to match things like the 2944B which I missed in the original table.
1999-05-26 16:59:17 +00:00
ID_AHA_2930U & ID_DEV_VENDOR_MASK,
ID_DEV_VENDOR_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 2930 Ultra SCSI adapter",
ahc_aic7880_setup
},
{
Ignore subvendor and subdevice ids for all ai7880 parts. These chips only support 'mirroring' the vendor and device ids, so we don't lose any information. Certain revisions of the aic7880 will not perform the mirroring so to match all possiblities would double the number of table entries. This change also allows us to match things like the 2944B which I missed in the original table.
1999-05-26 16:59:17 +00:00
ID_AHA_2940U_PRO & ID_DEV_VENDOR_MASK,
ID_DEV_VENDOR_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 2940 Pro Ultra SCSI adapter",
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
ahc_2940Pro_setup
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
},
{
Ignore subvendor and subdevice ids for all ai7880 parts. These chips only support 'mirroring' the vendor and device ids, so we don't lose any information. Certain revisions of the aic7880 will not perform the mirroring so to match all possiblities would double the number of table entries. This change also allows us to match things like the 2944B which I missed in the original table.
1999-05-26 16:59:17 +00:00
ID_AHA_2940U_CN & ID_DEV_VENDOR_MASK,
ID_DEV_VENDOR_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 2940/CN Ultra SCSI adapter",
ahc_aic7880_setup
},
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
/* aic7890 based controllers */
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
{
ID_AHA_2930U2,
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
ID_ALL_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 2930 Ultra2 SCSI adapter",
ahc_aic7890_setup
},
{
ID_AHA_2940U2B,
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
ID_ALL_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 2940B Ultra2 SCSI adapter",
ahc_aic7890_setup
},
{
ID_AHA_2940U2_OEM,
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
ID_ALL_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 2940 Ultra2 SCSI adapter (OEM)",
ahc_aic7890_setup
},
{
ID_AHA_2940U2,
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
ID_ALL_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 2940 Ultra2 SCSI adapter",
ahc_aic7890_setup
},
{
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
ID_AHA_2950U2B,
ID_ALL_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 2950 Ultra2 SCSI adapter",
ahc_aic7890_setup
},
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
{
ID_AAA_131U2,
ID_ALL_MASK,
"Adaptec AAA-131 Ultra2 RAID adapter",
ahc_aic7890_setup
},
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
/* aic7892 based controllers */
{
ID_AHA_29160,
ID_ALL_MASK,
"Adaptec 29160 Ultra160 SCSI adapter",
ahc_aic7892_setup
},
{
ID_AHA_29160_CPQ,
ID_ALL_MASK,
"Adaptec (Compaq OEM) 29160 Ultra160 SCSI adapter",
ahc_aic7892_setup
},
{
ID_AHA_29160N,
ID_ALL_MASK,
"Adaptec 29160N Ultra160 SCSI adapter",
ahc_aic7892_setup
},
{
ID_AHA_29160B,
ID_ALL_MASK,
"Adaptec 29160B Ultra160 SCSI adapter",
ahc_aic7892_setup
},
{
ID_AHA_19160B,
ID_ALL_MASK,
"Adaptec 19160B Ultra160 SCSI adapter",
ahc_aic7892_setup
},
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
/* aic7895 based controllers */
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
{
ID_AHA_2940U_DUAL,
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
ID_ALL_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 2940/DUAL Ultra SCSI adapter",
ahc_aic7895_setup
},
{
ID_AHA_3940AU,
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
ID_ALL_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 3940A Ultra SCSI adapter",
ahc_aic7895_setup
},
{
ID_AHA_3944AU,
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
ID_ALL_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 3944A Ultra SCSI adapter",
ahc_aic7895_setup
},
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
/* aic7896/97 based controllers */
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
{
ID_AHA_3950U2B_0,
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
ID_ALL_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 3950B Ultra2 SCSI adapter",
ahc_aic7896_setup
},
{
ID_AHA_3950U2B_1,
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
ID_ALL_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 3950B Ultra2 SCSI adapter",
ahc_aic7896_setup
},
{
ID_AHA_3950U2D_0,
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
ID_ALL_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 3950D Ultra2 SCSI adapter",
ahc_aic7896_setup
},
{
ID_AHA_3950U2D_1,
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
ID_ALL_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec 3950D Ultra2 SCSI adapter",
ahc_aic7896_setup
},
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
/* aic7899 based controllers */
{
ID_AHA_3960D,
ID_ALL_MASK,
"Adaptec 3960D Ultra160 SCSI adapter",
ahc_aic7899_setup
},
{
ID_AHA_3960D_CPQ,
ID_ALL_MASK,
"Adaptec (Compaq OEM) 3960D Ultra160 SCSI adapter",
ahc_aic7899_setup
},
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
/* Generic chip probes for devices we don't know 'exactly' */
{
ID_AIC7850 & ID_DEV_VENDOR_MASK,
ID_DEV_VENDOR_MASK,
"Adaptec aic7850 SCSI adapter",
ahc_aic7850_setup
},
{
ID_AIC7855 & ID_DEV_VENDOR_MASK,
ID_DEV_VENDOR_MASK,
"Adaptec aic7855 SCSI adapter",
Add support for the aic7859 which is found on the 2930CU. Break out the detection logic for the aic7855 and properly report these chips as 7855s instead of 7850s. The 2940AU_CN is an aic7860 based card, not aic7860. Not setting CACHETHEN turned out to be a bad idea. It can cause spurious corruption under heavy PCI load with multiple masters.
1999-08-30 16:11:46 +00:00
ahc_aic7855_setup
},
{
ID_AIC7859 & ID_DEV_VENDOR_MASK,
ID_DEV_VENDOR_MASK,
"Adaptec aic7859 SCSI adapter",
ahc_aic7859_setup
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
},
{
ID_AIC7860 & ID_DEV_VENDOR_MASK,
ID_DEV_VENDOR_MASK,
"Adaptec aic7860 SCSI adapter",
ahc_aic7860_setup
},
{
ID_AIC7870 & ID_DEV_VENDOR_MASK,
ID_DEV_VENDOR_MASK,
"Adaptec aic7870 SCSI adapter",
ahc_aic7870_setup
},
{
ID_AIC7880 & ID_DEV_VENDOR_MASK,
ID_DEV_VENDOR_MASK,
"Adaptec aic7880 Ultra SCSI adapter",
ahc_aic7880_setup
},
{
ID_AIC7890 & ID_DEV_VENDOR_MASK,
ID_DEV_VENDOR_MASK,
"Adaptec aic7890/91 Ultra2 SCSI adapter",
ahc_aic7890_setup
},
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
{
ID_AIC7892 & ID_DEV_VENDOR_MASK,
ID_DEV_VENDOR_MASK,
"Adaptec aic7892 Ultra160 SCSI adapter",
ahc_aic7892_setup
},
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
{
ID_AIC7895 & ID_DEV_VENDOR_MASK,
ID_DEV_VENDOR_MASK,
"Adaptec aic7895 Ultra SCSI adapter",
ahc_aic7895_setup
},
{
ID_AIC7895_RAID_PORT & ID_DEV_VENDOR_MASK,
ID_DEV_VENDOR_MASK,
"Adaptec aic7895 Ultra SCSI adapter (RAID PORT)",
ahc_aic7895_setup
},
{
ID_AIC7896 & ID_DEV_VENDOR_MASK,
ID_DEV_VENDOR_MASK,
"Adaptec aic7896/97 Ultra2 SCSI adapter",
ahc_aic7896_setup
},
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
{
ID_AIC7899 & ID_DEV_VENDOR_MASK,
ID_DEV_VENDOR_MASK,
"Adaptec aic7899 Ultra160 SCSI adapter",
ahc_aic7899_setup
},
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
{
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
ID_AIC7810 & ID_DEV_VENDOR_MASK,
ID_DEV_VENDOR_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec aic7810 RAID memory controller",
ahc_raid_setup
},
{
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
ID_AIC7815 & ID_DEV_VENDOR_MASK,
ID_DEV_VENDOR_MASK,
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
"Adaptec aic7815 RAID memory controller",
ahc_raid_setup
}
};
static const int ahc_num_pci_devs =
sizeof(ahc_pci_ident_table) / sizeof(*ahc_pci_ident_table);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
#define AHC_394X_SLOT_CHANNEL_A 4
#define AHC_394X_SLOT_CHANNEL_B 5
#define AHC_398X_SLOT_CHANNEL_A 4
#define AHC_398X_SLOT_CHANNEL_B 8
#define AHC_398X_SLOT_CHANNEL_C 12
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
#define AHC_494X_SLOT_CHANNEL_A 4
#define AHC_494X_SLOT_CHANNEL_B 5
#define AHC_494X_SLOT_CHANNEL_C 6
#define AHC_494X_SLOT_CHANNEL_D 7
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
#define DEVCONFIG 0x40
#define SCBSIZE32 0x00010000ul /* aic789X only */
#define MPORTMODE 0x00000400ul /* aic7870 only */
#define RAMPSM 0x00000200ul /* aic7870 only */
#define VOLSENSE 0x00000100ul
#define SCBRAMSEL 0x00000080ul
#define MRDCEN 0x00000040ul
#define EXTSCBTIME 0x00000020ul /* aic7870 only */
#define EXTSCBPEN 0x00000010ul /* aic7870 only */
#define BERREN 0x00000008ul
#define DACEN 0x00000004ul
#define STPWLEVEL 0x00000002ul
#define DIFACTNEGEN 0x00000001ul /* aic7870 only */
#define CSIZE_LATTIME 0x0c
#define CACHESIZE 0x0000003ful /* only 5 bits */
#define LATTIME 0x0000ff00ul
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
static struct ahc_pci_identity *ahc_find_pci_device(device_t dev);
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
static int ahc_ext_scbram_present(struct ahc_softc *ahc);
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
static void ahc_scbram_config(struct ahc_softc *ahc, int enable,
int pcheck, int fast, int large);
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
static void ahc_probe_ext_scbram(struct ahc_softc *ahc);
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
static int verify_cksum(struct seeprom_config *sc);
Add untested code to support the aha2930U2W. Modify to deal with changes in the storage of user negotiation settings.
1999-03-05 23:28:36 +00:00
static void check_extport(struct ahc_softc *ahc, u_int *sxfrctl1);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
static void configure_termination(struct ahc_softc *ahc,
struct seeprom_descriptor *sd,
Simplify my license. Don't arbitrarily limit the initiator ID of the card to something <= 7. Fix a bug in the checksum code that would incorrectly prevent a valid checksum of zero. (cp) Don't touch rely on seeprom data when configuring termination. We may not have seeprom data. (cp) Treat all ULTRA2 capable adapters the same way when reading or writing the BRDCTL register. We previously only did this correctly for aic7890/91 chips. This should correct some problems with termination settings on aic7896/97 adapters. (cp) Changes marked with "(cp)" Pointed out by: Chuck Paterson <cp@bsdi.com>
1999-12-06 18:29:03 +00:00
u_int adapter_control,
Add untested code to support the aha2930U2W. Modify to deal with changes in the storage of user negotiation settings.
1999-03-05 23:28:36 +00:00
u_int *sxfrctl1);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
static void ahc_new_term_detect(struct ahc_softc *ahc,
Fix parity error detection logic for aic7880 and aic7895 chips during the probe of external SRAM. Approved by: jkh@FreeBSD.org
2000-02-09 21:00:22 +00:00
int *enableSEC_low,
int *enableSEC_high,
int *enablePRI_low,
int *enablePRI_high,
int *eeprom_present);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
static void aic787X_cable_detect(struct ahc_softc *ahc, int *internal50_present,
int *internal68_present,
int *externalcable_present,
int *eeprom_present);
static void aic785X_cable_detect(struct ahc_softc *ahc, int *internal50_present,
int *externalcable_present,
int *eeprom_present);
static int acquire_seeprom(struct ahc_softc *ahc,
struct seeprom_descriptor *sd);
static void release_seeprom(struct seeprom_descriptor *sd);
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
static void write_brdctl(struct ahc_softc *ahc, uint8_t value);
static uint8_t read_brdctl(struct ahc_softc *ahc);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
static struct ahc_softc *first_398X;
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
static int ahc_pci_probe(device_t dev);
static int ahc_pci_attach(device_t dev);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
/* Exported for use in the ahc_intr routine */
void ahc_pci_intr(struct ahc_softc *ahc);
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
static device_method_t ahc_pci_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, ahc_pci_probe),
DEVMETHOD(device_attach, ahc_pci_attach),
{ 0, 0 }
};
static driver_t ahc_pci_driver = {
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
"ahc",
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
ahc_pci_methods,
sizeof(struct ahc_softc)
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
};
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
static devclass_t ahc_devclass;
DRIVER_MODULE(ahc, pci, ahc_pci_driver, ahc_devclass, 0, 0);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
static struct ahc_pci_identity *
ahc_find_pci_device(device_t dev)
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
{
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
uint64_t full_id;
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
struct ahc_pci_identity *entry;
u_int i;
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
Take the subvendor and subdevice ids into account during device probe. Sync up device Ids with the master Adaptec list. Add probe support for the 2940 Pro although it isn't obvious that all of the termination support is correct for this adapter yet.
1999-05-14 05:09:24 +00:00
full_id = ahc_compose_id(pci_get_device(dev),
pci_get_vendor(dev),
pci_get_subdevice(dev),
pci_get_subvendor(dev));
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
for (i = 0; i < ahc_num_pci_devs; i++) {
entry = &ahc_pci_ident_table[i];
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
if (entry->full_id == (full_id & entry->id_mask))
return (entry);
}
return (NULL);
}
static int
ahc_pci_probe(device_t dev)
{
struct ahc_pci_identity *entry;
entry = ahc_find_pci_device(dev);
if (entry != NULL) {
device_set_desc(dev, entry->name);
return (0);
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
}
return (ENXIO);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
}
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
static int
ahc_pci_attach(device_t dev)
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
{
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
struct ahc_probe_config probe_config;
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
bus_dma_tag_t parent_dmat;
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
struct ahc_pci_identity *entry;
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
struct resource *regs;
struct ahc_softc *ahc;
struct scb_data *shared_scb_data;
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
u_int command;
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
int regs_type;
int regs_id;
u_int our_id = 0;
u_int sxfrctl1;
u_int scsiseq;
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
u_int dscommand0;
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
int error;
int zero;
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
uint8_t sblkctl;
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
shared_scb_data = NULL;
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
command = pci_read_config(dev, PCIR_COMMAND, /*bytes*/1);
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
entry = ahc_find_pci_device(dev);
if (entry == NULL)
return (ENXIO);
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_init_probe_config(&probe_config);
error = entry->setup(dev, &probe_config);
probe_config.chip |= AHC_PCI;
probe_config.description = entry->name;
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
if (error != 0)
return (error);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
regs = NULL;
regs_type = 0;
regs_id = 0;
#ifdef AHC_ALLOW_MEMIO
if ((command & PCIM_CMD_MEMEN) != 0) {
regs_type = SYS_RES_MEMORY;
regs_id = AHC_PCI_MEMADDR;
regs = bus_alloc_resource(dev, regs_type,
&regs_id, 0, ~0, 1, RF_ACTIVE);
}
#endif
Use the correct register names, not the FreeBSD 2.2 compatability ones.
2000-05-28 15:47:00 +00:00
if (regs == NULL && (command & PCIM_CMD_PORTEN) != 0) {
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
regs_type = SYS_RES_IOPORT;
regs_id = AHC_PCI_IOADDR;
regs = bus_alloc_resource(dev, regs_type,
&regs_id, 0, ~0, 1, RF_ACTIVE);
}
if (regs == NULL) {
device_printf(dev, "can't allocate register resources\n");
return (ENOMEM);
}
/* Ensure busmastering is enabled */
command |= PCIM_CMD_BUSMASTEREN;
pci_write_config(dev, PCIR_COMMAND, command, /*bytes*/1);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
/* Allocate a dmatag for our SCB DMA maps */
/* XXX Should be a child of the PCI bus dma tag */
Fix a long standing bug in the auto-termination control settings for the aic7890/91/96/97 cards. This could cause the system to go into a long retry/recovery loop during probe. Fix the alignment argument to bus_dma_tag_create(). Don't set the CACHETHEN bit in dscommand0 for Ultra2 controllers until we know more about its behavior. The description for this bit makes it sound like it could cause problems with certain PCI chipsets.
1999-08-16 02:33:46 +00:00
error = bus_dma_tag_create(/*parent*/NULL, /*alignment*/1,
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
/*boundary*/0,
/*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
/*highaddr*/BUS_SPACE_MAXADDR,
/*filter*/NULL, /*filterarg*/NULL,
/*maxsize*/MAXBSIZE, /*nsegments*/AHC_NSEG,
/*maxsegsz*/AHC_MAXTRANSFER_SIZE,
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
/*flags*/BUS_DMA_ALLOCNOW, &parent_dmat);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
if (error != 0) {
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
printf("ahc_pci_attach: Could not allocate DMA tag "
"- error %d\n", error);
return (ENOMEM);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
}
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
/* On all PCI adapters, we allow SCB paging */
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
probe_config.flags |= AHC_PAGESCBS;
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
if ((ahc = ahc_alloc(dev, regs, regs_type, regs_id, parent_dmat,
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
&probe_config, shared_scb_data)) == NULL)
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
return (ENOMEM);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
/* Store our PCI bus information for use in our PCI error handler */
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
ahc->device = dev;
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
/* Remeber how the card was setup in case there is no SEEPROM */
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
pause_sequencer(ahc);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
if ((ahc->features & AHC_ULTRA2) != 0)
our_id = ahc_inb(ahc, SCSIID_ULTRA2) & OID;
else
our_id = ahc_inb(ahc, SCSIID) & OID;
sxfrctl1 = ahc_inb(ahc, SXFRCTL1) & STPWEN;
scsiseq = ahc_inb(ahc, SCSISEQ);
if (ahc_reset(ahc) != 0) {
/* Failed */
ahc_free(ahc);
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
return (ENXIO);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
}
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
if ((ahc->features & AHC_DT) != 0) {
u_int sfunct;
/* Perform ALT-Mode Setup */
sfunct = ahc_inb(ahc, SFUNCT) & ~ALT_MODE;
ahc_outb(ahc, SFUNCT, sfunct | ALT_MODE);
ahc_outb(ahc, OPTIONMODE, OPTIONMODE_DEFAULTS);
/* Send CRC info in target mode every 4K */
ahc_outb(ahc, TARGCRCCNT, 0);
ahc_outb(ahc, TARGCRCCNT + 1, 0x10);
ahc_outb(ahc, SFUNCT, sfunct);
/* Normal mode setup */
ahc_outb(ahc, CRCCONTROL1, CRCVALCHKEN|CRCENDCHKEN|CRCREQCHKEN
|TARGCRCENDEN|TARGCRCCNTEN);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
}
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
zero = 0;
ahc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &zero,
0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
if (ahc->irq == NULL) {
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
ahc_free(ahc);
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
return (ENOMEM);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
}
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
ahc->irq_res_type = SYS_RES_IRQ;
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
dscommand0 = ahc_inb(ahc, DSCOMMAND0);
dscommand0 |= MPARCKEN;
if ((ahc->features & AHC_ULTRA2) != 0) {
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
/*
* DPARCKEN doesn't work correctly on
* some MBs so don't use it.
*/
dscommand0 &= ~DPARCKEN;
ahc_pci.c: Disable "cache line streaming" for aic7890/91 Rev A chips. I have never seen these chips fail using this feature, but some of Adaptec's regression tests have. Explicitly set "cache line streaming" to on for aic7896/97 chips. This was happening before, but this documents the fact that these chips will not function correctly without CACHETHEEN set. aic7xxx.h: Add new bug types. Fix a typo in a comment. aic7xxx.reg: Add a definition for the SHVALID bit in SSTAT3 for Ultra2/3 chips. This bit inicates whether the bottom most (current) element in the S/G fifo has exhausted its data count. aic7xxx.seq: Be more careful in how we turn off the secondary DMA channel. Being less careful may hang the PCI bus arbitor that negotiates between the two DMA engines. Remove an unecessary and incorrect flag set operation in the overrun case. On Ultra2/3 controllers, clear the dma FIFO before starting to handle an overrun. We don't want any residual bytes from the beginning of the overrun to cause the code that shuts down the DMA engine from hanging because the FIFO is not (and never will be) empty. If the data fifo is empty by the time we notice that a read transaction has completed, there is no need to hit the flush bit on aic7890/91 hardware that will not perform an auto-flush. Skip some cycles by short circuiting the manual flush code in this case. When transitioning out of data phase, make sure that we have the next S/G element loaded for the following reconnect if there is more work to do. The code would do this in most cases before, but there was a small window where the current S/G element could be exhausted before our fetch of the next S/G element completed. Since the S/G fetch is already initiated at this point, it makes sense to just wait for the segment to arrive instead of incuring even more latency by canceling the fetch and initiating it later. Fast path the end of data phase handling for the last S/G segment. In the general case, we might have worked ahead a bit by stuffing the S/G FIFO with additional segments. If we stop before using them all, we need to fixup our location in the S/G stream. Since we can't work past the last S/G segment, no fixups are ever required if we stop somewhere in that final segment. Fix a little buglet in the target mode dma bug handler. We were employing the workaround in all cases instead of only for the chips that require it. Fix the cause of SCB timeouts and possible "lost data" during read operations on the aic7890. When sending a data on any Ultra2/3 controller, the final segment must be marked as such so the FIFO will be flushed and cleaned up correctly when the transfer is ended. We failed to do this for the CDB transfer and so, if the target immediately transfered from command to data phase without an intervening disconnection, the first segment transferred would be any residual bytes from the cdb transfer. The Ultra160 controllers for some reason were not affected by this problem. Many Thanks to Tor Egge for bringing the aic7890 problem to my attention, providing analysis, as well as a mechanism to reproduce the problem.
2000-07-27 23:17:52 +00:00
/*
* We default to using 32byte SCBs
* and using cacheline streaming.
* If external SCB ram is detected,
* we'll switch to using 64 byte SCBs.
*/
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
dscommand0 |= CACHETHEN|USCBSIZE32;
}
ahc_pci.c: Disable "cache line streaming" for aic7890/91 Rev A chips. I have never seen these chips fail using this feature, but some of Adaptec's regression tests have. Explicitly set "cache line streaming" to on for aic7896/97 chips. This was happening before, but this documents the fact that these chips will not function correctly without CACHETHEEN set. aic7xxx.h: Add new bug types. Fix a typo in a comment. aic7xxx.reg: Add a definition for the SHVALID bit in SSTAT3 for Ultra2/3 chips. This bit inicates whether the bottom most (current) element in the S/G fifo has exhausted its data count. aic7xxx.seq: Be more careful in how we turn off the secondary DMA channel. Being less careful may hang the PCI bus arbitor that negotiates between the two DMA engines. Remove an unecessary and incorrect flag set operation in the overrun case. On Ultra2/3 controllers, clear the dma FIFO before starting to handle an overrun. We don't want any residual bytes from the beginning of the overrun to cause the code that shuts down the DMA engine from hanging because the FIFO is not (and never will be) empty. If the data fifo is empty by the time we notice that a read transaction has completed, there is no need to hit the flush bit on aic7890/91 hardware that will not perform an auto-flush. Skip some cycles by short circuiting the manual flush code in this case. When transitioning out of data phase, make sure that we have the next S/G element loaded for the following reconnect if there is more work to do. The code would do this in most cases before, but there was a small window where the current S/G element could be exhausted before our fetch of the next S/G element completed. Since the S/G fetch is already initiated at this point, it makes sense to just wait for the segment to arrive instead of incuring even more latency by canceling the fetch and initiating it later. Fast path the end of data phase handling for the last S/G segment. In the general case, we might have worked ahead a bit by stuffing the S/G FIFO with additional segments. If we stop before using them all, we need to fixup our location in the S/G stream. Since we can't work past the last S/G segment, no fixups are ever required if we stop somewhere in that final segment. Fix a little buglet in the target mode dma bug handler. We were employing the workaround in all cases instead of only for the chips that require it. Fix the cause of SCB timeouts and possible "lost data" during read operations on the aic7890. When sending a data on any Ultra2/3 controller, the final segment must be marked as such so the FIFO will be flushed and cleaned up correctly when the transfer is ended. We failed to do this for the CDB transfer and so, if the target immediately transfered from command to data phase without an intervening disconnection, the first segment transferred would be any residual bytes from the cdb transfer. The Ultra160 controllers for some reason were not affected by this problem. Many Thanks to Tor Egge for bringing the aic7890 problem to my attention, providing analysis, as well as a mechanism to reproduce the problem.
2000-07-27 23:17:52 +00:00
/*
* Handle chips that must have cache line
* streaming (dis/en)abled.
*/
if ((ahc->bugs & AHC_CACHETHEN_DIS_BUG) != 0)
dscommand0 |= CACHETHEN;
if ((ahc->bugs & AHC_CACHETHEN_BUG) != 0)
dscommand0 &= ~CACHETHEN;
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_outb(ahc, DSCOMMAND0, dscommand0);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
/* See if we have a SEEPROM and perform auto-term */
check_extport(ahc, &sxfrctl1);
Turn on parity error reporting before configuring external sram. This makes it a little easier to notice that parity checking an 8bit sram isn't working. Turn on scb and internal data-path parity checking for all pci chips types. We were only doing this for ultra2 chips. After clearing the parity interrupt status, clear the BRKADRINT. This avoids seeing a bogus BRKADRINT interrupt after external SCB probing once normal interrupts are enabled.
2000-01-08 05:31:38 +00:00
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
/*
* Take the LED out of diagnostic mode
*/
sblkctl = ahc_inb(ahc, SBLKCTL);
ahc_outb(ahc, SBLKCTL, (sblkctl & ~(DIAGLEDEN|DIAGLEDON)));
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
/*
* I don't know where this is set in the SEEPROM or by the
* BIOS, so we default to 100% on Ultra or slower controllers
* and 75% on ULTRA2 controllers.
*/
if ((ahc->features & AHC_ULTRA2) != 0) {
ahc_outb(ahc, DFF_THRSH, RD_DFTHRSH_75|WR_DFTHRSH_75);
} else {
ahc_outb(ahc, DSPCISTATUS, DFTHRSH_100);
}
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
if (ahc->flags & AHC_USEDEFAULTS) {
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
/*
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
* PCI Adapter default setup
* Should only be used if the adapter does not have
* an SEEPROM.
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
*/
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
/* See if someone else set us up already */
if (scsiseq != 0) {
printf("%s: Using left over BIOS settings\n",
ahc_name(ahc));
ahc->flags &= ~AHC_USEDEFAULTS;
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
} else {
/*
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
* Assume only one connector and always turn
* on termination.
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
*/
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
our_id = 0x07;
sxfrctl1 = STPWEN;
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
}
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_outb(ahc, SCSICONF, our_id|ENSPCHK|RESET_SCSI);
ahc->our_id = our_id;
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
}
Turn on parity error reporting before configuring external sram. This makes it a little easier to notice that parity checking an 8bit sram isn't working. Turn on scb and internal data-path parity checking for all pci chips types. We were only doing this for ultra2 chips. After clearing the parity interrupt status, clear the BRKADRINT. This avoids seeing a bogus BRKADRINT interrupt after external SCB probing once normal interrupts are enabled.
2000-01-08 05:31:38 +00:00
/*
* Take a look to see if we have external SRAM.
* We currently do not attempt to use SRAM that is
* shared among multiple controllers.
*/
ahc_probe_ext_scbram(ahc);
printf("%s: %s ", ahc_name(ahc),
ahc_chip_names[ahc->chip & AHC_CHIPID_MASK]);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
/*
* Record our termination setting for the
* generic initialization routine.
*/
if ((sxfrctl1 & STPWEN) != 0)
ahc->flags |= AHC_TERM_ENB_A;
if (ahc_init(ahc)) {
ahc_free(ahc);
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
return (ENOMEM);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
}
/* XXX Crude hack - fix sometime */
if (ahc->flags & AHC_SHARED_SRAM) {
/* Only set this once we've successfully probed */
if (shared_scb_data == NULL)
first_398X = ahc;
}
ahc_attach(ahc);
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
return (0);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
}
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
/*
* Test for the presense of external sram in an
* "unshared" configuration.
*/
static int
ahc_ext_scbram_present(struct ahc_softc *ahc)
{
int ramps;
int single_user;
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
uint32_t devconfig;
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
devconfig = pci_read_config(ahc->device, DEVCONFIG, /*bytes*/4);
single_user = (devconfig & MPORTMODE) != 0;
if ((ahc->features & AHC_ULTRA2) != 0)
ramps = (ahc_inb(ahc, DSCOMMAND0) & RAMPS) != 0;
Really enable external SCB ram on Ultra2 capable controllers. Don't even bother to look for SCB ram on controllers < aic7870. Clear any parity errors generated by looking at external SCB ram.
2000-01-08 00:32:08 +00:00
else if ((ahc->chip & AHC_CHIPID_MASK) >= AHC_AIC7870)
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
ramps = (devconfig & RAMPSM) != 0;
Really enable external SCB ram on Ultra2 capable controllers. Don't even bother to look for SCB ram on controllers < aic7870. Clear any parity errors generated by looking at external SCB ram.
2000-01-08 00:32:08 +00:00
else
ramps = 0;
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
if (ramps && single_user)
return (1);
return (0);
}
/*
* Enable external scbram.
*/
static void
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_scbram_config(struct ahc_softc *ahc, int enable, int pcheck,
int fast, int large)
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
{
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
uint32_t devconfig;
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
if (ahc->features & AHC_MULTI_FUNC) {
/*
* Set the SCB Base addr (highest address bit)
* depending on which channel we are.
*/
ahc_outb(ahc, SCBBADDR, pci_get_function(ahc->device));
}
devconfig = pci_read_config(ahc->device, DEVCONFIG, /*bytes*/4);
if ((ahc->features & AHC_ULTRA2) != 0) {
u_int dscommand0;
dscommand0 = ahc_inb(ahc, DSCOMMAND0);
if (enable)
dscommand0 &= ~INTSCBRAMSEL;
Really enable external SCB ram on Ultra2 capable controllers. Don't even bother to look for SCB ram on controllers < aic7870. Clear any parity errors generated by looking at external SCB ram.
2000-01-08 00:32:08 +00:00
else
dscommand0 |= INTSCBRAMSEL;
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
if (large)
dscommand0 |= USCBSIZE32;
else
dscommand0 &= ~USCBSIZE32;
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
ahc_outb(ahc, DSCOMMAND0, dscommand0);
} else {
if (fast)
devconfig &= ~EXTSCBTIME;
else
devconfig |= EXTSCBTIME;
if (enable)
devconfig &= ~SCBRAMSEL;
else
devconfig |= SCBRAMSEL;
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
if (large)
devconfig &= ~SCBSIZE32;
else
devconfig |= SCBSIZE32;
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
}
if (pcheck)
devconfig |= EXTSCBPEN;
else
devconfig &= ~EXTSCBPEN;
pci_write_config(ahc->device, DEVCONFIG, devconfig, /*bytes*/4);
}
/*
* Take a look to see if we have external SRAM.
* We currently do not attempt to use SRAM that is
* shared among multiple controllers.
*/
static void
ahc_probe_ext_scbram(struct ahc_softc *ahc)
{
int num_scbs;
int test_num_scbs;
int enable;
int pcheck;
int fast;
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
int large;
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
enable = FALSE;
pcheck = FALSE;
fast = FALSE;
large = FALSE;
num_scbs = 0;
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
if (ahc_ext_scbram_present(ahc) == 0)
return;
/*
* Probe for the best parameters to use.
*/
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_scbram_config(ahc, /*enable*/TRUE, pcheck, fast, large);
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
num_scbs = ahc_probe_scbs(ahc);
if (num_scbs == 0) {
/* The SRAM wasn't really present. */
goto done;
}
enable = TRUE;
Fix parity error detection logic for aic7880 and aic7895 chips during the probe of external SRAM. Approved by: jkh@FreeBSD.org
2000-02-09 21:00:22 +00:00
/*
* Clear any outstanding parity error
* and ensure that parity error reporting
* is enabled.
*/
ahc_outb(ahc, SEQCTL, 0);
ahc_outb(ahc, CLRINT, CLRPARERR);
ahc_outb(ahc, CLRINT, CLRBRKADRINT);
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
/* Now see if we can do parity */
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_scbram_config(ahc, enable, /*pcheck*/TRUE, fast, large);
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
num_scbs = ahc_probe_scbs(ahc);
if ((ahc_inb(ahc, INTSTAT) & BRKADRINT) == 0
|| (ahc_inb(ahc, ERROR) & MPARERR) == 0)
pcheck = TRUE;
Turn on parity error reporting before configuring external sram. This makes it a little easier to notice that parity checking an 8bit sram isn't working. Turn on scb and internal data-path parity checking for all pci chips types. We were only doing this for ultra2 chips. After clearing the parity interrupt status, clear the BRKADRINT. This avoids seeing a bogus BRKADRINT interrupt after external SCB probing once normal interrupts are enabled.
2000-01-08 05:31:38 +00:00
/* Clear any resulting parity error */
Really enable external SCB ram on Ultra2 capable controllers. Don't even bother to look for SCB ram on controllers < aic7870. Clear any parity errors generated by looking at external SCB ram.
2000-01-08 00:32:08 +00:00
ahc_outb(ahc, CLRINT, CLRPARERR);
Turn on parity error reporting before configuring external sram. This makes it a little easier to notice that parity checking an 8bit sram isn't working. Turn on scb and internal data-path parity checking for all pci chips types. We were only doing this for ultra2 chips. After clearing the parity interrupt status, clear the BRKADRINT. This avoids seeing a bogus BRKADRINT interrupt after external SCB probing once normal interrupts are enabled.
2000-01-08 05:31:38 +00:00
ahc_outb(ahc, CLRINT, CLRBRKADRINT);
Really enable external SCB ram on Ultra2 capable controllers. Don't even bother to look for SCB ram on controllers < aic7870. Clear any parity errors generated by looking at external SCB ram.
2000-01-08 00:32:08 +00:00
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
/* Now see if we can do fast timing */
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_scbram_config(ahc, enable, pcheck, /*fast*/TRUE, large);
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
test_num_scbs = ahc_probe_scbs(ahc);
if (test_num_scbs == num_scbs
&& ((ahc_inb(ahc, INTSTAT) & BRKADRINT) == 0
|| (ahc_inb(ahc, ERROR) & MPARERR) == 0))
fast = TRUE;
Really enable external SCB ram on Ultra2 capable controllers. Don't even bother to look for SCB ram on controllers < aic7870. Clear any parity errors generated by looking at external SCB ram.
2000-01-08 00:32:08 +00:00
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
/*
* See if we can use large SCBs and still maintain
* the same overall count of SCBs.
*/
if ((ahc->features & AHC_LARGE_SCBS) != 0) {
ahc_scbram_config(ahc, enable, pcheck, fast, /*large*/TRUE);
test_num_scbs = ahc_probe_scbs(ahc);
if (test_num_scbs >= num_scbs) {
large = TRUE;
num_scbs = test_num_scbs;
}
if (num_scbs >= 64)
/*
* We have enough space to move the "busy targets
* table" into SCB space and make it qualify all
* the way to the lun level.
*/
ahc->flags |= AHC_SCB_BTT;
}
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
done:
Fix parity error detection logic for aic7880 and aic7895 chips during the probe of external SRAM. Approved by: jkh@FreeBSD.org
2000-02-09 21:00:22 +00:00
/*
* Disable parity error reporting until we
* can load instruction ram.
*/
ahc_outb(ahc, SEQCTL, PERRORDIS|FAILDIS);
/* Clear any latched parity error */
Really enable external SCB ram on Ultra2 capable controllers. Don't even bother to look for SCB ram on controllers < aic7870. Clear any parity errors generated by looking at external SCB ram.
2000-01-08 00:32:08 +00:00
ahc_outb(ahc, CLRINT, CLRPARERR);
Turn on parity error reporting before configuring external sram. This makes it a little easier to notice that parity checking an 8bit sram isn't working. Turn on scb and internal data-path parity checking for all pci chips types. We were only doing this for ultra2 chips. After clearing the parity interrupt status, clear the BRKADRINT. This avoids seeing a bogus BRKADRINT interrupt after external SCB probing once normal interrupts are enabled.
2000-01-08 05:31:38 +00:00
ahc_outb(ahc, CLRINT, CLRBRKADRINT);
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
if (bootverbose && enable) {
Fix parity error detection logic for aic7880 and aic7895 chips during the probe of external SRAM. Approved by: jkh@FreeBSD.org
2000-02-09 21:00:22 +00:00
printf("%s: External SRAM, %s access%s\n",
ahc_name(ahc), fast ? "fast" : "slow",
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
pcheck ? ", parity checking enabled" : "");
}
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_scbram_config(ahc, enable, pcheck, fast, large);
}
static int
verify_cksum(struct seeprom_config *sc)
{
int i;
int maxaddr;
uint32_t checksum;
uint16_t *scarray;
maxaddr = (sizeof(*sc)/2) - 1;
checksum = 0;
scarray = (uint16_t *)sc;
for (i = 0; i < maxaddr; i++)
checksum = checksum + scarray[i];
if (checksum == 0
|| (checksum & 0xFFFF) != sc->checksum) {
return (0);
} else {
return(1);
}
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
}
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
/*
* Check the external port logic for a serial eeprom
* and termination/cable detection contrls.
*/
static void
Add untested code to support the aha2930U2W. Modify to deal with changes in the storage of user negotiation settings.
1999-03-05 23:28:36 +00:00
check_extport(struct ahc_softc *ahc, u_int *sxfrctl1)
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
{
struct seeprom_descriptor sd;
struct seeprom_config sc;
Simplify my license. Don't arbitrarily limit the initiator ID of the card to something <= 7. Fix a bug in the checksum code that would incorrectly prevent a valid checksum of zero. (cp) Don't touch rely on seeprom data when configuring termination. We may not have seeprom data. (cp) Treat all ULTRA2 capable adapters the same way when reading or writing the BRDCTL register. We previously only did this correctly for aic7890/91 chips. This should correct some problems with termination settings on aic7896/97 adapters. (cp) Changes marked with "(cp)" Pointed out by: Chuck Paterson <cp@bsdi.com>
1999-12-06 18:29:03 +00:00
u_int scsi_conf;
u_int adapter_control;
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
int have_seeprom;
Simplify my license. Don't arbitrarily limit the initiator ID of the card to something <= 7. Fix a bug in the checksum code that would incorrectly prevent a valid checksum of zero. (cp) Don't touch rely on seeprom data when configuring termination. We may not have seeprom data. (cp) Treat all ULTRA2 capable adapters the same way when reading or writing the BRDCTL register. We previously only did this correctly for aic7890/91 chips. This should correct some problems with termination settings on aic7896/97 adapters. (cp) Changes marked with "(cp)" Pointed out by: Chuck Paterson <cp@bsdi.com>
1999-12-06 18:29:03 +00:00
int have_autoterm;
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
sd.sd_tag = ahc->tag;
sd.sd_bsh = ahc->bsh;
sd.sd_control_offset = SEECTL;
sd.sd_status_offset = SEECTL;
sd.sd_dataout_offset = SEECTL;
/*
* For some multi-channel devices, the c46 is simply too
* small to work. For the other controller types, we can
* get our information from either SEEPROM type. Set the
* type to start our probe with accordingly.
*/
if (ahc->flags & AHC_LARGE_SEEPROM)
sd.sd_chip = C56_66;
else
sd.sd_chip = C46;
sd.sd_MS = SEEMS;
sd.sd_RDY = SEERDY;
sd.sd_CS = SEECS;
sd.sd_CK = SEECK;
sd.sd_DO = SEEDO;
sd.sd_DI = SEEDI;
have_seeprom = acquire_seeprom(ahc, &sd);
if (have_seeprom) {
if (bootverbose)
printf("%s: Reading SEEPROM...", ahc_name(ahc));
for (;;) {
bus_size_t start_addr;
start_addr = 32 * (ahc->channel - 'A');
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
have_seeprom = read_seeprom(&sd, (uint16_t *)&sc,
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
start_addr, sizeof(sc)/2);
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
if (have_seeprom)
have_seeprom = verify_cksum(&sc);
if (have_seeprom != 0 || sd.sd_chip == C56_66) {
if (bootverbose) {
if (have_seeprom == 0)
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
printf ("checksum error\n");
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
else
printf ("done.\n");
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
}
break;
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
}
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
sd.sd_chip = C56_66;
}
}
*smack* #if 0, not #ifdef 0.
2000-08-04 18:17:45 +00:00
#if 0
The check_extport() function appears to have some new code in it that checks the scratch RAM for data normally found in the SEEPROM (presumably in the event that the SEEPROM is unavailable or can't be read). This code causes a spontaneous reboot on monster.osd.bsdi.com, which has an embedded aic7880 controller. The problem appears to happen either when it writes to the SCBPTR port and then reads from the SCB_CONTROL port. Somewhere during the inb/outb operations, the system has a heart attack and restarts. This code looks very suspicious, particularly since it has unconditionalized debug mesages such as "Got here!" and "And it even worked!". With this block #ifdef'ed out, the machine boots and runs properly. I stronly suggest that it stay #ifdef'ed out until it's properly tested.
2000-08-04 18:09:56 +00:00
/*
* This code causes a machine with an aic7880 chipset
* to reboot spontaneously. Whatever it's supposed to do,
* it's doing it wrong. -wpaul
*/
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
if (!have_seeprom) {
/*
* Pull scratch ram settings and treat them as
* if they are the contents of an seeprom if
* the 'ADPT' signature is found in SCB2.
*/
ahc_outb(ahc, SCBPTR, 2);
if (ahc_inb(ahc, SCB_CONTROL) == 'A'
&& ahc_inb(ahc, SCB_CONTROL + 1) == 'D'
&& ahc_inb(ahc, SCB_CONTROL + 2) == 'P'
&& ahc_inb(ahc, SCB_CONTROL + 3) == 'T') {
uint8_t *sc_bytes;
int i;
printf("Got Here!\n");
sc_bytes = (uint8_t *)&sc;
for (i = 0; i < 64; i++)
sc_bytes[i] = ahc_inb(ahc, TARG_SCSIRATE + i);
/* Byte 0x1c is stored in byte 4 of SCB2 */
sc_bytes[0x1c] = ahc_inb(ahc, SCB_CONTROL + 4);
have_seeprom = verify_cksum(&sc);
if (have_seeprom)
printf("And it even worked!\n");
}
}
The check_extport() function appears to have some new code in it that checks the scratch RAM for data normally found in the SEEPROM (presumably in the event that the SEEPROM is unavailable or can't be read). This code causes a spontaneous reboot on monster.osd.bsdi.com, which has an embedded aic7880 controller. The problem appears to happen either when it writes to the SCBPTR port and then reads from the SCB_CONTROL port. Somewhere during the inb/outb operations, the system has a heart attack and restarts. This code looks very suspicious, particularly since it has unconditionalized debug mesages such as "Got here!" and "And it even worked!". With this block #ifdef'ed out, the machine boots and runs properly. I stronly suggest that it stay #ifdef'ed out until it's properly tested.
2000-08-04 18:09:56 +00:00
#endif
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
if (!have_seeprom) {
if (bootverbose)
printf("%s: No SEEPROM available.\n", ahc_name(ahc));
ahc->flags |= AHC_USEDEFAULTS;
} else {
/*
* Put the data we've collected down into SRAM
* where ahc_init will find it.
*/
int i;
int max_targ = sc.max_targets & CFMAXTARG;
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
uint16_t discenable;
uint16_t ultraenb;
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
Add untested code to support the aha2930U2W. Modify to deal with changes in the storage of user negotiation settings.
1999-03-05 23:28:36 +00:00
discenable = 0;
ultraenb = 0;
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
if ((sc.adapter_control & CFULTRAEN) != 0) {
/*
* Determine if this adapter has a "newstyle"
* SEEPROM format.
*/
for (i = 0; i < max_targ; i++) {
if ((sc.device_flags[i] & CFSYNCHISULTRA) != 0){
ahc->flags |= AHC_NEWEEPROM_FMT;
break;
}
}
}
for (i = 0; i < max_targ; i++) {
u_int scsirate;
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
uint16_t target_mask;
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
target_mask = 0x01 << i;
if (sc.device_flags[i] & CFDISC)
Add untested code to support the aha2930U2W. Modify to deal with changes in the storage of user negotiation settings.
1999-03-05 23:28:36 +00:00
discenable |= target_mask;
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
if ((ahc->flags & AHC_NEWEEPROM_FMT) != 0) {
if ((sc.device_flags[i] & CFSYNCHISULTRA) != 0)
Add untested code to support the aha2930U2W. Modify to deal with changes in the storage of user negotiation settings.
1999-03-05 23:28:36 +00:00
ultraenb |= target_mask;
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
} else if ((sc.adapter_control & CFULTRAEN) != 0) {
Add untested code to support the aha2930U2W. Modify to deal with changes in the storage of user negotiation settings.
1999-03-05 23:28:36 +00:00
ultraenb |= target_mask;
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
}
if ((sc.device_flags[i] & CFXFER) == 0x04
Add untested code to support the aha2930U2W. Modify to deal with changes in the storage of user negotiation settings.
1999-03-05 23:28:36 +00:00
&& (ultraenb & target_mask) != 0) {
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
/* Treat 10MHz as a non-ultra speed */
sc.device_flags[i] &= ~CFXFER;
Add untested code to support the aha2930U2W. Modify to deal with changes in the storage of user negotiation settings.
1999-03-05 23:28:36 +00:00
ultraenb &= ~target_mask;
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
}
if ((ahc->features & AHC_ULTRA2) != 0) {
u_int offset;
if (sc.device_flags[i] & CFSYNCH)
offset = MAX_OFFSET_ULTRA2;
else
offset = 0;
ahc_outb(ahc, TARG_OFFSET + i, offset);
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
/*
* The ultra enable bits contain the
* high bit of the ultra2 sync rate
* field.
*/
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
scsirate = (sc.device_flags[i] & CFXFER)
Add untested code to support the aha2930U2W. Modify to deal with changes in the storage of user negotiation settings.
1999-03-05 23:28:36 +00:00
| ((ultraenb & target_mask)
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
? 0x8 : 0x0);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
if (sc.device_flags[i] & CFWIDEB)
scsirate |= WIDEXFER;
} else {
scsirate = (sc.device_flags[i] & CFXFER) << 4;
if (sc.device_flags[i] & CFSYNCH)
scsirate |= SOFS;
if (sc.device_flags[i] & CFWIDEB)
scsirate |= WIDEXFER;
}
ahc_outb(ahc, TARG_SCSIRATE + i, scsirate);
}
ahc->our_id = sc.brtime_id & CFSCSIID;
scsi_conf = (ahc->our_id & 0x7);
if (sc.adapter_control & CFSPARITY)
scsi_conf |= ENSPCHK;
if (sc.adapter_control & CFRESETB)
scsi_conf |= RESET_SCSI;
if (sc.bios_control & CFEXTEND)
ahc->flags |= AHC_EXTENDED_TRANS_A;
if (ahc->features & AHC_ULTRA
&& (ahc->flags & AHC_NEWEEPROM_FMT) == 0) {
/* Should we enable Ultra mode? */
if (!(sc.adapter_control & CFULTRAEN))
/* Treat us as a non-ultra card */
Add untested code to support the aha2930U2W. Modify to deal with changes in the storage of user negotiation settings.
1999-03-05 23:28:36 +00:00
ultraenb = 0;
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
}
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
if (sc.signature == CFSIGNATURE) {
uint32_t devconfig;
/* Honor the STPWLEVEL settings */
devconfig = pci_read_config(ahc->device, DEVCONFIG,
/*bytes*/4);
devconfig &= ~STPWLEVEL;
if ((sc.bios_control & CFSTPWLEVEL) != 0)
devconfig |= STPWLEVEL;
pci_write_config(ahc->device, DEVCONFIG,
devconfig, /*bytes*/4);
}
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
/* Set SCSICONF info */
ahc_outb(ahc, SCSICONF, scsi_conf);
Add untested code to support the aha2930U2W. Modify to deal with changes in the storage of user negotiation settings.
1999-03-05 23:28:36 +00:00
ahc_outb(ahc, DISC_DSB, ~(discenable & 0xff));
ahc_outb(ahc, DISC_DSB + 1, ~((discenable >> 8) & 0xff));
ahc_outb(ahc, ULTRA_ENB, ultraenb & 0xff);
ahc_outb(ahc, ULTRA_ENB + 1, (ultraenb >> 8) & 0xff);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
}
Simplify my license. Don't arbitrarily limit the initiator ID of the card to something <= 7. Fix a bug in the checksum code that would incorrectly prevent a valid checksum of zero. (cp) Don't touch rely on seeprom data when configuring termination. We may not have seeprom data. (cp) Treat all ULTRA2 capable adapters the same way when reading or writing the BRDCTL register. We previously only did this correctly for aic7890/91 chips. This should correct some problems with termination settings on aic7896/97 adapters. (cp) Changes marked with "(cp)" Pointed out by: Chuck Paterson <cp@bsdi.com>
1999-12-06 18:29:03 +00:00
/*
* Cards that have the external logic necessary to talk to
* a SEEPROM, are almost certain to have the remaining logic
* necessary for auto-termination control. This assumption
* hasn't failed yet...
*/
have_autoterm = have_seeprom;
if (have_seeprom)
adapter_control = sc.adapter_control;
else
adapter_control = CFAUTOTERM;
/*
* Some low-cost chips have SEEPROM and auto-term control built
* in, instead of using a GAL. They can tell us directly
* if the termination logic is enabled.
*/
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
if ((ahc->features & AHC_SPIOCAP) != 0) {
Simplify my license. Don't arbitrarily limit the initiator ID of the card to something <= 7. Fix a bug in the checksum code that would incorrectly prevent a valid checksum of zero. (cp) Don't touch rely on seeprom data when configuring termination. We may not have seeprom data. (cp) Treat all ULTRA2 capable adapters the same way when reading or writing the BRDCTL register. We previously only did this correctly for aic7890/91 chips. This should correct some problems with termination settings on aic7896/97 adapters. (cp) Changes marked with "(cp)" Pointed out by: Chuck Paterson <cp@bsdi.com>
1999-12-06 18:29:03 +00:00
if ((ahc_inb(ahc, SPIOCAP) & SSPIOCPS) != 0)
have_autoterm = TRUE;
else
have_autoterm = FALSE;
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
}
Simplify my license. Don't arbitrarily limit the initiator ID of the card to something <= 7. Fix a bug in the checksum code that would incorrectly prevent a valid checksum of zero. (cp) Don't touch rely on seeprom data when configuring termination. We may not have seeprom data. (cp) Treat all ULTRA2 capable adapters the same way when reading or writing the BRDCTL register. We previously only did this correctly for aic7890/91 chips. This should correct some problems with termination settings on aic7896/97 adapters. (cp) Changes marked with "(cp)" Pointed out by: Chuck Paterson <cp@bsdi.com>
1999-12-06 18:29:03 +00:00
if (have_autoterm)
configure_termination(ahc, &sd, adapter_control, sxfrctl1);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
release_seeprom(&sd);
}
static void
configure_termination(struct ahc_softc *ahc,
struct seeprom_descriptor *sd,
Simplify my license. Don't arbitrarily limit the initiator ID of the card to something <= 7. Fix a bug in the checksum code that would incorrectly prevent a valid checksum of zero. (cp) Don't touch rely on seeprom data when configuring termination. We may not have seeprom data. (cp) Treat all ULTRA2 capable adapters the same way when reading or writing the BRDCTL register. We previously only did this correctly for aic7890/91 chips. This should correct some problems with termination settings on aic7896/97 adapters. (cp) Changes marked with "(cp)" Pointed out by: Chuck Paterson <cp@bsdi.com>
1999-12-06 18:29:03 +00:00
u_int adapter_control,
Add untested code to support the aha2930U2W. Modify to deal with changes in the storage of user negotiation settings.
1999-03-05 23:28:36 +00:00
u_int *sxfrctl1)
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
{
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
uint8_t brddat;
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
brddat = 0;
/*
* Update the settings in sxfrctl1 to match the
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
* termination settings
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
*/
*sxfrctl1 = 0;
/*
* SEECS must be on for the GALS to latch
* the data properly. Be sure to leave MS
* on or we will release the seeprom.
*/
SEEPROM_OUTB(sd, sd->sd_MS | sd->sd_CS);
Simplify my license. Don't arbitrarily limit the initiator ID of the card to something <= 7. Fix a bug in the checksum code that would incorrectly prevent a valid checksum of zero. (cp) Don't touch rely on seeprom data when configuring termination. We may not have seeprom data. (cp) Treat all ULTRA2 capable adapters the same way when reading or writing the BRDCTL register. We previously only did this correctly for aic7890/91 chips. This should correct some problems with termination settings on aic7896/97 adapters. (cp) Changes marked with "(cp)" Pointed out by: Chuck Paterson <cp@bsdi.com>
1999-12-06 18:29:03 +00:00
if ((adapter_control & CFAUTOTERM) != 0
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
|| (ahc->features & AHC_NEW_TERMCTL) != 0) {
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
int internal50_present;
int internal68_present;
int externalcable_present;
int eeprom_present;
int enableSEC_low;
int enableSEC_high;
int enablePRI_low;
int enablePRI_high;
enableSEC_low = 0;
enableSEC_high = 0;
enablePRI_low = 0;
enablePRI_high = 0;
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
if ((ahc->features & AHC_NEW_TERMCTL) != 0) {
ahc_new_term_detect(ahc, &enableSEC_low,
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
&enableSEC_high,
&enablePRI_low,
&enablePRI_high,
&eeprom_present);
Simplify my license. Don't arbitrarily limit the initiator ID of the card to something <= 7. Fix a bug in the checksum code that would incorrectly prevent a valid checksum of zero. (cp) Don't touch rely on seeprom data when configuring termination. We may not have seeprom data. (cp) Treat all ULTRA2 capable adapters the same way when reading or writing the BRDCTL register. We previously only did this correctly for aic7890/91 chips. This should correct some problems with termination settings on aic7896/97 adapters. (cp) Changes marked with "(cp)" Pointed out by: Chuck Paterson <cp@bsdi.com>
1999-12-06 18:29:03 +00:00
if ((adapter_control & CFSEAUTOTERM) == 0) {
When booting verbose, indicate if we are using manual termination settings for U2 cards. Don't assume that all aic7859 cards are 2930CUs.
1999-12-12 04:54:14 +00:00
if (bootverbose)
printf("%s: Manual SE Termination\n",
ahc_name(ahc));
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
enableSEC_low = (adapter_control & CFSELOWTERM);
enableSEC_high =
(adapter_control & CFSEHIGHTERM);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
}
Simplify my license. Don't arbitrarily limit the initiator ID of the card to something <= 7. Fix a bug in the checksum code that would incorrectly prevent a valid checksum of zero. (cp) Don't touch rely on seeprom data when configuring termination. We may not have seeprom data. (cp) Treat all ULTRA2 capable adapters the same way when reading or writing the BRDCTL register. We previously only did this correctly for aic7890/91 chips. This should correct some problems with termination settings on aic7896/97 adapters. (cp) Changes marked with "(cp)" Pointed out by: Chuck Paterson <cp@bsdi.com>
1999-12-06 18:29:03 +00:00
if ((adapter_control & CFAUTOTERM) == 0) {
When booting verbose, indicate if we are using manual termination settings for U2 cards. Don't assume that all aic7859 cards are 2930CUs.
1999-12-12 04:54:14 +00:00
if (bootverbose)
printf("%s: Manual LVD Termination\n",
ahc_name(ahc));
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
enablePRI_low = (adapter_control & CFSTERM);
enablePRI_high = (adapter_control & CFWSTERM);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
}
/* Make the table calculations below happy */
internal50_present = 0;
internal68_present = 1;
externalcable_present = 1;
} else if ((ahc->features & AHC_SPIOCAP) != 0) {
aic785X_cable_detect(ahc, &internal50_present,
&externalcable_present,
&eeprom_present);
} else {
aic787X_cable_detect(ahc, &internal50_present,
&internal68_present,
&externalcable_present,
&eeprom_present);
}
Simplify my license. Don't arbitrarily limit the initiator ID of the card to something <= 7. Fix a bug in the checksum code that would incorrectly prevent a valid checksum of zero. (cp) Don't touch rely on seeprom data when configuring termination. We may not have seeprom data. (cp) Treat all ULTRA2 capable adapters the same way when reading or writing the BRDCTL register. We previously only did this correctly for aic7890/91 chips. This should correct some problems with termination settings on aic7896/97 adapters. (cp) Changes marked with "(cp)" Pointed out by: Chuck Paterson <cp@bsdi.com>
1999-12-06 18:29:03 +00:00
if ((ahc->features & AHC_WIDE) == 0)
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
internal68_present = 0;
if (bootverbose) {
if ((ahc->features & AHC_ULTRA2) == 0) {
printf("%s: internal 50 cable %s present, "
"internal 68 cable %s present\n",
ahc_name(ahc),
internal50_present ? "is":"not",
internal68_present ? "is":"not");
printf("%s: external cable %s present\n",
ahc_name(ahc),
externalcable_present ? "is":"not");
}
printf("%s: BIOS eeprom %s present\n",
ahc_name(ahc), eeprom_present ? "is" : "not");
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
}
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
if ((ahc->flags & AHC_INT50_SPEEDFLEX) != 0) {
/*
* The 50 pin connector is a separate bus,
* so force it to always be terminated.
* In the future, perform current sensing
* to determine if we are in the middle of
* a properly terminated bus.
*/
internal50_present = 0;
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
}
/*
* Now set the termination based on what
* we found.
* Flash Enable = BRDDAT7
* Secondary High Term Enable = BRDDAT6
* Secondary Low Term Enable = BRDDAT5 (7890)
* Primary High Term Enable = BRDDAT4 (7890)
*/
if ((ahc->features & AHC_ULTRA2) == 0
&& (internal50_present != 0)
&& (internal68_present != 0)
&& (externalcable_present != 0)) {
printf("%s: Illegal cable configuration!!. "
"Only two connectors on the "
"adapter may be used at a "
"time!\n", ahc_name(ahc));
}
Simplify my license. Don't arbitrarily limit the initiator ID of the card to something <= 7. Fix a bug in the checksum code that would incorrectly prevent a valid checksum of zero. (cp) Don't touch rely on seeprom data when configuring termination. We may not have seeprom data. (cp) Treat all ULTRA2 capable adapters the same way when reading or writing the BRDCTL register. We previously only did this correctly for aic7890/91 chips. This should correct some problems with termination settings on aic7896/97 adapters. (cp) Changes marked with "(cp)" Pointed out by: Chuck Paterson <cp@bsdi.com>
1999-12-06 18:29:03 +00:00
if ((ahc->features & AHC_WIDE) != 0
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
&& ((externalcable_present == 0)
|| (internal68_present == 0)
|| (enableSEC_high != 0))) {
brddat |= BRDDAT6;
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
if (bootverbose) {
if ((ahc->flags & AHC_INT50_SPEEDFLEX) != 0)
printf("%s: 68 pin termination "
"Enabled\n", ahc_name(ahc));
else
printf("%s: %sHigh byte termination "
"Enabled\n", ahc_name(ahc),
enableSEC_high ? "Secondary "
: "");
}
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
}
if (((internal50_present ? 1 : 0)
+ (internal68_present ? 1 : 0)
+ (externalcable_present ? 1 : 0)) <= 1
|| (enableSEC_low != 0)) {
if ((ahc->features & AHC_ULTRA2) != 0)
brddat |= BRDDAT5;
else
*sxfrctl1 |= STPWEN;
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
if (bootverbose) {
if ((ahc->flags & AHC_INT50_SPEEDFLEX) != 0)
printf("%s: 50 pin termination "
"Enabled\n", ahc_name(ahc));
else
printf("%s: %sLow byte termination "
"Enabled\n", ahc_name(ahc),
enableSEC_low ? "Secondary "
: "");
}
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
}
if (enablePRI_low != 0) {
*sxfrctl1 |= STPWEN;
if (bootverbose)
printf("%s: Primary Low Byte termination "
"Enabled\n", ahc_name(ahc));
}
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
/*
* Setup STPWEN before setting up the rest of
* the termination per the tech note on the U160 cards.
*/
ahc_outb(ahc, SXFRCTL1, *sxfrctl1);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
if (enablePRI_high != 0) {
brddat |= BRDDAT4;
if (bootverbose)
printf("%s: Primary High Byte "
"termination Enabled\n",
ahc_name(ahc));
}
write_brdctl(ahc, brddat);
} else {
Simplify my license. Don't arbitrarily limit the initiator ID of the card to something <= 7. Fix a bug in the checksum code that would incorrectly prevent a valid checksum of zero. (cp) Don't touch rely on seeprom data when configuring termination. We may not have seeprom data. (cp) Treat all ULTRA2 capable adapters the same way when reading or writing the BRDCTL register. We previously only did this correctly for aic7890/91 chips. This should correct some problems with termination settings on aic7896/97 adapters. (cp) Changes marked with "(cp)" Pointed out by: Chuck Paterson <cp@bsdi.com>
1999-12-06 18:29:03 +00:00
if ((adapter_control & CFSTERM) != 0) {
*sxfrctl1 |= STPWEN;
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
if (bootverbose)
printf("%s: %sLow byte termination Enabled\n",
ahc_name(ahc),
(ahc->features & AHC_ULTRA2) ? "Primary "
: "");
}
Simplify my license. Don't arbitrarily limit the initiator ID of the card to something <= 7. Fix a bug in the checksum code that would incorrectly prevent a valid checksum of zero. (cp) Don't touch rely on seeprom data when configuring termination. We may not have seeprom data. (cp) Treat all ULTRA2 capable adapters the same way when reading or writing the BRDCTL register. We previously only did this correctly for aic7890/91 chips. This should correct some problems with termination settings on aic7896/97 adapters. (cp) Changes marked with "(cp)" Pointed out by: Chuck Paterson <cp@bsdi.com>
1999-12-06 18:29:03 +00:00
if ((adapter_control & CFWSTERM) != 0) {
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
brddat |= BRDDAT6;
if (bootverbose)
printf("%s: %sHigh byte termination Enabled\n",
ahc_name(ahc),
(ahc->features & AHC_ULTRA2)
? "Secondary " : "");
}
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
/*
* Setup STPWEN before setting up the rest of
* the termination per the tech note on the U160 cards.
*/
ahc_outb(ahc, SXFRCTL1, *sxfrctl1);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
write_brdctl(ahc, brddat);
}
SEEPROM_OUTB(sd, sd->sd_MS); /* Clear CS */
}
static void
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
ahc_new_term_detect(struct ahc_softc *ahc, int *enableSEC_low,
int *enableSEC_high, int *enablePRI_low,
int *enablePRI_high, int *eeprom_present)
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
{
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
uint8_t brdctl;
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
/*
* BRDDAT7 = Eeprom
* BRDDAT6 = Enable Secondary High Byte termination
* BRDDAT5 = Enable Secondary Low Byte termination
Fix a long standing bug in the auto-termination control settings for the aic7890/91/96/97 cards. This could cause the system to go into a long retry/recovery loop during probe. Fix the alignment argument to bus_dma_tag_create(). Don't set the CACHETHEN bit in dscommand0 for Ultra2 controllers until we know more about its behavior. The description for this bit makes it sound like it could cause problems with certain PCI chipsets.
1999-08-16 02:33:46 +00:00
* BRDDAT4 = Enable Primary high byte termination
* BRDDAT3 = Enable Primary low byte termination
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
*/
brdctl = read_brdctl(ahc);
*eeprom_present = brdctl & BRDDAT7;
*enableSEC_high = (brdctl & BRDDAT6);
*enableSEC_low = (brdctl & BRDDAT5);
Fix a long standing bug in the auto-termination control settings for the aic7890/91/96/97 cards. This could cause the system to go into a long retry/recovery loop during probe. Fix the alignment argument to bus_dma_tag_create(). Don't set the CACHETHEN bit in dscommand0 for Ultra2 controllers until we know more about its behavior. The description for this bit makes it sound like it could cause problems with certain PCI chipsets.
1999-08-16 02:33:46 +00:00
*enablePRI_high = (brdctl & BRDDAT4);
*enablePRI_low = (brdctl & BRDDAT3);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
}
static void
aic787X_cable_detect(struct ahc_softc *ahc, int *internal50_present,
int *internal68_present, int *externalcable_present,
int *eeprom_present)
{
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
uint8_t brdctl;
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
/*
* First read the status of our cables.
* Set the rom bank to 0 since the
* bank setting serves as a multiplexor
* for the cable detection logic.
* BRDDAT5 controls the bank switch.
*/
write_brdctl(ahc, 0);
/*
* Now read the state of the internal
* connectors. BRDDAT6 is INT50 and
* BRDDAT7 is INT68.
*/
brdctl = read_brdctl(ahc);
*internal50_present = !(brdctl & BRDDAT6);
*internal68_present = !(brdctl & BRDDAT7);
/*
* Set the rom bank to 1 and determine
* the other signals.
*/
write_brdctl(ahc, BRDDAT5);
/*
* Now read the state of the external
* connectors. BRDDAT6 is EXT68 and
* BRDDAT7 is EPROMPS.
*/
brdctl = read_brdctl(ahc);
*externalcable_present = !(brdctl & BRDDAT6);
*eeprom_present = brdctl & BRDDAT7;
}
static void
aic785X_cable_detect(struct ahc_softc *ahc, int *internal50_present,
int *externalcable_present, int *eeprom_present)
{
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
uint8_t brdctl;
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
ahc_outb(ahc, BRDCTL, BRDRW|BRDCS);
ahc_outb(ahc, BRDCTL, 0);
brdctl = ahc_inb(ahc, BRDCTL);
*internal50_present = !(brdctl & BRDDAT5);
*externalcable_present = !(brdctl & BRDDAT6);
*eeprom_present = (ahc_inb(ahc, SPIOCAP) & EEPROM) != 0;
}
static int
acquire_seeprom(struct ahc_softc *ahc, struct seeprom_descriptor *sd)
{
int wait;
if ((ahc->features & AHC_SPIOCAP) != 0
&& (ahc_inb(ahc, SPIOCAP) & SEEPROM) == 0)
Add a masking scheme to allow for detection of unknown cards using a chip we think we understand. Correct identification entry for the AHA2950U2.
1999-05-17 21:53:09 +00:00
return (0);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
/*
* Request access of the memory port. When access is
* granted, SEERDY will go high. We use a 1 second
* timeout which should be near 1 second more than
* is needed. Reason: after the chip reset, there
* should be no contention.
*/
SEEPROM_OUTB(sd, sd->sd_MS);
wait = 1000; /* 1 second timeout in msec */
while (--wait && ((SEEPROM_STATUS_INB(sd) & sd->sd_RDY) == 0)) {
DELAY(1000); /* delay 1 msec */
}
if ((SEEPROM_STATUS_INB(sd) & sd->sd_RDY) == 0) {
SEEPROM_OUTB(sd, 0);
return (0);
}
return(1);
}
static void
KNR -> ANSI function definition in two places. This matches the rest of the code in this driver.
2000-03-18 22:15:00 +00:00
release_seeprom(struct seeprom_descriptor *sd)
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
{
/* Release access to the memory port and the serial EEPROM. */
SEEPROM_OUTB(sd, 0);
}
static void
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
write_brdctl(struct ahc_softc *ahc, uint8_t value)
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
{
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
uint8_t brdctl;
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
if ((ahc->chip & AHC_CHIPID_MASK) == AHC_AIC7895) {
brdctl = BRDSTB;
if (ahc->channel == 'B')
brdctl |= BRDCS;
Simplify my license. Don't arbitrarily limit the initiator ID of the card to something <= 7. Fix a bug in the checksum code that would incorrectly prevent a valid checksum of zero. (cp) Don't touch rely on seeprom data when configuring termination. We may not have seeprom data. (cp) Treat all ULTRA2 capable adapters the same way when reading or writing the BRDCTL register. We previously only did this correctly for aic7890/91 chips. This should correct some problems with termination settings on aic7896/97 adapters. (cp) Changes marked with "(cp)" Pointed out by: Chuck Paterson <cp@bsdi.com>
1999-12-06 18:29:03 +00:00
} else if ((ahc->features & AHC_ULTRA2) != 0) {
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
brdctl = 0;
} else {
brdctl = BRDSTB|BRDCS;
}
ahc_outb(ahc, BRDCTL, brdctl);
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
DELAY(20);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
brdctl |= value;
ahc_outb(ahc, BRDCTL, brdctl);
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
DELAY(20);
Simplify my license. Don't arbitrarily limit the initiator ID of the card to something <= 7. Fix a bug in the checksum code that would incorrectly prevent a valid checksum of zero. (cp) Don't touch rely on seeprom data when configuring termination. We may not have seeprom data. (cp) Treat all ULTRA2 capable adapters the same way when reading or writing the BRDCTL register. We previously only did this correctly for aic7890/91 chips. This should correct some problems with termination settings on aic7896/97 adapters. (cp) Changes marked with "(cp)" Pointed out by: Chuck Paterson <cp@bsdi.com>
1999-12-06 18:29:03 +00:00
if ((ahc->features & AHC_ULTRA2) != 0)
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
brdctl |= BRDSTB_ULTRA2;
else
brdctl &= ~BRDSTB;
ahc_outb(ahc, BRDCTL, brdctl);
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
DELAY(20);
Simplify my license. Don't arbitrarily limit the initiator ID of the card to something <= 7. Fix a bug in the checksum code that would incorrectly prevent a valid checksum of zero. (cp) Don't touch rely on seeprom data when configuring termination. We may not have seeprom data. (cp) Treat all ULTRA2 capable adapters the same way when reading or writing the BRDCTL register. We previously only did this correctly for aic7890/91 chips. This should correct some problems with termination settings on aic7896/97 adapters. (cp) Changes marked with "(cp)" Pointed out by: Chuck Paterson <cp@bsdi.com>
1999-12-06 18:29:03 +00:00
if ((ahc->features & AHC_ULTRA2) != 0)
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
brdctl = 0;
else
brdctl &= ~BRDCS;
ahc_outb(ahc, BRDCTL, brdctl);
}
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
static uint8_t
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
read_brdctl(ahc)
struct ahc_softc *ahc;
{
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
uint8_t brdctl;
uint8_t value;
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
if ((ahc->chip & AHC_CHIPID_MASK) == AHC_AIC7895) {
brdctl = BRDRW;
if (ahc->channel == 'B')
brdctl |= BRDCS;
Simplify my license. Don't arbitrarily limit the initiator ID of the card to something <= 7. Fix a bug in the checksum code that would incorrectly prevent a valid checksum of zero. (cp) Don't touch rely on seeprom data when configuring termination. We may not have seeprom data. (cp) Treat all ULTRA2 capable adapters the same way when reading or writing the BRDCTL register. We previously only did this correctly for aic7890/91 chips. This should correct some problems with termination settings on aic7896/97 adapters. (cp) Changes marked with "(cp)" Pointed out by: Chuck Paterson <cp@bsdi.com>
1999-12-06 18:29:03 +00:00
} else if ((ahc->features & AHC_ULTRA2) != 0) {
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
brdctl = BRDRW_ULTRA2;
} else {
brdctl = BRDRW|BRDCS;
}
ahc_outb(ahc, BRDCTL, brdctl);
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
DELAY(20);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
value = ahc_inb(ahc, BRDCTL);
ahc_outb(ahc, BRDCTL, 0);
return (value);
}
#define DPE 0x80
#define SSE 0x40
#define RMA 0x20
#define RTA 0x10
#define STA 0x08
#define DPR 0x01
void
ahc_pci_intr(struct ahc_softc *ahc)
{
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
uint8_t status1;
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
status1 = pci_read_config(ahc->device, PCIR_STATUS + 1, /*bytes*/1);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
if (status1 & DPE) {
printf("%s: Data Parity Error Detected during address "
"or write data phase\n", ahc_name(ahc));
}
if (status1 & SSE) {
printf("%s: Signal System Error Detected\n", ahc_name(ahc));
}
if (status1 & RMA) {
printf("%s: Received a Master Abort\n", ahc_name(ahc));
}
if (status1 & RTA) {
printf("%s: Received a Target Abort\n", ahc_name(ahc));
}
if (status1 & STA) {
printf("%s: Signaled a Target Abort\n", ahc_name(ahc));
}
if (status1 & DPR) {
printf("%s: Data Parity Error has been reported via PERR#\n",
ahc_name(ahc));
}
if ((status1 & (DPE|SSE|RMA|RTA|STA|DPR)) == 0) {
printf("%s: Latched PCIERR interrupt with "
"no status bits set\n", ahc_name(ahc));
}
ahc_pci.c: Convert to new bus and bus dma. Use latest PCI API. bt_pci.c: Fix a few bugs in how resourses are released left over from when this driver was converted to new bus.
1999-04-23 23:30:22 +00:00
pci_write_config(ahc->device, PCIR_STATUS + 1, status1, /*bytes*/1);
Move to new name, convert to CAM, add support for new chips, and correct lots of eeprom/auto-termination bugs.
1998-09-15 07:25:33 +00:00
if (status1 & (DPR|RMA|RTA)) {
ahc_outb(ahc, CLRINT, CLRPARERR);
}
}
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
static int
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_aic7850_setup(device_t dev, struct ahc_probe_config *probe_config)
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
{
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
probe_config->channel = 'A';
probe_config->chip = AHC_AIC7850;
probe_config->features = AHC_AIC7850_FE;
probe_config->bugs |= AHC_TMODE_WIDEODD_BUG;
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
return (0);
}
Add support for the aic7859 which is found on the 2930CU. Break out the detection logic for the aic7855 and properly report these chips as 7855s instead of 7850s. The 2940AU_CN is an aic7860 based card, not aic7860. Not setting CACHETHEN turned out to be a bad idea. It can cause spurious corruption under heavy PCI load with multiple masters.
1999-08-30 16:11:46 +00:00
static int
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_aic7855_setup(device_t dev, struct ahc_probe_config *probe_config)
Add support for the aic7859 which is found on the 2930CU. Break out the detection logic for the aic7855 and properly report these chips as 7855s instead of 7850s. The 2940AU_CN is an aic7860 based card, not aic7860. Not setting CACHETHEN turned out to be a bad idea. It can cause spurious corruption under heavy PCI load with multiple masters.
1999-08-30 16:11:46 +00:00
{
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
probe_config->channel = 'A';
probe_config->chip = AHC_AIC7855;
probe_config->features = AHC_AIC7855_FE;
probe_config->bugs |= AHC_TMODE_WIDEODD_BUG;
Add support for the aic7859 which is found on the 2930CU. Break out the detection logic for the aic7855 and properly report these chips as 7855s instead of 7850s. The 2940AU_CN is an aic7860 based card, not aic7860. Not setting CACHETHEN turned out to be a bad idea. It can cause spurious corruption under heavy PCI load with multiple masters.
1999-08-30 16:11:46 +00:00
return (0);
}
static int
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_aic7859_setup(device_t dev, struct ahc_probe_config *probe_config)
Add support for the aic7859 which is found on the 2930CU. Break out the detection logic for the aic7855 and properly report these chips as 7855s instead of 7850s. The 2940AU_CN is an aic7860 based card, not aic7860. Not setting CACHETHEN turned out to be a bad idea. It can cause spurious corruption under heavy PCI load with multiple masters.
1999-08-30 16:11:46 +00:00
{
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
probe_config->channel = 'A';
probe_config->chip = AHC_AIC7859;
probe_config->features = AHC_AIC7859_FE;
probe_config->bugs |= AHC_TMODE_WIDEODD_BUG;
Add support for the aic7859 which is found on the 2930CU. Break out the detection logic for the aic7855 and properly report these chips as 7855s instead of 7850s. The 2940AU_CN is an aic7860 based card, not aic7860. Not setting CACHETHEN turned out to be a bad idea. It can cause spurious corruption under heavy PCI load with multiple masters.
1999-08-30 16:11:46 +00:00
return (0);
}
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
static int
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_aic7860_setup(device_t dev, struct ahc_probe_config *probe_config)
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
{
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
probe_config->channel = 'A';
probe_config->chip = AHC_AIC7860;
probe_config->features = AHC_AIC7860_FE;
probe_config->bugs |= AHC_TMODE_WIDEODD_BUG;
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
return (0);
}
static int
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_aic7870_setup(device_t dev, struct ahc_probe_config *probe_config)
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
{
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
probe_config->channel = 'A';
probe_config->chip = AHC_AIC7870;
probe_config->features = AHC_AIC7870_FE;
probe_config->bugs |= AHC_TMODE_WIDEODD_BUG;
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
return (0);
}
static int
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_aha394X_setup(device_t dev, struct ahc_probe_config *probe_config)
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
{
int error;
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
error = ahc_aic7870_setup(dev, probe_config);
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
if (error == 0)
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
error = ahc_aha394XX_setup(dev, probe_config);
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
return (error);
}
static int
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_aha398X_setup(device_t dev, struct ahc_probe_config *probe_config)
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
{
int error;
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
error = ahc_aic7870_setup(dev, probe_config);
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
if (error == 0)
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
error = ahc_aha398XX_setup(dev, probe_config);
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
return (error);
}
static int
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_aha494X_setup(device_t dev, struct ahc_probe_config *probe_config)
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
{
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
int error;
error = ahc_aic7870_setup(dev, probe_config);
if (error == 0)
error = ahc_aha494XX_setup(dev, probe_config);
return (error);
}
static int
ahc_aic7880_setup(device_t dev, struct ahc_probe_config *probe_config)
{
probe_config->channel = 'A';
probe_config->chip = AHC_AIC7880;
probe_config->features = AHC_AIC7880_FE;
probe_config->bugs |= AHC_TMODE_WIDEODD_BUG;
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
return (0);
}
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
static int
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_2940Pro_setup(device_t dev, struct ahc_probe_config *probe_config)
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
{
int error;
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
probe_config->flags |= AHC_INT50_SPEEDFLEX;
error = ahc_aic7880_setup(dev, probe_config);
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
return (0);
}
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
static int
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_aha394XU_setup(device_t dev, struct ahc_probe_config *probe_config)
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
{
int error;
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
error = ahc_aic7880_setup(dev, probe_config);
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
if (error == 0)
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
error = ahc_aha394XX_setup(dev, probe_config);
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
return (error);
}
static int
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_aha398XU_setup(device_t dev, struct ahc_probe_config *probe_config)
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
{
int error;
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
error = ahc_aic7880_setup(dev, probe_config);
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
if (error == 0)
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
error = ahc_aha398XX_setup(dev, probe_config);
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
return (error);
}
static int
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_aic7890_setup(device_t dev, struct ahc_probe_config *probe_config)
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
{
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
probe_config->channel = 'A';
probe_config->chip = AHC_AIC7890;
probe_config->features = AHC_AIC7890_FE;
probe_config->flags |= AHC_NEWEEPROM_FMT;
if (pci_get_revid(dev) == 0)
ahc_pci.c: Disable "cache line streaming" for aic7890/91 Rev A chips. I have never seen these chips fail using this feature, but some of Adaptec's regression tests have. Explicitly set "cache line streaming" to on for aic7896/97 chips. This was happening before, but this documents the fact that these chips will not function correctly without CACHETHEEN set. aic7xxx.h: Add new bug types. Fix a typo in a comment. aic7xxx.reg: Add a definition for the SHVALID bit in SSTAT3 for Ultra2/3 chips. This bit inicates whether the bottom most (current) element in the S/G fifo has exhausted its data count. aic7xxx.seq: Be more careful in how we turn off the secondary DMA channel. Being less careful may hang the PCI bus arbitor that negotiates between the two DMA engines. Remove an unecessary and incorrect flag set operation in the overrun case. On Ultra2/3 controllers, clear the dma FIFO before starting to handle an overrun. We don't want any residual bytes from the beginning of the overrun to cause the code that shuts down the DMA engine from hanging because the FIFO is not (and never will be) empty. If the data fifo is empty by the time we notice that a read transaction has completed, there is no need to hit the flush bit on aic7890/91 hardware that will not perform an auto-flush. Skip some cycles by short circuiting the manual flush code in this case. When transitioning out of data phase, make sure that we have the next S/G element loaded for the following reconnect if there is more work to do. The code would do this in most cases before, but there was a small window where the current S/G element could be exhausted before our fetch of the next S/G element completed. Since the S/G fetch is already initiated at this point, it makes sense to just wait for the segment to arrive instead of incuring even more latency by canceling the fetch and initiating it later. Fast path the end of data phase handling for the last S/G segment. In the general case, we might have worked ahead a bit by stuffing the S/G FIFO with additional segments. If we stop before using them all, we need to fixup our location in the S/G stream. Since we can't work past the last S/G segment, no fixups are ever required if we stop somewhere in that final segment. Fix a little buglet in the target mode dma bug handler. We were employing the workaround in all cases instead of only for the chips that require it. Fix the cause of SCB timeouts and possible "lost data" during read operations on the aic7890. When sending a data on any Ultra2/3 controller, the final segment must be marked as such so the FIFO will be flushed and cleaned up correctly when the transfer is ended. We failed to do this for the CDB transfer and so, if the target immediately transfered from command to data phase without an intervening disconnection, the first segment transferred would be any residual bytes from the cdb transfer. The Ultra160 controllers for some reason were not affected by this problem. Many Thanks to Tor Egge for bringing the aic7890 problem to my attention, providing analysis, as well as a mechanism to reproduce the problem.
2000-07-27 23:17:52 +00:00
probe_config->bugs |= AHC_AUTOFLUSH_BUG|AHC_CACHETHEN_BUG;
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
return (0);
}
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
static int
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_aic7892_setup(device_t dev, struct ahc_probe_config *probe_config)
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
{
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
probe_config->channel = 'A';
probe_config->chip = AHC_AIC7892;
probe_config->features = AHC_AIC7892_FE;
probe_config->flags |= AHC_NEWEEPROM_FMT;
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
return (0);
}
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
static int
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_aic7895_setup(device_t dev, struct ahc_probe_config *probe_config)
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
{
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
uint32_t devconfig;
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
probe_config->channel = pci_get_function(dev) == 1 ? 'B' : 'A';
probe_config->chip = AHC_AIC7895;
Differentiate between aic7895C chips and their earlier brethren via the PCI revid register.
1999-08-16 22:50:37 +00:00
/* The 'C' revision of the aic7895 has a few additional features */
if (pci_get_revid(dev) >= 4)
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
probe_config->features = AHC_AIC7895C_FE;
Differentiate between aic7895C chips and their earlier brethren via the PCI revid register.
1999-08-16 22:50:37 +00:00
else
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
probe_config->features = AHC_AIC7895_FE;
probe_config->bugs |= AHC_TMODE_WIDEODD_BUG;
probe_config->flags |= AHC_NEWEEPROM_FMT;
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
devconfig = pci_read_config(dev, DEVCONFIG, /*bytes*/4);
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
devconfig |= SCBSIZE32;
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
pci_write_config(dev, DEVCONFIG, devconfig, /*bytes*/4);
return (0);
}
static int
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_aic7896_setup(device_t dev, struct ahc_probe_config *probe_config)
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
{
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
probe_config->channel = pci_get_function(dev) == 1 ? 'B' : 'A';
probe_config->chip = AHC_AIC7896;
probe_config->features = AHC_AIC7896_FE;
probe_config->flags |= AHC_NEWEEPROM_FMT;
ahc_pci.c: Disable "cache line streaming" for aic7890/91 Rev A chips. I have never seen these chips fail using this feature, but some of Adaptec's regression tests have. Explicitly set "cache line streaming" to on for aic7896/97 chips. This was happening before, but this documents the fact that these chips will not function correctly without CACHETHEEN set. aic7xxx.h: Add new bug types. Fix a typo in a comment. aic7xxx.reg: Add a definition for the SHVALID bit in SSTAT3 for Ultra2/3 chips. This bit inicates whether the bottom most (current) element in the S/G fifo has exhausted its data count. aic7xxx.seq: Be more careful in how we turn off the secondary DMA channel. Being less careful may hang the PCI bus arbitor that negotiates between the two DMA engines. Remove an unecessary and incorrect flag set operation in the overrun case. On Ultra2/3 controllers, clear the dma FIFO before starting to handle an overrun. We don't want any residual bytes from the beginning of the overrun to cause the code that shuts down the DMA engine from hanging because the FIFO is not (and never will be) empty. If the data fifo is empty by the time we notice that a read transaction has completed, there is no need to hit the flush bit on aic7890/91 hardware that will not perform an auto-flush. Skip some cycles by short circuiting the manual flush code in this case. When transitioning out of data phase, make sure that we have the next S/G element loaded for the following reconnect if there is more work to do. The code would do this in most cases before, but there was a small window where the current S/G element could be exhausted before our fetch of the next S/G element completed. Since the S/G fetch is already initiated at this point, it makes sense to just wait for the segment to arrive instead of incuring even more latency by canceling the fetch and initiating it later. Fast path the end of data phase handling for the last S/G segment. In the general case, we might have worked ahead a bit by stuffing the S/G FIFO with additional segments. If we stop before using them all, we need to fixup our location in the S/G stream. Since we can't work past the last S/G segment, no fixups are ever required if we stop somewhere in that final segment. Fix a little buglet in the target mode dma bug handler. We were employing the workaround in all cases instead of only for the chips that require it. Fix the cause of SCB timeouts and possible "lost data" during read operations on the aic7890. When sending a data on any Ultra2/3 controller, the final segment must be marked as such so the FIFO will be flushed and cleaned up correctly when the transfer is ended. We failed to do this for the CDB transfer and so, if the target immediately transfered from command to data phase without an intervening disconnection, the first segment transferred would be any residual bytes from the cdb transfer. The Ultra160 controllers for some reason were not affected by this problem. Many Thanks to Tor Egge for bringing the aic7890 problem to my attention, providing analysis, as well as a mechanism to reproduce the problem.
2000-07-27 23:17:52 +00:00
probe_config->bugs |= AHC_CACHETHEN_DIS_BUG;
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
return (0);
}
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
static int
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_aic7899_setup(device_t dev, struct ahc_probe_config *probe_config)
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
{
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
probe_config->channel = pci_get_function(dev) == 1 ? 'B' : 'A';
probe_config->chip = AHC_AIC7899;
probe_config->features = AHC_AIC7899_FE;
probe_config->flags |= AHC_NEWEEPROM_FMT;
Add detection logic for the U160 family of adaptec controllers. These controllers will run at U2 speeds until I can complete the U160 support for this driver. Correct a termination buglet for the 2940UW-Pro. Be more paranoid in how we probe and enable external ram, fast external ram timing and external ram parity checking. We should now work on 20ns and 8bit SRAM parts. Perform initial setup for the DT feature on cards that support it. Factorize and clean up code. Use tables where it makes sense, etc. Add some delays in dealing with the board control logic. I've never seen this code fail, but with the ever increasing speed of processors, its better to insert deterministic delays just to be safe. This stuff is only touched during probe and attach, so the extra delay is of no concern.
2000-01-07 22:53:37 +00:00
return (0);
}
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
static int
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_raid_setup(device_t dev, struct ahc_probe_config *probe_config)
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
{
printf("RAID functionality unsupported\n");
return (ENXIO);
}
static int
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_aha394XX_setup(device_t dev, struct ahc_probe_config *probe_config)
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
{
switch (pci_get_slot(dev)) {
case AHC_394X_SLOT_CHANNEL_A:
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
probe_config->channel = 'A';
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
break;
case AHC_394X_SLOT_CHANNEL_B:
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
probe_config->channel = 'B';
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
break;
default:
printf("adapter at unexpected slot %d\n"
"unable to map to a channel\n",
pci_get_slot(dev));
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
probe_config->channel = 'A';
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
}
return (0);
}
static int
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
ahc_aha398XX_setup(device_t dev, struct ahc_probe_config *probe_config)
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
{
switch (pci_get_slot(dev)) {
case AHC_398X_SLOT_CHANNEL_A:
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
probe_config->channel = 'A';
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
break;
case AHC_398X_SLOT_CHANNEL_B:
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
probe_config->channel = 'B';
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
break;
case AHC_398X_SLOT_CHANNEL_C:
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
probe_config->channel = 'C';
break;
default:
printf("adapter at unexpected slot %d\n"
"unable to map to a channel\n",
pci_get_slot(dev));
probe_config->channel = 'A';
break;
}
probe_config->flags |= AHC_LARGE_SEEPROM;
return (0);
}
static int
ahc_aha494XX_setup(device_t dev, struct ahc_probe_config *probe_config)
{
switch (pci_get_slot(dev)) {
case AHC_494X_SLOT_CHANNEL_A:
probe_config->channel = 'A';
break;
case AHC_494X_SLOT_CHANNEL_B:
probe_config->channel = 'B';
break;
case AHC_494X_SLOT_CHANNEL_C:
probe_config->channel = 'C';
break;
case AHC_494X_SLOT_CHANNEL_D:
probe_config->channel = 'D';
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
break;
default:
printf("adapter at unexpected slot %d\n"
"unable to map to a channel\n",
pci_get_slot(dev));
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
probe_config->channel = 'A';
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
}
o Convert to <inttypes.h> style fixed sized types to facilitate porting to other systems. o Normalize copyright text. o Clean up probe code function interfaces by passing around a single structure of common arguments instead of passing "too many" args in each function call. o Add support for the AAA-131 as a SCSI adapter. o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net o Correct manual termination support for PCI cards. The bit definitions for manual termination control in the SEEPROM were incorrect. o Add support for extracting NVRAM information from SCB 2 for BIOSen that use this mechanism to pass this data to OS drivers. o Properly set the STPWLEVEL bit in PCI config space based on the setting in an SEEPROM. o Go back to useing 32byte SCBs for all controllers. The current firmware allows us to embed 12byte cdbs on all controllers in a 32byte SCB, and larger cdbs are rarely used, so it is a better use of this space to offer more SCBs (32). o Add support for U160 transfers. o Add an idle loop executed during data transfers that prefetches S/G segments on controllers that have a secondary DMA engine (aic789X). o Improve the performance of reselections by avoiding an extra one byte DMA in the case of an SCB lookup miss for the reselecting target. We now keep a 16byte "untagged target" array on the card for dealing with untagged reselections. If the controller has external SCB ram and can support 64byte SCBs, then we use an "untagged target/lun" array to maximize concurrency. Without external SCB ram, the controller is limited to one untagged transaction per target, auto-request sense operations excluded. o Correct the setup of the STPWEN bit in SXFRCTL1. This control line is tri-stated until set to one, so set it to one and then set it to the desired value. o Add tagged queuing support to our target role implementation. o Handle the common cases of the ignore wide residue message in firmware. o Add preliminary support for 39bit addressing. o Add support for assembling on big-endian machines. Big-endian support is not complete in the driver. o Correctly remove SCBs in the waiting for selection queue when freezing a device queue. o Now that we understand more about the autoflush bug on the aic7890, only use the workaround on devices that need it. o Add a workaround for the "aic7890 hangs the system when you attempt to pause it" problem. We can now pause the aic7890 safely regardless of what instruction it is executing.
2000-07-18 20:12:14 +00:00
probe_config->flags |= AHC_LARGE_SEEPROM;
Use a lookup table for device matching instead of a switch on a 64bit value. EGCS generates poor code for sparse switch statements on 64bit values. Requested by: bde
1999-05-14 17:38:07 +00:00
return (0);
}
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