2005-01-06 01:43:34 +00:00
|
|
|
/*-
|
1998-10-07 03:20:52 +00:00
|
|
|
* Device probe and attach routines for the following
|
|
|
|
* Advanced Systems Inc. SCSI controllers:
|
|
|
|
*
|
2000-02-03 16:34:57 +00:00
|
|
|
* ABP[3]940UW - Bus-Master PCI Ultra-Wide (253 CDB)
|
|
|
|
* ABP950UW - Dual Channel Bus-Master PCI Ultra-Wide (253 CDB/Channel)
|
2000-03-02 00:08:35 +00:00
|
|
|
* ABP970UW - Bus-Master PCI Ultra-Wide (253 CDB)
|
2000-02-03 16:34:57 +00:00
|
|
|
* ABP3940U2W - Bus-Master PCI LVD/Ultra2-Wide (253 CDB)
|
2000-03-02 00:08:35 +00:00
|
|
|
* ABP3950U2W - Bus-Master PCI LVD/Ultra2-Wide (253 CDB)
|
1998-10-07 03:20:52 +00:00
|
|
|
*
|
2000-02-03 16:34:57 +00:00
|
|
|
* Copyright (c) 1998, 1999, 2000 Justin Gibbs.
|
1998-10-07 03:20:52 +00:00
|
|
|
* All rights reserved.
|
|
|
|
*
|
|
|
|
* Redistribution and use in source and binary forms, with or without
|
|
|
|
* modification, are permitted provided that the following conditions
|
|
|
|
* are met:
|
|
|
|
* 1. Redistributions of source code must retain the above copyright
|
|
|
|
* notice, this list of conditions, and the following disclaimer,
|
2000-02-03 16:34:57 +00:00
|
|
|
* without modification.
|
1998-10-07 03:20:52 +00:00
|
|
|
* 2. The name of the author may not be used to endorse or promote products
|
|
|
|
* derived from this software without specific prior written permission.
|
|
|
|
*
|
|
|
|
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
|
|
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
|
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
|
|
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
|
|
|
|
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
|
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
|
|
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
|
|
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
|
|
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
|
|
|
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
|
|
|
* SUCH DAMAGE.
|
|
|
|
*/
|
|
|
|
|
2003-08-24 17:55:58 +00:00
|
|
|
#include <sys/cdefs.h>
|
|
|
|
__FBSDID("$FreeBSD$");
|
|
|
|
|
1998-10-07 03:20:52 +00:00
|
|
|
#include <sys/param.h>
|
|
|
|
#include <sys/systm.h>
|
|
|
|
#include <sys/kernel.h>
|
2000-02-03 16:34:57 +00:00
|
|
|
#include <sys/module.h>
|
2003-07-01 15:52:06 +00:00
|
|
|
#include <sys/lock.h>
|
|
|
|
#include <sys/mutex.h>
|
2000-02-03 16:34:57 +00:00
|
|
|
#include <sys/bus.h>
|
1998-10-07 03:20:52 +00:00
|
|
|
|
|
|
|
#include <machine/bus.h>
|
2000-02-03 16:34:57 +00:00
|
|
|
#include <machine/resource.h>
|
|
|
|
|
|
|
|
#include <sys/rman.h>
|
1998-10-07 03:20:52 +00:00
|
|
|
|
2003-08-22 05:54:52 +00:00
|
|
|
#include <dev/pci/pcireg.h>
|
|
|
|
#include <dev/pci/pcivar.h>
|
1998-10-07 03:20:52 +00:00
|
|
|
|
|
|
|
#include <cam/cam.h>
|
|
|
|
#include <cam/scsi/scsi_all.h>
|
|
|
|
|
|
|
|
#include <dev/advansys/adwvar.h>
|
|
|
|
#include <dev/advansys/adwlib.h>
|
|
|
|
#include <dev/advansys/adwmcode.h>
|
|
|
|
|
2003-09-02 17:30:40 +00:00
|
|
|
#define ADW_PCI_IOBASE PCIR_BAR(0) /* I/O Address */
|
|
|
|
#define ADW_PCI_MEMBASE PCIR_BAR(1) /* Mem I/O Address */
|
2000-02-03 16:34:57 +00:00
|
|
|
|
|
|
|
#define PCI_ID_ADVANSYS_3550 0x230010CD00000000ull
|
|
|
|
#define PCI_ID_ADVANSYS_38C0800_REV1 0x250010CD00000000ull
|
|
|
|
#define PCI_ID_ADVANSYS_38C1600_REV1 0x270010CD00000000ull
|
|
|
|
#define PCI_ID_ALL_MASK 0xFFFFFFFFFFFFFFFFull
|
|
|
|
#define PCI_ID_DEV_VENDOR_MASK 0xFFFFFFFF00000000ull
|
|
|
|
|
|
|
|
struct adw_pci_identity;
|
|
|
|
typedef int (adw_device_setup_t)(device_t, struct adw_pci_identity *,
|
|
|
|
struct adw_softc *adw);
|
|
|
|
|
|
|
|
struct adw_pci_identity {
|
|
|
|
u_int64_t full_id;
|
|
|
|
u_int64_t id_mask;
|
|
|
|
char *name;
|
|
|
|
adw_device_setup_t *setup;
|
|
|
|
const struct adw_mcode *mcode_data;
|
|
|
|
const struct adw_eeprom *default_eeprom;
|
|
|
|
};
|
|
|
|
|
|
|
|
static adw_device_setup_t adw_asc3550_setup;
|
|
|
|
static adw_device_setup_t adw_asc38C0800_setup;
|
|
|
|
#ifdef NOTYET
|
|
|
|
static adw_device_setup_t adw_asc38C1600_setup;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
struct adw_pci_identity adw_pci_ident_table[] =
|
|
|
|
{
|
|
|
|
/* asc3550 based controllers */
|
|
|
|
{
|
|
|
|
PCI_ID_ADVANSYS_3550,
|
|
|
|
PCI_ID_DEV_VENDOR_MASK,
|
|
|
|
"AdvanSys 3550 Ultra SCSI Adapter",
|
|
|
|
adw_asc3550_setup,
|
|
|
|
&adw_asc3550_mcode_data,
|
|
|
|
&adw_asc3550_default_eeprom
|
|
|
|
},
|
|
|
|
/* asc38C0800 based controllers */
|
|
|
|
{
|
|
|
|
PCI_ID_ADVANSYS_38C0800_REV1,
|
|
|
|
PCI_ID_DEV_VENDOR_MASK,
|
|
|
|
"AdvanSys 38C0800 Ultra2 SCSI Adapter",
|
|
|
|
adw_asc38C0800_setup,
|
|
|
|
&adw_asc38C0800_mcode_data,
|
|
|
|
&adw_asc38C0800_default_eeprom
|
|
|
|
},
|
|
|
|
#if NOTYET
|
|
|
|
/* XXX Disabled until I have hardware to test with */
|
|
|
|
/* asc38C1600 based controllers */
|
|
|
|
{
|
|
|
|
PCI_ID_ADVANSYS_38C1600_REV1,
|
|
|
|
PCI_ID_DEV_VENDOR_MASK,
|
|
|
|
"AdvanSys 38C1600 Ultra160 SCSI Adapter",
|
|
|
|
adw_asc38C1600_setup,
|
|
|
|
NULL, /* None provided by vendor thus far */
|
|
|
|
NULL /* None provided by vendor thus far */
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
};
|
1998-10-07 03:20:52 +00:00
|
|
|
|
2000-02-03 16:34:57 +00:00
|
|
|
static const int adw_num_pci_devs =
|
|
|
|
sizeof(adw_pci_ident_table) / sizeof(*adw_pci_ident_table);
|
1998-10-07 03:20:52 +00:00
|
|
|
|
|
|
|
#define ADW_PCI_MAX_DMA_ADDR (0xFFFFFFFFUL)
|
|
|
|
#define ADW_PCI_MAX_DMA_COUNT (0xFFFFFFFFUL)
|
|
|
|
|
2000-02-03 16:34:57 +00:00
|
|
|
static int adw_pci_probe(device_t dev);
|
|
|
|
static int adw_pci_attach(device_t dev);
|
1998-10-07 03:20:52 +00:00
|
|
|
|
2000-02-03 16:34:57 +00:00
|
|
|
static device_method_t adw_pci_methods[] = {
|
|
|
|
/* Device interface */
|
|
|
|
DEVMETHOD(device_probe, adw_pci_probe),
|
|
|
|
DEVMETHOD(device_attach, adw_pci_attach),
|
|
|
|
{ 0, 0 }
|
1998-10-07 03:20:52 +00:00
|
|
|
};
|
|
|
|
|
2000-02-03 16:34:57 +00:00
|
|
|
static driver_t adw_pci_driver = {
|
|
|
|
"adw",
|
|
|
|
adw_pci_methods,
|
|
|
|
sizeof(struct adw_softc)
|
|
|
|
};
|
|
|
|
|
|
|
|
static devclass_t adw_devclass;
|
|
|
|
|
|
|
|
DRIVER_MODULE(adw, pci, adw_pci_driver, adw_devclass, 0, 0);
|
|
|
|
|
|
|
|
static __inline u_int64_t
|
|
|
|
adw_compose_id(u_int device, u_int vendor, u_int subdevice, u_int subvendor)
|
|
|
|
{
|
|
|
|
u_int64_t id;
|
|
|
|
|
|
|
|
id = subvendor
|
|
|
|
| (subdevice << 16)
|
|
|
|
| ((u_int64_t)vendor << 32)
|
|
|
|
| ((u_int64_t)device << 48);
|
|
|
|
|
|
|
|
return (id);
|
|
|
|
}
|
1998-10-07 03:20:52 +00:00
|
|
|
|
2000-02-03 16:34:57 +00:00
|
|
|
static struct adw_pci_identity *
|
|
|
|
adw_find_pci_device(device_t dev)
|
1998-10-07 03:20:52 +00:00
|
|
|
{
|
2000-02-03 16:34:57 +00:00
|
|
|
u_int64_t full_id;
|
|
|
|
struct adw_pci_identity *entry;
|
|
|
|
u_int i;
|
|
|
|
|
|
|
|
full_id = adw_compose_id(pci_get_device(dev),
|
|
|
|
pci_get_vendor(dev),
|
|
|
|
pci_get_subdevice(dev),
|
|
|
|
pci_get_subvendor(dev));
|
|
|
|
|
|
|
|
for (i = 0; i < adw_num_pci_devs; i++) {
|
|
|
|
entry = &adw_pci_ident_table[i];
|
|
|
|
if (entry->full_id == (full_id & entry->id_mask))
|
|
|
|
return (entry);
|
1998-10-07 03:20:52 +00:00
|
|
|
}
|
|
|
|
return (NULL);
|
|
|
|
}
|
|
|
|
|
2000-02-03 16:34:57 +00:00
|
|
|
static int
|
|
|
|
adw_pci_probe(device_t dev)
|
|
|
|
{
|
|
|
|
struct adw_pci_identity *entry;
|
|
|
|
|
|
|
|
entry = adw_find_pci_device(dev);
|
|
|
|
if (entry != NULL) {
|
|
|
|
device_set_desc(dev, entry->name);
|
2005-03-05 19:24:22 +00:00
|
|
|
return (BUS_PROBE_DEFAULT);
|
2000-02-03 16:34:57 +00:00
|
|
|
}
|
|
|
|
return (ENXIO);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
adw_pci_attach(device_t dev)
|
1998-10-07 03:20:52 +00:00
|
|
|
{
|
2000-02-03 16:34:57 +00:00
|
|
|
struct adw_softc *adw;
|
|
|
|
struct adw_pci_identity *entry;
|
|
|
|
u_int32_t command;
|
|
|
|
struct resource *regs;
|
|
|
|
int regs_type;
|
|
|
|
int regs_id;
|
|
|
|
int error;
|
|
|
|
int zero;
|
|
|
|
|
|
|
|
command = pci_read_config(dev, PCIR_COMMAND, /*bytes*/1);
|
|
|
|
entry = adw_find_pci_device(dev);
|
|
|
|
if (entry == NULL)
|
|
|
|
return (ENXIO);
|
|
|
|
regs = NULL;
|
|
|
|
regs_type = 0;
|
|
|
|
regs_id = 0;
|
1998-12-07 21:58:50 +00:00
|
|
|
#ifdef ADW_ALLOW_MEMIO
|
2000-02-04 14:25:24 +00:00
|
|
|
if ((command & PCIM_CMD_MEMEN) != 0) {
|
2000-02-03 16:34:57 +00:00
|
|
|
regs_type = SYS_RES_MEMORY;
|
|
|
|
regs_id = ADW_PCI_MEMBASE;
|
2004-03-17 17:50:55 +00:00
|
|
|
regs = bus_alloc_resource_any(dev, regs_type,
|
|
|
|
®s_id, RF_ACTIVE);
|
2000-02-03 16:34:57 +00:00
|
|
|
}
|
1998-12-07 21:58:50 +00:00
|
|
|
#endif
|
2000-05-28 15:47:00 +00:00
|
|
|
if (regs == NULL && (command & PCIM_CMD_PORTEN) != 0) {
|
2000-02-03 16:34:57 +00:00
|
|
|
regs_type = SYS_RES_IOPORT;
|
|
|
|
regs_id = ADW_PCI_IOBASE;
|
2004-03-17 17:50:55 +00:00
|
|
|
regs = bus_alloc_resource_any(dev, regs_type,
|
|
|
|
®s_id, RF_ACTIVE);
|
2000-02-03 16:34:57 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
if (regs == NULL) {
|
|
|
|
device_printf(dev, "can't allocate register resources\n");
|
|
|
|
return (ENOMEM);
|
|
|
|
}
|
|
|
|
|
|
|
|
adw = adw_alloc(dev, regs, regs_type, regs_id);
|
|
|
|
if (adw == NULL)
|
|
|
|
return(ENOMEM);
|
1998-10-07 03:20:52 +00:00
|
|
|
|
|
|
|
/*
|
2000-02-03 16:34:57 +00:00
|
|
|
* Now that we have access to our registers, just verify that
|
|
|
|
* this really is an AdvanSys device.
|
1998-10-07 03:20:52 +00:00
|
|
|
*/
|
2000-02-03 16:34:57 +00:00
|
|
|
if (adw_find_signature(adw) == 0) {
|
|
|
|
adw_free(adw);
|
|
|
|
return (ENXIO);
|
1998-10-07 03:20:52 +00:00
|
|
|
}
|
|
|
|
|
2000-02-03 16:34:57 +00:00
|
|
|
adw_reset_chip(adw);
|
1998-10-07 03:20:52 +00:00
|
|
|
|
2000-02-03 16:34:57 +00:00
|
|
|
error = entry->setup(dev, entry, adw);
|
1998-10-07 03:20:52 +00:00
|
|
|
|
2000-02-03 16:34:57 +00:00
|
|
|
if (error != 0)
|
|
|
|
return (error);
|
|
|
|
|
|
|
|
/* Ensure busmastering is enabled */
|
|
|
|
command |= PCIM_CMD_BUSMASTEREN;
|
|
|
|
pci_write_config(dev, PCIR_COMMAND, command, /*bytes*/1);
|
1998-10-07 03:20:52 +00:00
|
|
|
|
|
|
|
/* Allocate a dmatag for our transfer DMA maps */
|
|
|
|
/* XXX Should be a child of the PCI bus dma tag */
|
2003-03-29 09:46:10 +00:00
|
|
|
error = bus_dma_tag_create(
|
|
|
|
/* parent */ NULL,
|
|
|
|
/* alignment */ 1,
|
|
|
|
/* boundary */ 0,
|
|
|
|
/* lowaddr */ ADW_PCI_MAX_DMA_ADDR,
|
|
|
|
/* highaddr */ BUS_SPACE_MAXADDR,
|
|
|
|
/* filter */ NULL,
|
|
|
|
/* filterarg */ NULL,
|
|
|
|
/* maxsize */ BUS_SPACE_MAXSIZE_32BIT,
|
|
|
|
/* nsegments */ ~0,
|
|
|
|
/* maxsegsz */ ADW_PCI_MAX_DMA_COUNT,
|
|
|
|
/* flags */ 0,
|
2003-07-01 15:52:06 +00:00
|
|
|
/* lockfunc */ busdma_lock_mutex,
|
|
|
|
/* lockarg */ &Giant,
|
2003-03-29 09:46:10 +00:00
|
|
|
&adw->parent_dmat);
|
1998-10-07 03:20:52 +00:00
|
|
|
|
|
|
|
adw->init_level++;
|
|
|
|
|
|
|
|
if (error != 0) {
|
|
|
|
printf("%s: Could not allocate DMA tag - error %d\n",
|
|
|
|
adw_name(adw), error);
|
|
|
|
adw_free(adw);
|
2000-02-03 16:34:57 +00:00
|
|
|
return (error);
|
1998-10-07 03:20:52 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
adw->init_level++;
|
|
|
|
|
2000-02-03 16:34:57 +00:00
|
|
|
error = adw_init(adw);
|
|
|
|
if (error != 0) {
|
1998-10-07 03:20:52 +00:00
|
|
|
adw_free(adw);
|
2000-02-03 16:34:57 +00:00
|
|
|
return (error);
|
1998-10-07 03:20:52 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If the PCI Configuration Command Register "Parity Error Response
|
|
|
|
* Control" Bit was clear (0), then set the microcode variable
|
|
|
|
* 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode
|
|
|
|
* to ignore DMA parity errors.
|
|
|
|
*/
|
|
|
|
if ((command & PCIM_CMD_PERRESPEN) == 0)
|
|
|
|
adw_lram_write_16(adw, ADW_MC_CONTROL_FLAG,
|
|
|
|
adw_lram_read_16(adw, ADW_MC_CONTROL_FLAG)
|
|
|
|
| ADW_MC_CONTROL_IGN_PERR);
|
|
|
|
|
2000-02-03 16:34:57 +00:00
|
|
|
zero = 0;
|
|
|
|
adw->irq_res_type = SYS_RES_IRQ;
|
2004-03-17 17:50:55 +00:00
|
|
|
adw->irq = bus_alloc_resource_any(dev, adw->irq_res_type, &zero,
|
|
|
|
RF_ACTIVE | RF_SHAREABLE);
|
2000-02-03 16:34:57 +00:00
|
|
|
if (adw->irq == NULL) {
|
1998-10-07 03:20:52 +00:00
|
|
|
adw_free(adw);
|
2000-02-03 16:34:57 +00:00
|
|
|
return (ENOMEM);
|
1998-10-07 03:20:52 +00:00
|
|
|
}
|
2000-02-03 16:34:57 +00:00
|
|
|
|
|
|
|
error = adw_attach(adw);
|
|
|
|
if (error != 0)
|
|
|
|
adw_free(adw);
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
adw_generic_setup(device_t dev, struct adw_pci_identity *entry,
|
|
|
|
struct adw_softc *adw)
|
|
|
|
{
|
|
|
|
adw->channel = pci_get_function(dev) == 1 ? 'B' : 'A';
|
|
|
|
adw->chip = ADW_CHIP_NONE;
|
|
|
|
adw->features = ADW_FENONE;
|
|
|
|
adw->flags = ADW_FNONE;
|
|
|
|
adw->mcode_data = entry->mcode_data;
|
|
|
|
adw->default_eeprom = entry->default_eeprom;
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
adw_asc3550_setup(device_t dev, struct adw_pci_identity *entry,
|
|
|
|
struct adw_softc *adw)
|
|
|
|
{
|
|
|
|
int error;
|
|
|
|
|
|
|
|
error = adw_generic_setup(dev, entry, adw);
|
|
|
|
if (error != 0)
|
|
|
|
return (error);
|
|
|
|
adw->chip = ADW_CHIP_ASC3550;
|
|
|
|
adw->features = ADW_ASC3550_FE;
|
|
|
|
adw->memsize = ADW_3550_MEMSIZE;
|
|
|
|
/*
|
|
|
|
* For ASC-3550, setting the START_CTL_EMFU [3:2] bits
|
|
|
|
* sets a FIFO threshold of 128 bytes. This register is
|
|
|
|
* only accessible to the host.
|
|
|
|
*/
|
|
|
|
adw_outb(adw, ADW_DMA_CFG0,
|
|
|
|
ADW_DMA_CFG0_START_CTL_EM_FU|ADW_DMA_CFG0_READ_CMD_MRM);
|
|
|
|
adw_outb(adw, ADW_MEM_CFG,
|
|
|
|
adw_inb(adw, ADW_MEM_CFG) | ADW_MEM_CFG_RAM_SZ_8KB);
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
adw_asc38C0800_setup(device_t dev, struct adw_pci_identity *entry,
|
|
|
|
struct adw_softc *adw)
|
|
|
|
{
|
|
|
|
int error;
|
|
|
|
|
|
|
|
error = adw_generic_setup(dev, entry, adw);
|
|
|
|
if (error != 0)
|
|
|
|
return (error);
|
|
|
|
/*
|
|
|
|
* For ASC-38C0800, set FIFO_THRESH_80B [6:4] bits and
|
|
|
|
* START_CTL_TH [3:2] bits for the default FIFO threshold.
|
|
|
|
*
|
|
|
|
* Note: ASC-38C0800 FIFO threshold has been changed to 256 bytes.
|
|
|
|
*
|
|
|
|
* For DMA Errata #4 set the BC_THRESH_ENB bit.
|
|
|
|
*/
|
|
|
|
adw_outb(adw, ADW_DMA_CFG0,
|
|
|
|
ADW_DMA_CFG0_BC_THRESH_ENB|ADW_DMA_CFG0_FIFO_THRESH_80B
|
|
|
|
|ADW_DMA_CFG0_START_CTL_TH|ADW_DMA_CFG0_READ_CMD_MRM);
|
|
|
|
adw_outb(adw, ADW_MEM_CFG,
|
|
|
|
adw_inb(adw, ADW_MEM_CFG) | ADW_MEM_CFG_RAM_SZ_16KB);
|
|
|
|
adw->chip = ADW_CHIP_ASC38C0800;
|
|
|
|
adw->features = ADW_ASC38C0800_FE;
|
|
|
|
adw->memsize = ADW_38C0800_MEMSIZE;
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef NOTYET
|
|
|
|
static int
|
|
|
|
adw_asc38C1600_setup(device_t dev, struct adw_pci_identity *entry,
|
|
|
|
struct adw_softc *adw)
|
|
|
|
{
|
|
|
|
int error;
|
|
|
|
|
|
|
|
error = adw_generic_setup(dev, entry, adw);
|
|
|
|
if (error != 0)
|
|
|
|
return (error);
|
|
|
|
adw->chip = ADW_CHIP_ASC38C1600;
|
|
|
|
adw->features = ADW_ASC38C1600_FE;
|
|
|
|
adw->memsize = ADW_38C1600_MEMSIZE;
|
|
|
|
return (error);
|
1998-10-07 03:20:52 +00:00
|
|
|
}
|
2000-02-03 16:34:57 +00:00
|
|
|
#endif
|