1998-11-07 17:40:18 +00:00
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.\" Copyright (c) 1997, 1998
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.\" Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\" 3. All advertising materials mentioning features or use of this software
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.\" must display the following acknowledgement:
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.\" This product includes software developed by Bill Paul.
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.\" 4. Neither the name of the author nor the names of any co-contributors
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.\" may be used to endorse or promote products derived from this software
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.\" without specific prior written permission.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
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.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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.\" THE POSSIBILITY OF SUCH DAMAGE.
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.\"
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1999-08-28 00:22:10 +00:00
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.\" $FreeBSD$
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1998-11-07 17:40:18 +00:00
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.\"
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1998-11-07 17:54:11 +00:00
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.Dd November 4, 1998
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1999-11-15 23:14:32 +00:00
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.Dt RL 4
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2001-07-10 15:31:11 +00:00
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.Os
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1998-11-07 17:40:18 +00:00
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.Sh NAME
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.Nm rl
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2001-04-18 15:54:10 +00:00
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.Nd RealTek 8129/8139 fast ethernet device driver
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1998-11-07 17:40:18 +00:00
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.Sh SYNOPSIS
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2002-05-30 11:47:19 +00:00
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.Cd "device miibus"
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2000-01-23 16:13:26 +00:00
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.Cd "device rl"
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1998-11-07 17:40:18 +00:00
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.Sh DESCRIPTION
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The
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.Nm
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driver provides support for PCI ethernet adapters and embedded
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controllers based on the RealTek 8129 and 8139 fast ethernet controller
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2000-03-01 14:50:24 +00:00
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chips.
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2001-11-05 09:17:23 +00:00
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This includes the Allied Telesyn AT2550, Farallon NetLINE 10/100 PCI,
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Genius GF100TXR,
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1998-11-07 17:40:18 +00:00
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NDC Communications NE100TX-E, OvisLink LEF-8129TX, OvisLink LEF-8139TX,
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Netronix Inc. EA-1210 NetEther 10/100, KTX-9130TX 10/100 Fast Ethernet,
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1998-12-07 00:35:06 +00:00
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Encore ENL832-TX 10/100 M PCI, Longshine LCS-8038TX-R, the
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1998-12-24 18:52:47 +00:00
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SMC EZ Card 10/100 PCI 1211-TX, and various other cheap adapters.
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1998-12-07 00:35:06 +00:00
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It also supports the Accton EN1207D which has a
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1998-11-18 21:05:11 +00:00
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chip labeled MPX5030 (or MPX5038) which appears to be a RealTek workalike.
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1998-11-07 17:40:18 +00:00
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.Pp
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The RealTek controllers use bus master DMA but do not use a
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2000-03-01 14:50:24 +00:00
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descriptor-based data transfer mechanism.
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The receiver uses a
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1998-11-07 17:40:18 +00:00
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single fixed size ring buffer from which packets must be copied
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2000-03-01 14:50:24 +00:00
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into mbufs.
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For transmission, there are only four outbound packet
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1998-11-07 17:40:18 +00:00
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address registers which require all outgoing packets to be stored
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2000-03-01 14:50:24 +00:00
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as contiguous buffers.
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Furthermore, outbound packet buffers must
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1998-11-07 17:40:18 +00:00
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be longword aligned or else transmission will fail.
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.Pp
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1998-12-24 18:52:47 +00:00
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The 8129 differs from the 8139 in that the 8139 has an internal
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1998-11-07 17:40:18 +00:00
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PHY which is controlled through special direct access registers
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2000-03-01 14:50:24 +00:00
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whereas the 8129 uses an external PHY via an MII bus.
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The 8139
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1998-11-07 17:40:18 +00:00
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supports both 10 and 100Mbps speeds in either full or half duplex.
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The 8129 can support the same speeds and modes given an appropriate
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PHY chip.
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.Pp
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The
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.Nm
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driver supports the following media types:
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.Pp
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.Bl -tag -width xxxxxxxxxxxxxxxxxxxx
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.It autoselect
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2000-03-01 14:50:24 +00:00
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Enable autoselection of the media type and options.
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This is only
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1998-11-07 17:40:18 +00:00
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supported if the PHY chip attached to the RealTek controller
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2000-03-01 14:50:24 +00:00
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supports NWAY autonegotiation.
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The user can manually override
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1998-11-07 17:40:18 +00:00
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the autoselected mode by adding media options to the
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.Pa /etc/rc.conf
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1999-03-25 00:52:44 +00:00
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file.
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1998-11-07 17:40:18 +00:00
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.It 10baseT/UTP
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2000-03-01 14:50:24 +00:00
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Set 10Mbps operation.
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The
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1998-11-07 17:40:18 +00:00
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.Ar mediaopt
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option can also be used to select either
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.Ar full-duplex
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or
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2001-02-01 16:38:02 +00:00
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.Ar half-duplex
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modes.
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1998-11-07 17:40:18 +00:00
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.It 100baseTX
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2000-03-01 14:50:24 +00:00
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Set 100Mbps (fast ethernet) operation.
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The
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1998-11-07 17:40:18 +00:00
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.Ar mediaopt
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option can also be used to select either
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.Ar full-duplex
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or
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.Ar half-duplex
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modes.
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.El
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.Pp
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The
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.Nm
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driver supports the following media options:
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.Pp
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.Bl -tag -width xxxxxxxxxxxxxxxxxxxx
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.It full-duplex
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Force full duplex operation
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.It half-duplex
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Force half duplex operation.
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.El
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.Pp
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Note that the 100baseTX media type is only available if supported
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by the adapter.
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For more information on configuring this device, see
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.Xr ifconfig 8 .
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.Sh DIAGNOSTICS
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.Bl -diag
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.It "rl%d: couldn't map memory"
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A fatal initialization error has occurred.
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.It "rl%d: couldn't map interrupt"
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A fatal initialization error has occurred.
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.It "rl%d: watchdog timeout"
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The device has stopped responding to the network, or there is a problem with
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the network connection (cable).
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.It "rl%d: no memory for rx list"
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The driver failed to allocate an mbuf for the receiver ring.
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.It "rl%d: no memory for tx list"
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1998-12-07 18:14:30 +00:00
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The driver failed to allocate an mbuf for the transmitter ring when
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1998-11-07 17:40:18 +00:00
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allocating a pad buffer or collapsing an mbuf chain into a cluster.
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.It "rl%d: chip is in D3 power state -- setting to D0"
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This message applies only to adapters which support power
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2000-03-01 14:50:24 +00:00
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management.
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Some operating systems place the controller in low power
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1998-11-07 17:40:18 +00:00
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mode when shutting down, and some PCI BIOSes fail to bring the chip
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2000-03-01 14:50:24 +00:00
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out of this state before configuring it.
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The controller loses all of
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1998-11-07 17:40:18 +00:00
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its PCI configuration in the D3 state, so if the BIOS does not set
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it back to full power mode in time, it won't be able to configure it
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2000-03-01 14:50:24 +00:00
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correctly.
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The driver tries to detect this condition and bring
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1998-11-07 17:40:18 +00:00
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the adapter back to the D0 (full power) state, but this may not be
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2000-03-01 14:50:24 +00:00
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enough to return the driver to a fully operational condition.
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If
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1998-11-07 17:40:18 +00:00
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you see this message at boot time and the driver fails to attach
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the device as a network interface, you will have to perform second
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warm boot to have the device properly configured.
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.Pp
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Note that this condition only occurs when warm booting from another
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2000-03-01 14:50:24 +00:00
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operating system.
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If you power down your system prior to booting
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1998-11-07 17:40:18 +00:00
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.Fx ,
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the card should be configured correctly.
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.El
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.Sh SEE ALSO
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.Xr arp 4 ,
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2003-02-15 17:12:53 +00:00
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.Xr miibus 4 ,
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2001-07-14 19:41:16 +00:00
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.Xr netintro 4 ,
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2000-05-04 17:40:13 +00:00
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.Xr ng_ether 4 ,
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.Xr ifconfig 8
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1998-11-07 17:40:18 +00:00
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.Rs
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.%B The RealTek 8129 and 8139 datasheets
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.%O ftp.realtek.com.tw:/lancard/data sheet
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.Re
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.Sh HISTORY
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The
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.Nm
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device driver first appeared in
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.Fx 3.0 .
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1999-08-15 10:48:36 +00:00
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.Sh AUTHORS
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1998-11-07 17:40:18 +00:00
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The
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.Nm
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driver was written by
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.An Bill Paul Aq wpaul@ctr.columbia.edu .
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.Sh BUGS
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Since outbound packets must be longword aligned, the transmit
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routine has to copy an unaligned packet into an mbuf cluster buffer
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2000-03-01 14:50:24 +00:00
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before transmission.
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The driver abuses the fact that the cluster buffer
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1998-11-07 17:40:18 +00:00
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pool is allocated at system startup time in a contiguous region starting
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2000-03-01 14:50:24 +00:00
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at a page boundary.
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Since cluster buffers are 2048 bytes, they are
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longword aligned by definition.
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The driver probably should not be
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1998-11-07 17:40:18 +00:00
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depending on this characteristic.
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.Pp
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2002-11-06 18:58:02 +00:00
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The RealTek data sheets are of especially poor quality,
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and there is a lot of information missing
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particularly concerning the receiver operation.
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One particularly
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important fact that the data sheets fail to mention relates to the
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way in which the chip fills in the receive buffer.
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2000-03-01 14:50:24 +00:00
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When an interrupt
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1998-11-07 17:40:18 +00:00
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is posted to signal that a frame has been received, it is possible that
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another frame might be in the process of being copied into the receive
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2000-03-01 14:50:24 +00:00
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buffer while the driver is busy handling the first one.
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If the driver
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1998-11-07 17:40:18 +00:00
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manages to finish processing the first frame before the chip is done
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DMAing the rest of the next frame, the driver may attempt to process
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the next frame in the buffer before the chip has had a chance to finish
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DMAing all of it.
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.Pp
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The driver can check for an incomplete frame by inspecting the frame
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2001-02-18 10:25:42 +00:00
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length in the header preceding the actual packet data: an incomplete
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2000-03-02 14:54:02 +00:00
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frame will have the magic length of 0xFFF0.
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When the driver encounters
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1998-11-07 17:40:18 +00:00
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this value, it knows that it has finished processing all currently
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2000-03-01 14:50:24 +00:00
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available packets.
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2001-07-14 19:41:16 +00:00
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Neither this magic value nor its significance are
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1998-11-07 17:40:18 +00:00
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documented anywhere in the RealTek data sheets.
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