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freebsd-dev/sys/dev/nge/if_nge.c

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Start each of the license/copyright comments with /*-, minor shuffle of lines
2005-01-06 01:43:34 +00:00
/*-
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
* Copyright (c) 2001 Wind River Systems
* Copyright (c) 1997, 1998, 1999, 2000, 2001
* Bill Paul <wpaul@bsdi.com>. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Bill Paul.
* 4. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGE.
*/
Use __FBSDID(). Also some minor style cleanups.
2003-08-24 17:55:58 +00:00
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
/*
* National Semiconductor DP83820/DP83821 gigabit ethernet driver
* for FreeBSD. Datasheets are available from:
*
* http://www.national.com/ds/DP/DP83820.pdf
* http://www.national.com/ds/DP/DP83821.pdf
*
* These chips are used on several low cost gigabit ethernet NICs
* sold by D-Link, Addtron, SMC and Asante. Both parts are
* virtually the same, except the 83820 is a 64-bit/32-bit part,
* while the 83821 is 32-bit only.
*
* Many cards also use National gigE transceivers, such as the
* DP83891, DP83861 and DP83862 gigPHYTER parts. The DP83861 datasheet
* contains a full register description that applies to all of these
* components:
*
* http://www.national.com/ds/DP/DP83861.pdf
*
* Written by Bill Paul <wpaul@bsdi.com>
* BSDi Open Source Solutions
*/
/*
* The NatSemi DP83820 and 83821 controllers are enhanced versions
* of the NatSemi MacPHYTER 10/100 devices. They support 10, 100
* and 1000Mbps speeds with 1000baseX (ten bit interface), MII and GMII
* ports. Other features include 8K TX FIFO and 32K RX FIFO, TCP/IP
* hardware checksum offload (IPv4 only), VLAN tagging and filtering,
* priority TX and RX queues, a 2048 bit multicast hash filter, 4 RX pattern
* matching buffers, one perfect address filter buffer and interrupt
* moderation. The 83820 supports both 64-bit and 32-bit addressing
* and data transfers: the 64-bit support can be toggled on or off
* via software. This affects the size of certain fields in the DMA
* descriptors.
*
Fix the last serious bug I've been chasing: The DP83820/83821 has an undocumented limitation concerning jumbo frames and TX checksum offload. In order for TX checksum offload to work, the outgoing frame must fit entirely within the TX FIFO, which is 8192 bytes in size. This isn't a problem, until you try to send a 9000-byte frame, at which point the TX DMA engine goes to sleep. It turns out that if you want to send a jumbo frame larger than 8170 bytes (8192 - 64), you have to turn off the TX checksum support. As a workaround, I changed nge_ioctl() so that if the user selects an MTU larger than 8152 bytes, we clear the if_hwassist flags. The flags will be set again once the MTU is reduced to a smaller value.
2001-06-16 03:38:44 +00:00
* There are two bugs/misfeatures in the 83820/83821 that I have
* discovered so far:
*
* - Receive buffers must be aligned on 64-bit boundaries, which means
* you must resort to copying data in order to fix up the payload
* alignment.
*
* - In order to transmit jumbo frames larger than 8170 bytes, you have
* to turn off transmit checksum offloading, because the chip can't
* compute the checksum on an outgoing frame unless it fits entirely
* within the TX FIFO, which is only 8192 bytes in size. If you have
* TX checksum offload enabled and you transmit attempt to transmit a
* frame larger than 8170 bytes, the transmitter will wedge.
*
* To work around the latter problem, TX checksum offload is disabled
* if the user selects an MTU larger than 8152 (8170 - 18).
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
*/
- Don't pollute opt_global.h with DEVICE_POLLING and introduce opt_device_polling.h - Include opt_device_polling.h into appropriate files. - Embrace with HAVE_KERNEL_OPTION_HEADERS the include in the files that can be compiled as loadable modules. Reviewed by: bde
2005-10-05 10:09:17 +00:00
#ifdef HAVE_KERNEL_OPTION_HEADERS
#include "opt_device_polling.h"
#endif
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
#include <sys/param.h>
#include <sys/systm.h>
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
#include <sys/bus.h>
#include <sys/endian.h>
#include <sys/kernel.h>
#include <sys/lock.h>
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
#include <sys/malloc.h>
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
#include <sys/mbuf.h>
Add missing <sys/module.h> includes
2004-05-30 20:08:47 +00:00
#include <sys/module.h>
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
#include <sys/mutex.h>
#include <sys/rman.h>
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
#include <sys/socket.h>
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
#include <sys/sockio.h>
#include <sys/sysctl.h>
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
#include <net/bpf.h>
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
#include <net/if.h>
#include <net/if_arp.h>
#include <net/ethernet.h>
#include <net/if_dl.h>
#include <net/if_media.h>
#include <net/if_types.h>
#include <net/if_vlan_var.h>
#include <dev/mii/mii.h>
- Import the common MII bitbang'ing code from NetBSD and convert drivers to take advantage of it instead of duplicating it. This reduces the size of the i386 GENERIC kernel by about 4k. The only potential in-tree user left unconverted is xe(4), which generally should be changed to use miibus(4) instead of implementing PHY handling on its own, as otherwise it makes not much sense to add a dependency on miibus(4)/mii_bitbang(4) to xe(4) just for the MII bitbang'ing code. The common MII bitbang'ing code also is useful in the embedded space for using GPIO pins to implement MII access. - Based on lessons learnt with dc(4) (see r185750), add bus barriers to the MII bitbang read and write functions of the other drivers converted in order to ensure the intended ordering. Given that register access via an index register as well as register bank/window switching is subject to the same problem, also add bus barriers to the respective functions of smc(4), tl(4) and xl(4). - Sprinkle some const. Thanks to the following testers: Andrew Bliznak (nge(4)), nwhitehorn@ (bm(4)), yongari@ (sis(4) and ste(4)) Thanks to Hans-Joerg Sirtl for supplying hardware to test stge(4). Reviewed by: yongari (subset of drivers) Obtained from: NetBSD (partially)
2011-11-01 16:13:59 +00:00
#include <dev/mii/mii_bitbang.h>
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
#include <dev/mii/miivar.h>
Prefer new location of pci include files (which have only been in the tree for two or more years now), except in a few places where there's code to be compatible with older versions of FreeBSD.
2003-08-22 06:42:59 +00:00
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
#include <machine/bus.h>
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
Unbreak release. *sigh*
2001-05-12 19:51:40 +00:00
#include <dev/nge/if_ngereg.h>
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
/* "device miibus" required. See GENERIC if you get errors here. */
#include "miibus_if.h"
- Express hard dependencies on bus (pci, isa, pccard) and network layer (ether). - Don't abuse module names to facilitate ifconfig module loading; such abuse isn't really needed. (And if we do need type information associated with a module then we should make it explicit and not use hacks.)
2003-04-15 06:37:30 +00:00
MODULE_DEPEND(nge, pci, 1, 1, 1);
MODULE_DEPEND(nge, ether, 1, 1, 1);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
MODULE_DEPEND(nge, miibus, 1, 1, 1);
#define NGE_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP)
/*
* Various supported device vendors/types and their names.
*/
Remove duplicate const specifiers in many drivers (I hope I got all of them, please let me know if not). Most of these are of the form: static const struct bzzt_type { [...list of members...] } const bzzt_devs[] = { [...list of initializers...] }; The second const is unnecessary, as arrays cannot be modified anyway, and if the elements are const, the whole thing is const automatically (e.g. it is placed in .rodata). I have verified this does not change the binary output of a full kernel build (except for build timestamps embedded in the object files). Reviewed by: yongari, marius MFC after: 1 week
2012-11-05 19:16:27 +00:00
static const struct nge_type nge_devs[] = {
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{ NGE_VENDORID, NGE_DEVICEID,
"National Semiconductor Gigabit Ethernet" },
{ 0, 0, NULL }
};
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static int nge_probe(device_t);
static int nge_attach(device_t);
static int nge_detach(device_t);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
static int nge_shutdown(device_t);
static int nge_suspend(device_t);
static int nge_resume(device_t);
static __inline void nge_discard_rxbuf(struct nge_softc *, int);
static int nge_newbuf(struct nge_softc *, int);
static int nge_encap(struct nge_softc *, struct mbuf **);
#ifndef __NO_STRICT_ALIGNMENT
static __inline void nge_fixup_rx(struct mbuf *);
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
#endif
Unbreak build. Pointy hat to: attilio
2009-05-30 18:39:22 +00:00
static int nge_rxeof(struct nge_softc *);
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static void nge_txeof(struct nge_softc *);
static void nge_intr(void *);
static void nge_tick(void *);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
static void nge_stats_update(struct nge_softc *);
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static void nge_start(struct ifnet *);
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
static void nge_start_locked(struct ifnet *);
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static int nge_ioctl(struct ifnet *, u_long, caddr_t);
static void nge_init(void *);
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
static void nge_init_locked(struct nge_softc *);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
static int nge_stop_mac(struct nge_softc *);
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static void nge_stop(struct nge_softc *);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
static void nge_wol(struct nge_softc *);
static void nge_watchdog(struct nge_softc *);
static int nge_mediachange(struct ifnet *);
static void nge_mediastatus(struct ifnet *, struct ifmediareq *);
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static void nge_delay(struct nge_softc *);
static void nge_eeprom_idle(struct nge_softc *);
static void nge_eeprom_putbyte(struct nge_softc *, int);
s/u_int8_t/uint8_t/g s/u_int16_t/uint16_t/g s/u_int32_t/uint32_t/g
2009-05-18 06:32:38 +00:00
static void nge_eeprom_getword(struct nge_softc *, int, uint16_t *);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
static void nge_read_eeprom(struct nge_softc *, caddr_t, int, int);
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static int nge_miibus_readreg(device_t, int, int);
static int nge_miibus_writereg(device_t, int, int, int);
static void nge_miibus_statchg(device_t);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
static void nge_rxfilter(struct nge_softc *);
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static void nge_reset(struct nge_softc *);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
static void nge_dmamap_cb(void *, bus_dma_segment_t *, int, int);
static int nge_dma_alloc(struct nge_softc *);
static void nge_dma_free(struct nge_softc *);
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static int nge_list_rx_init(struct nge_softc *);
static int nge_list_tx_init(struct nge_softc *);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
static void nge_sysctl_node(struct nge_softc *);
static int sysctl_int_range(SYSCTL_HANDLER_ARGS, int, int);
static int sysctl_hw_nge_int_holdoff(SYSCTL_HANDLER_ARGS);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
- Import the common MII bitbang'ing code from NetBSD and convert drivers to take advantage of it instead of duplicating it. This reduces the size of the i386 GENERIC kernel by about 4k. The only potential in-tree user left unconverted is xe(4), which generally should be changed to use miibus(4) instead of implementing PHY handling on its own, as otherwise it makes not much sense to add a dependency on miibus(4)/mii_bitbang(4) to xe(4) just for the MII bitbang'ing code. The common MII bitbang'ing code also is useful in the embedded space for using GPIO pins to implement MII access. - Based on lessons learnt with dc(4) (see r185750), add bus barriers to the MII bitbang read and write functions of the other drivers converted in order to ensure the intended ordering. Given that register access via an index register as well as register bank/window switching is subject to the same problem, also add bus barriers to the respective functions of smc(4), tl(4) and xl(4). - Sprinkle some const. Thanks to the following testers: Andrew Bliznak (nge(4)), nwhitehorn@ (bm(4)), yongari@ (sis(4) and ste(4)) Thanks to Hans-Joerg Sirtl for supplying hardware to test stge(4). Reviewed by: yongari (subset of drivers) Obtained from: NetBSD (partially)
2011-11-01 16:13:59 +00:00
/*
* MII bit-bang glue
*/
static uint32_t nge_mii_bitbang_read(device_t);
static void nge_mii_bitbang_write(device_t, uint32_t);
static const struct mii_bitbang_ops nge_mii_bitbang_ops = {
nge_mii_bitbang_read,
nge_mii_bitbang_write,
{
NGE_MEAR_MII_DATA, /* MII_BIT_MDO */
NGE_MEAR_MII_DATA, /* MII_BIT_MDI */
NGE_MEAR_MII_CLK, /* MII_BIT_MDC */
NGE_MEAR_MII_DIR, /* MII_BIT_DIR_HOST_PHY */
0, /* MII_BIT_DIR_PHY_HOST */
}
};
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
static device_method_t nge_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, nge_probe),
DEVMETHOD(device_attach, nge_attach),
DEVMETHOD(device_detach, nge_detach),
DEVMETHOD(device_shutdown, nge_shutdown),
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
DEVMETHOD(device_suspend, nge_suspend),
DEVMETHOD(device_resume, nge_resume),
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
/* MII interface */
DEVMETHOD(miibus_readreg, nge_miibus_readreg),
DEVMETHOD(miibus_writereg, nge_miibus_writereg),
DEVMETHOD(miibus_statchg, nge_miibus_statchg),
- There's no need to overwrite the default device method with the default one. Interestingly, these are actually the default for quite some time (bus_generic_driver_added(9) since r52045 and bus_generic_print_child(9) since r52045) but even recently added device drivers do this unnecessarily. Discussed with: jhb, marcel - While at it, use DEVMETHOD_END. Discussed with: jhb - Also while at it, use __FBSDID.
2011-11-22 21:28:20 +00:00
DEVMETHOD_END
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
};
static driver_t nge_driver = {
"nge",
nge_methods,
sizeof(struct nge_softc)
};
static devclass_t nge_devclass;
- Express hard dependencies on bus (pci, isa, pccard) and network layer (ether). - Don't abuse module names to facilitate ifconfig module loading; such abuse isn't really needed. (And if we do need type information associated with a module then we should make it explicit and not use hacks.)
2003-04-15 06:37:30 +00:00
DRIVER_MODULE(nge, pci, nge_driver, nge_devclass, 0, 0);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
DRIVER_MODULE(miibus, nge, miibus_driver, miibus_devclass, 0, 0);
#define NGE_SETBIT(sc, reg, x) \
CSR_WRITE_4(sc, reg, \
CSR_READ_4(sc, reg) | (x))
#define NGE_CLRBIT(sc, reg, x) \
CSR_WRITE_4(sc, reg, \
CSR_READ_4(sc, reg) & ~(x))
#define SIO_SET(x) \
Fix instances of macros with improperly parenthasized arguments. Verified by: md5
2002-11-09 12:55:07 +00:00
CSR_WRITE_4(sc, NGE_MEAR, CSR_READ_4(sc, NGE_MEAR) | (x))
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
#define SIO_CLR(x) \
Fix instances of macros with improperly parenthasized arguments. Verified by: md5
2002-11-09 12:55:07 +00:00
CSR_WRITE_4(sc, NGE_MEAR, CSR_READ_4(sc, NGE_MEAR) & ~(x))
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static void
Use ANSI C declarations for all functions.
2009-05-18 06:02:54 +00:00
nge_delay(struct nge_softc *sc)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
style(9)
2009-05-18 07:04:03 +00:00
int idx;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
for (idx = (300 / 33) + 1; idx > 0; idx--)
CSR_READ_4(sc, NGE_CSR);
}
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static void
Use ANSI C declarations for all functions.
2009-05-18 06:02:54 +00:00
nge_eeprom_idle(struct nge_softc *sc)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
style(9)
2009-05-18 07:04:03 +00:00
int i;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
SIO_SET(NGE_MEAR_EE_CSEL);
nge_delay(sc);
SIO_SET(NGE_MEAR_EE_CLK);
nge_delay(sc);
for (i = 0; i < 25; i++) {
SIO_CLR(NGE_MEAR_EE_CLK);
nge_delay(sc);
SIO_SET(NGE_MEAR_EE_CLK);
nge_delay(sc);
}
SIO_CLR(NGE_MEAR_EE_CLK);
nge_delay(sc);
SIO_CLR(NGE_MEAR_EE_CSEL);
nge_delay(sc);
CSR_WRITE_4(sc, NGE_MEAR, 0x00000000);
}
/*
* Send a read command and address to the EEPROM, check for ACK.
*/
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static void
Use ANSI C declarations for all functions.
2009-05-18 06:02:54 +00:00
nge_eeprom_putbyte(struct nge_softc *sc, int addr)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
style(9)
2009-05-18 07:04:03 +00:00
int d, i;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
d = addr | NGE_EECMD_READ;
/*
* Feed in each bit and stobe the clock.
*/
for (i = 0x400; i; i >>= 1) {
if (d & i) {
SIO_SET(NGE_MEAR_EE_DIN);
} else {
SIO_CLR(NGE_MEAR_EE_DIN);
}
nge_delay(sc);
SIO_SET(NGE_MEAR_EE_CLK);
nge_delay(sc);
SIO_CLR(NGE_MEAR_EE_CLK);
nge_delay(sc);
}
}
/*
* Read a word of data stored in the EEPROM at address 'addr.'
*/
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static void
s/u_int8_t/uint8_t/g s/u_int16_t/uint16_t/g s/u_int32_t/uint32_t/g
2009-05-18 06:32:38 +00:00
nge_eeprom_getword(struct nge_softc *sc, int addr, uint16_t *dest)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
style(9)
2009-05-18 07:04:03 +00:00
int i;
uint16_t word = 0;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
/* Force EEPROM to idle state. */
nge_eeprom_idle(sc);
/* Enter EEPROM access mode. */
nge_delay(sc);
SIO_CLR(NGE_MEAR_EE_CLK);
nge_delay(sc);
SIO_SET(NGE_MEAR_EE_CSEL);
nge_delay(sc);
/*
* Send address of word we want to read.
*/
nge_eeprom_putbyte(sc, addr);
/*
* Start reading bits from EEPROM.
*/
for (i = 0x8000; i; i >>= 1) {
SIO_SET(NGE_MEAR_EE_CLK);
nge_delay(sc);
if (CSR_READ_4(sc, NGE_MEAR) & NGE_MEAR_EE_DOUT)
word |= i;
nge_delay(sc);
SIO_CLR(NGE_MEAR_EE_CLK);
nge_delay(sc);
}
/* Turn off EEPROM access mode. */
nge_eeprom_idle(sc);
*dest = word;
}
/*
* Read a sequence of words from the EEPROM.
*/
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static void
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
nge_read_eeprom(struct nge_softc *sc, caddr_t dest, int off, int cnt)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
style(9)
2009-05-18 07:04:03 +00:00
int i;
uint16_t word = 0, *ptr;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
for (i = 0; i < cnt; i++) {
nge_eeprom_getword(sc, off + i, &word);
s/u_int8_t/uint8_t/g s/u_int16_t/uint16_t/g s/u_int32_t/uint32_t/g
2009-05-18 06:32:38 +00:00
ptr = (uint16_t *)(dest + (i * 2));
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
*ptr = word;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
}
/*
- Import the common MII bitbang'ing code from NetBSD and convert drivers to take advantage of it instead of duplicating it. This reduces the size of the i386 GENERIC kernel by about 4k. The only potential in-tree user left unconverted is xe(4), which generally should be changed to use miibus(4) instead of implementing PHY handling on its own, as otherwise it makes not much sense to add a dependency on miibus(4)/mii_bitbang(4) to xe(4) just for the MII bitbang'ing code. The common MII bitbang'ing code also is useful in the embedded space for using GPIO pins to implement MII access. - Based on lessons learnt with dc(4) (see r185750), add bus barriers to the MII bitbang read and write functions of the other drivers converted in order to ensure the intended ordering. Given that register access via an index register as well as register bank/window switching is subject to the same problem, also add bus barriers to the respective functions of smc(4), tl(4) and xl(4). - Sprinkle some const. Thanks to the following testers: Andrew Bliznak (nge(4)), nwhitehorn@ (bm(4)), yongari@ (sis(4) and ste(4)) Thanks to Hans-Joerg Sirtl for supplying hardware to test stge(4). Reviewed by: yongari (subset of drivers) Obtained from: NetBSD (partially)
2011-11-01 16:13:59 +00:00
* Read the MII serial port for the MII bit-bang module.
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
*/
- Import the common MII bitbang'ing code from NetBSD and convert drivers to take advantage of it instead of duplicating it. This reduces the size of the i386 GENERIC kernel by about 4k. The only potential in-tree user left unconverted is xe(4), which generally should be changed to use miibus(4) instead of implementing PHY handling on its own, as otherwise it makes not much sense to add a dependency on miibus(4)/mii_bitbang(4) to xe(4) just for the MII bitbang'ing code. The common MII bitbang'ing code also is useful in the embedded space for using GPIO pins to implement MII access. - Based on lessons learnt with dc(4) (see r185750), add bus barriers to the MII bitbang read and write functions of the other drivers converted in order to ensure the intended ordering. Given that register access via an index register as well as register bank/window switching is subject to the same problem, also add bus barriers to the respective functions of smc(4), tl(4) and xl(4). - Sprinkle some const. Thanks to the following testers: Andrew Bliznak (nge(4)), nwhitehorn@ (bm(4)), yongari@ (sis(4) and ste(4)) Thanks to Hans-Joerg Sirtl for supplying hardware to test stge(4). Reviewed by: yongari (subset of drivers) Obtained from: NetBSD (partially)
2011-11-01 16:13:59 +00:00
static uint32_t
nge_mii_bitbang_read(device_t dev)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
- Import the common MII bitbang'ing code from NetBSD and convert drivers to take advantage of it instead of duplicating it. This reduces the size of the i386 GENERIC kernel by about 4k. The only potential in-tree user left unconverted is xe(4), which generally should be changed to use miibus(4) instead of implementing PHY handling on its own, as otherwise it makes not much sense to add a dependency on miibus(4)/mii_bitbang(4) to xe(4) just for the MII bitbang'ing code. The common MII bitbang'ing code also is useful in the embedded space for using GPIO pins to implement MII access. - Based on lessons learnt with dc(4) (see r185750), add bus barriers to the MII bitbang read and write functions of the other drivers converted in order to ensure the intended ordering. Given that register access via an index register as well as register bank/window switching is subject to the same problem, also add bus barriers to the respective functions of smc(4), tl(4) and xl(4). - Sprinkle some const. Thanks to the following testers: Andrew Bliznak (nge(4)), nwhitehorn@ (bm(4)), yongari@ (sis(4) and ste(4)) Thanks to Hans-Joerg Sirtl for supplying hardware to test stge(4). Reviewed by: yongari (subset of drivers) Obtained from: NetBSD (partially)
2011-11-01 16:13:59 +00:00
struct nge_softc *sc;
uint32_t val;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
- Import the common MII bitbang'ing code from NetBSD and convert drivers to take advantage of it instead of duplicating it. This reduces the size of the i386 GENERIC kernel by about 4k. The only potential in-tree user left unconverted is xe(4), which generally should be changed to use miibus(4) instead of implementing PHY handling on its own, as otherwise it makes not much sense to add a dependency on miibus(4)/mii_bitbang(4) to xe(4) just for the MII bitbang'ing code. The common MII bitbang'ing code also is useful in the embedded space for using GPIO pins to implement MII access. - Based on lessons learnt with dc(4) (see r185750), add bus barriers to the MII bitbang read and write functions of the other drivers converted in order to ensure the intended ordering. Given that register access via an index register as well as register bank/window switching is subject to the same problem, also add bus barriers to the respective functions of smc(4), tl(4) and xl(4). - Sprinkle some const. Thanks to the following testers: Andrew Bliznak (nge(4)), nwhitehorn@ (bm(4)), yongari@ (sis(4) and ste(4)) Thanks to Hans-Joerg Sirtl for supplying hardware to test stge(4). Reviewed by: yongari (subset of drivers) Obtained from: NetBSD (partially)
2011-11-01 16:13:59 +00:00
sc = device_get_softc(dev);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
- Import the common MII bitbang'ing code from NetBSD and convert drivers to take advantage of it instead of duplicating it. This reduces the size of the i386 GENERIC kernel by about 4k. The only potential in-tree user left unconverted is xe(4), which generally should be changed to use miibus(4) instead of implementing PHY handling on its own, as otherwise it makes not much sense to add a dependency on miibus(4)/mii_bitbang(4) to xe(4) just for the MII bitbang'ing code. The common MII bitbang'ing code also is useful in the embedded space for using GPIO pins to implement MII access. - Based on lessons learnt with dc(4) (see r185750), add bus barriers to the MII bitbang read and write functions of the other drivers converted in order to ensure the intended ordering. Given that register access via an index register as well as register bank/window switching is subject to the same problem, also add bus barriers to the respective functions of smc(4), tl(4) and xl(4). - Sprinkle some const. Thanks to the following testers: Andrew Bliznak (nge(4)), nwhitehorn@ (bm(4)), yongari@ (sis(4) and ste(4)) Thanks to Hans-Joerg Sirtl for supplying hardware to test stge(4). Reviewed by: yongari (subset of drivers) Obtained from: NetBSD (partially)
2011-11-01 16:13:59 +00:00
val = CSR_READ_4(sc, NGE_MEAR);
CSR_BARRIER_4(sc, NGE_MEAR,
BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
- Import the common MII bitbang'ing code from NetBSD and convert drivers to take advantage of it instead of duplicating it. This reduces the size of the i386 GENERIC kernel by about 4k. The only potential in-tree user left unconverted is xe(4), which generally should be changed to use miibus(4) instead of implementing PHY handling on its own, as otherwise it makes not much sense to add a dependency on miibus(4)/mii_bitbang(4) to xe(4) just for the MII bitbang'ing code. The common MII bitbang'ing code also is useful in the embedded space for using GPIO pins to implement MII access. - Based on lessons learnt with dc(4) (see r185750), add bus barriers to the MII bitbang read and write functions of the other drivers converted in order to ensure the intended ordering. Given that register access via an index register as well as register bank/window switching is subject to the same problem, also add bus barriers to the respective functions of smc(4), tl(4) and xl(4). - Sprinkle some const. Thanks to the following testers: Andrew Bliznak (nge(4)), nwhitehorn@ (bm(4)), yongari@ (sis(4) and ste(4)) Thanks to Hans-Joerg Sirtl for supplying hardware to test stge(4). Reviewed by: yongari (subset of drivers) Obtained from: NetBSD (partially)
2011-11-01 16:13:59 +00:00
return (val);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
/*
- Import the common MII bitbang'ing code from NetBSD and convert drivers to take advantage of it instead of duplicating it. This reduces the size of the i386 GENERIC kernel by about 4k. The only potential in-tree user left unconverted is xe(4), which generally should be changed to use miibus(4) instead of implementing PHY handling on its own, as otherwise it makes not much sense to add a dependency on miibus(4)/mii_bitbang(4) to xe(4) just for the MII bitbang'ing code. The common MII bitbang'ing code also is useful in the embedded space for using GPIO pins to implement MII access. - Based on lessons learnt with dc(4) (see r185750), add bus barriers to the MII bitbang read and write functions of the other drivers converted in order to ensure the intended ordering. Given that register access via an index register as well as register bank/window switching is subject to the same problem, also add bus barriers to the respective functions of smc(4), tl(4) and xl(4). - Sprinkle some const. Thanks to the following testers: Andrew Bliznak (nge(4)), nwhitehorn@ (bm(4)), yongari@ (sis(4) and ste(4)) Thanks to Hans-Joerg Sirtl for supplying hardware to test stge(4). Reviewed by: yongari (subset of drivers) Obtained from: NetBSD (partially)
2011-11-01 16:13:59 +00:00
* Write the MII serial port for the MII bit-bang module.
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
*/
- Import the common MII bitbang'ing code from NetBSD and convert drivers to take advantage of it instead of duplicating it. This reduces the size of the i386 GENERIC kernel by about 4k. The only potential in-tree user left unconverted is xe(4), which generally should be changed to use miibus(4) instead of implementing PHY handling on its own, as otherwise it makes not much sense to add a dependency on miibus(4)/mii_bitbang(4) to xe(4) just for the MII bitbang'ing code. The common MII bitbang'ing code also is useful in the embedded space for using GPIO pins to implement MII access. - Based on lessons learnt with dc(4) (see r185750), add bus barriers to the MII bitbang read and write functions of the other drivers converted in order to ensure the intended ordering. Given that register access via an index register as well as register bank/window switching is subject to the same problem, also add bus barriers to the respective functions of smc(4), tl(4) and xl(4). - Sprinkle some const. Thanks to the following testers: Andrew Bliznak (nge(4)), nwhitehorn@ (bm(4)), yongari@ (sis(4) and ste(4)) Thanks to Hans-Joerg Sirtl for supplying hardware to test stge(4). Reviewed by: yongari (subset of drivers) Obtained from: NetBSD (partially)
2011-11-01 16:13:59 +00:00
static void
nge_mii_bitbang_write(device_t dev, uint32_t val)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
- Import the common MII bitbang'ing code from NetBSD and convert drivers to take advantage of it instead of duplicating it. This reduces the size of the i386 GENERIC kernel by about 4k. The only potential in-tree user left unconverted is xe(4), which generally should be changed to use miibus(4) instead of implementing PHY handling on its own, as otherwise it makes not much sense to add a dependency on miibus(4)/mii_bitbang(4) to xe(4) just for the MII bitbang'ing code. The common MII bitbang'ing code also is useful in the embedded space for using GPIO pins to implement MII access. - Based on lessons learnt with dc(4) (see r185750), add bus barriers to the MII bitbang read and write functions of the other drivers converted in order to ensure the intended ordering. Given that register access via an index register as well as register bank/window switching is subject to the same problem, also add bus barriers to the respective functions of smc(4), tl(4) and xl(4). - Sprinkle some const. Thanks to the following testers: Andrew Bliznak (nge(4)), nwhitehorn@ (bm(4)), yongari@ (sis(4) and ste(4)) Thanks to Hans-Joerg Sirtl for supplying hardware to test stge(4). Reviewed by: yongari (subset of drivers) Obtained from: NetBSD (partially)
2011-11-01 16:13:59 +00:00
struct nge_softc *sc;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
- Import the common MII bitbang'ing code from NetBSD and convert drivers to take advantage of it instead of duplicating it. This reduces the size of the i386 GENERIC kernel by about 4k. The only potential in-tree user left unconverted is xe(4), which generally should be changed to use miibus(4) instead of implementing PHY handling on its own, as otherwise it makes not much sense to add a dependency on miibus(4)/mii_bitbang(4) to xe(4) just for the MII bitbang'ing code. The common MII bitbang'ing code also is useful in the embedded space for using GPIO pins to implement MII access. - Based on lessons learnt with dc(4) (see r185750), add bus barriers to the MII bitbang read and write functions of the other drivers converted in order to ensure the intended ordering. Given that register access via an index register as well as register bank/window switching is subject to the same problem, also add bus barriers to the respective functions of smc(4), tl(4) and xl(4). - Sprinkle some const. Thanks to the following testers: Andrew Bliznak (nge(4)), nwhitehorn@ (bm(4)), yongari@ (sis(4) and ste(4)) Thanks to Hans-Joerg Sirtl for supplying hardware to test stge(4). Reviewed by: yongari (subset of drivers) Obtained from: NetBSD (partially)
2011-11-01 16:13:59 +00:00
sc = device_get_softc(dev);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
- Import the common MII bitbang'ing code from NetBSD and convert drivers to take advantage of it instead of duplicating it. This reduces the size of the i386 GENERIC kernel by about 4k. The only potential in-tree user left unconverted is xe(4), which generally should be changed to use miibus(4) instead of implementing PHY handling on its own, as otherwise it makes not much sense to add a dependency on miibus(4)/mii_bitbang(4) to xe(4) just for the MII bitbang'ing code. The common MII bitbang'ing code also is useful in the embedded space for using GPIO pins to implement MII access. - Based on lessons learnt with dc(4) (see r185750), add bus barriers to the MII bitbang read and write functions of the other drivers converted in order to ensure the intended ordering. Given that register access via an index register as well as register bank/window switching is subject to the same problem, also add bus barriers to the respective functions of smc(4), tl(4) and xl(4). - Sprinkle some const. Thanks to the following testers: Andrew Bliznak (nge(4)), nwhitehorn@ (bm(4)), yongari@ (sis(4) and ste(4)) Thanks to Hans-Joerg Sirtl for supplying hardware to test stge(4). Reviewed by: yongari (subset of drivers) Obtained from: NetBSD (partially)
2011-11-01 16:13:59 +00:00
CSR_WRITE_4(sc, NGE_MEAR, val);
CSR_BARRIER_4(sc, NGE_MEAR,
BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static int
Use ANSI C declarations for all functions.
2009-05-18 06:02:54 +00:00
nge_miibus_readreg(device_t dev, int phy, int reg)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
style(9)
2009-05-18 07:04:03 +00:00
struct nge_softc *sc;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
int rv;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
sc = device_get_softc(dev);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((sc->nge_flags & NGE_FLAG_TBI) != 0) {
/* Pretend PHY is at address 0. */
if (phy != 0)
return (0);
switch (reg) {
case MII_BMCR:
reg = NGE_TBI_BMCR;
break;
case MII_BMSR:
/* 83820/83821 has different bit layout for BMSR. */
rv = BMSR_ANEG | BMSR_EXTCAP | BMSR_EXTSTAT;
reg = CSR_READ_4(sc, NGE_TBI_BMSR);
if ((reg & NGE_TBIBMSR_ANEG_DONE) != 0)
rv |= BMSR_ACOMP;
if ((reg & NGE_TBIBMSR_LINKSTAT) != 0)
rv |= BMSR_LINK;
return (rv);
case MII_ANAR:
reg = NGE_TBI_ANAR;
break;
case MII_ANLPAR:
reg = NGE_TBI_ANLPAR;
break;
case MII_ANER:
reg = NGE_TBI_ANER;
break;
case MII_EXTSR:
reg = NGE_TBI_ESR;
break;
case MII_PHYIDR1:
case MII_PHYIDR2:
return (0);
default:
device_printf(sc->nge_dev,
"bad phy register read : %d\n", reg);
return (0);
}
return (CSR_READ_4(sc, reg));
}
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
- Import the common MII bitbang'ing code from NetBSD and convert drivers to take advantage of it instead of duplicating it. This reduces the size of the i386 GENERIC kernel by about 4k. The only potential in-tree user left unconverted is xe(4), which generally should be changed to use miibus(4) instead of implementing PHY handling on its own, as otherwise it makes not much sense to add a dependency on miibus(4)/mii_bitbang(4) to xe(4) just for the MII bitbang'ing code. The common MII bitbang'ing code also is useful in the embedded space for using GPIO pins to implement MII access. - Based on lessons learnt with dc(4) (see r185750), add bus barriers to the MII bitbang read and write functions of the other drivers converted in order to ensure the intended ordering. Given that register access via an index register as well as register bank/window switching is subject to the same problem, also add bus barriers to the respective functions of smc(4), tl(4) and xl(4). - Sprinkle some const. Thanks to the following testers: Andrew Bliznak (nge(4)), nwhitehorn@ (bm(4)), yongari@ (sis(4) and ste(4)) Thanks to Hans-Joerg Sirtl for supplying hardware to test stge(4). Reviewed by: yongari (subset of drivers) Obtained from: NetBSD (partially)
2011-11-01 16:13:59 +00:00
return (mii_bitbang_readreg(dev, &nge_mii_bitbang_ops, phy, reg));
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static int
Use ANSI C declarations for all functions.
2009-05-18 06:02:54 +00:00
nge_miibus_writereg(device_t dev, int phy, int reg, int data)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
style(9)
2009-05-18 07:04:03 +00:00
struct nge_softc *sc;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
sc = device_get_softc(dev);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((sc->nge_flags & NGE_FLAG_TBI) != 0) {
/* Pretend PHY is at address 0. */
if (phy != 0)
return (0);
switch (reg) {
case MII_BMCR:
reg = NGE_TBI_BMCR;
break;
case MII_BMSR:
return (0);
case MII_ANAR:
reg = NGE_TBI_ANAR;
break;
case MII_ANLPAR:
reg = NGE_TBI_ANLPAR;
break;
case MII_ANER:
reg = NGE_TBI_ANER;
break;
case MII_EXTSR:
reg = NGE_TBI_ESR;
break;
case MII_PHYIDR1:
case MII_PHYIDR2:
return (0);
default:
device_printf(sc->nge_dev,
"bad phy register write : %d\n", reg);
return (0);
}
CSR_WRITE_4(sc, reg, data);
return (0);
}
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
- Import the common MII bitbang'ing code from NetBSD and convert drivers to take advantage of it instead of duplicating it. This reduces the size of the i386 GENERIC kernel by about 4k. The only potential in-tree user left unconverted is xe(4), which generally should be changed to use miibus(4) instead of implementing PHY handling on its own, as otherwise it makes not much sense to add a dependency on miibus(4)/mii_bitbang(4) to xe(4) just for the MII bitbang'ing code. The common MII bitbang'ing code also is useful in the embedded space for using GPIO pins to implement MII access. - Based on lessons learnt with dc(4) (see r185750), add bus barriers to the MII bitbang read and write functions of the other drivers converted in order to ensure the intended ordering. Given that register access via an index register as well as register bank/window switching is subject to the same problem, also add bus barriers to the respective functions of smc(4), tl(4) and xl(4). - Sprinkle some const. Thanks to the following testers: Andrew Bliznak (nge(4)), nwhitehorn@ (bm(4)), yongari@ (sis(4) and ste(4)) Thanks to Hans-Joerg Sirtl for supplying hardware to test stge(4). Reviewed by: yongari (subset of drivers) Obtained from: NetBSD (partially)
2011-11-01 16:13:59 +00:00
mii_bitbang_writereg(dev, &nge_mii_bitbang_ops, phy, reg, data);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
style(9) - space after keyword.
2009-05-18 06:19:17 +00:00
return (0);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
/*
* media status/link state change handler.
*/
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static void
Use ANSI C declarations for all functions.
2009-05-18 06:02:54 +00:00
nge_miibus_statchg(device_t dev)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
style(9)
2009-05-18 07:04:03 +00:00
struct nge_softc *sc;
struct mii_data *mii;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
struct ifnet *ifp;
struct nge_txdesc *txd;
uint32_t done, reg, status;
int i;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
sc = device_get_softc(dev);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
NGE_LOCK_ASSERT(sc);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
mii = device_get_softc(sc->nge_miibus);
ifp = sc->nge_ifp;
if (mii == NULL || ifp == NULL ||
(ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
return;
sc->nge_flags &= ~NGE_FLAG_LINK;
if ((mii->mii_media_status & (IFM_AVALID | IFM_ACTIVE)) ==
(IFM_AVALID | IFM_ACTIVE)) {
switch (IFM_SUBTYPE(mii->mii_media_active)) {
case IFM_10_T:
case IFM_100_TX:
case IFM_1000_T:
case IFM_1000_SX:
case IFM_1000_LX:
case IFM_1000_CX:
sc->nge_flags |= NGE_FLAG_LINK;
break;
default:
break;
Add support for SX cards using TBI such as Netgear GA621. Sponsored by: Vernier Networks. MFC after: 1 week
2002-08-08 18:33:28 +00:00
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
}
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
/* Stop Tx/Rx MACs. */
if (nge_stop_mac(sc) == ETIMEDOUT)
device_printf(sc->nge_dev,
"%s: unable to stop Tx/Rx MAC\n", __func__);
nge_txeof(sc);
nge_rxeof(sc);
if (sc->nge_head != NULL) {
m_freem(sc->nge_head);
sc->nge_head = sc->nge_tail = NULL;
}
/* Release queued frames. */
for (i = 0; i < NGE_TX_RING_CNT; i++) {
txd = &sc->nge_cdata.nge_txdesc[i];
if (txd->tx_m != NULL) {
bus_dmamap_sync(sc->nge_cdata.nge_tx_tag,
txd->tx_dmamap, BUS_DMASYNC_POSTWRITE);
bus_dmamap_unload(sc->nge_cdata.nge_tx_tag,
txd->tx_dmamap);
m_freem(txd->tx_m);
txd->tx_m = NULL;
}
}
/* Program MAC with resolved speed/duplex. */
if ((sc->nge_flags & NGE_FLAG_LINK) != 0) {
if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) {
NGE_SETBIT(sc, NGE_TX_CFG,
(NGE_TXCFG_IGN_HBEAT | NGE_TXCFG_IGN_CARR));
Add support for SX cards using TBI such as Netgear GA621. Sponsored by: Vernier Networks. MFC after: 1 week
2002-08-08 18:33:28 +00:00
NGE_SETBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
#ifdef notyet
/* Enable flow-control. */
if ((IFM_OPTIONS(mii->mii_media_active) &
(IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE)) != 0)
NGE_SETBIT(sc, NGE_PAUSECSR,
NGE_PAUSECSR_PAUSE_ENB);
#endif
Add support for SX cards using TBI such as Netgear GA621. Sponsored by: Vernier Networks. MFC after: 1 week
2002-08-08 18:33:28 +00:00
} else {
NGE_CLRBIT(sc, NGE_TX_CFG,
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
(NGE_TXCFG_IGN_HBEAT | NGE_TXCFG_IGN_CARR));
Add support for SX cards using TBI such as Netgear GA621. Sponsored by: Vernier Networks. MFC after: 1 week
2002-08-08 18:33:28 +00:00
NGE_CLRBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
NGE_CLRBIT(sc, NGE_PAUSECSR, NGE_PAUSECSR_PAUSE_ENB);
Add support for SX cards using TBI such as Netgear GA621. Sponsored by: Vernier Networks. MFC after: 1 week
2002-08-08 18:33:28 +00:00
}
/* If we have a 1000Mbps link, set the mode_1000 bit. */
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
reg = CSR_READ_4(sc, NGE_CFG);
switch (IFM_SUBTYPE(mii->mii_media_active)) {
case IFM_1000_SX:
case IFM_1000_LX:
case IFM_1000_CX:
case IFM_1000_T:
reg |= NGE_CFG_MODE_1000;
break;
default:
reg &= ~NGE_CFG_MODE_1000;
break;
}
CSR_WRITE_4(sc, NGE_CFG, reg);
/* Reset Tx/Rx MAC. */
reg = CSR_READ_4(sc, NGE_CSR);
reg |= NGE_CSR_TX_RESET | NGE_CSR_RX_RESET;
CSR_WRITE_4(sc, NGE_CSR, reg);
/* Check the completion of reset. */
done = 0;
for (i = 0; i < NGE_TIMEOUT; i++) {
DELAY(1);
status = CSR_READ_4(sc, NGE_ISR);
if ((status & NGE_ISR_RX_RESET_DONE) != 0)
done |= NGE_ISR_RX_RESET_DONE;
if ((status & NGE_ISR_TX_RESET_DONE) != 0)
done |= NGE_ISR_TX_RESET_DONE;
if (done ==
(NGE_ISR_TX_RESET_DONE | NGE_ISR_RX_RESET_DONE))
break;
Add support for SX cards using TBI such as Netgear GA621. Sponsored by: Vernier Networks. MFC after: 1 week
2002-08-08 18:33:28 +00:00
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if (i == NGE_TIMEOUT)
device_printf(sc->nge_dev,
"%s: unable to reset Tx/Rx MAC\n", __func__);
/* Reuse Rx buffer and reset consumer pointer. */
sc->nge_cdata.nge_rx_cons = 0;
/*
* It seems that resetting Rx/Tx MAC results in
* resetting Tx/Rx descriptor pointer registers such
* that reloading Tx/Rx lists address are needed.
*/
CSR_WRITE_4(sc, NGE_RX_LISTPTR_HI,
NGE_ADDR_HI(sc->nge_rdata.nge_rx_ring_paddr));
CSR_WRITE_4(sc, NGE_RX_LISTPTR_LO,
NGE_ADDR_LO(sc->nge_rdata.nge_rx_ring_paddr));
CSR_WRITE_4(sc, NGE_TX_LISTPTR_HI,
NGE_ADDR_HI(sc->nge_rdata.nge_tx_ring_paddr));
CSR_WRITE_4(sc, NGE_TX_LISTPTR_LO,
NGE_ADDR_LO(sc->nge_rdata.nge_tx_ring_paddr));
/* Reinitialize Tx buffers. */
nge_list_tx_init(sc);
/* Restart Rx MAC. */
reg = CSR_READ_4(sc, NGE_CSR);
reg |= NGE_CSR_RX_ENABLE;
CSR_WRITE_4(sc, NGE_CSR, reg);
for (i = 0; i < NGE_TIMEOUT; i++) {
if ((CSR_READ_4(sc, NGE_CSR) & NGE_CSR_RX_ENABLE) != 0)
break;
DELAY(1);
}
if (i == NGE_TIMEOUT)
device_printf(sc->nge_dev,
"%s: unable to restart Rx MAC\n", __func__);
Add support for SX cards using TBI such as Netgear GA621. Sponsored by: Vernier Networks. MFC after: 1 week
2002-08-08 18:33:28 +00:00
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
/* Data LED off for TBI mode */
if ((sc->nge_flags & NGE_FLAG_TBI) != 0)
CSR_WRITE_4(sc, NGE_GPIO,
CSR_READ_4(sc, NGE_GPIO) & ~NGE_GPIO_GP3_OUT);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static void
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
nge_rxfilter(struct nge_softc *sc)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
style(9)
2009-05-18 07:04:03 +00:00
struct ifnet *ifp;
struct ifmultiaddr *ifma;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
uint32_t h, i, rxfilt;
style(9)
2009-05-18 07:04:03 +00:00
int bit, index;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
NGE_LOCK_ASSERT(sc);
Stop embedding struct ifnet at the top of driver softcs. Instead the struct ifnet or the layer 2 common structure it was embedded in have been replaced with a struct ifnet pointer to be filled by a call to the new function, if_alloc(). The layer 2 common structure is also allocated via if_alloc() based on the interface type. It is hung off the new struct ifnet member, if_l2com. This change removes the size of these structures from the kernel ABI and will allow us to better manage them as interfaces come and go. Other changes of note: - Struct arpcom is no longer referenced in normal interface code. Instead the Ethernet address is accessed via the IFP2ENADDR() macro. To enforce this ac_enaddr has been renamed to _ac_enaddr. - The second argument to ether_ifattach is now always the mac address from driver private storage rather than sometimes being ac_enaddr. Reviewed by: sobomax, sam
2005-06-10 16:49:24 +00:00
ifp = sc->nge_ifp;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
/* Make sure to stop Rx filtering. */
rxfilt = CSR_READ_4(sc, NGE_RXFILT_CTL);
rxfilt &= ~NGE_RXFILTCTL_ENABLE;
CSR_WRITE_4(sc, NGE_RXFILT_CTL, rxfilt);
- Import the common MII bitbang'ing code from NetBSD and convert drivers to take advantage of it instead of duplicating it. This reduces the size of the i386 GENERIC kernel by about 4k. The only potential in-tree user left unconverted is xe(4), which generally should be changed to use miibus(4) instead of implementing PHY handling on its own, as otherwise it makes not much sense to add a dependency on miibus(4)/mii_bitbang(4) to xe(4) just for the MII bitbang'ing code. The common MII bitbang'ing code also is useful in the embedded space for using GPIO pins to implement MII access. - Based on lessons learnt with dc(4) (see r185750), add bus barriers to the MII bitbang read and write functions of the other drivers converted in order to ensure the intended ordering. Given that register access via an index register as well as register bank/window switching is subject to the same problem, also add bus barriers to the respective functions of smc(4), tl(4) and xl(4). - Sprinkle some const. Thanks to the following testers: Andrew Bliznak (nge(4)), nwhitehorn@ (bm(4)), yongari@ (sis(4) and ste(4)) Thanks to Hans-Joerg Sirtl for supplying hardware to test stge(4). Reviewed by: yongari (subset of drivers) Obtained from: NetBSD (partially)
2011-11-01 16:13:59 +00:00
CSR_BARRIER_4(sc, NGE_RXFILT_CTL, BUS_SPACE_BARRIER_WRITE);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
rxfilt &= ~(NGE_RXFILTCTL_ALLMULTI | NGE_RXFILTCTL_ALLPHYS);
rxfilt &= ~NGE_RXFILTCTL_BROAD;
/*
* We don't want to use the hash table for matching unicast
* addresses.
*/
rxfilt &= ~(NGE_RXFILTCTL_MCHASH | NGE_RXFILTCTL_UCHASH);
/*
* For the NatSemi chip, we have to explicitly enable the
* reception of ARP frames, as well as turn on the 'perfect
* match' filter where we store the station address, otherwise
* we won't receive unicasts meant for this host.
*/
rxfilt |= NGE_RXFILTCTL_ARP | NGE_RXFILTCTL_PERFECT;
/*
* Set the capture broadcast bit to capture broadcast frames.
*/
if ((ifp->if_flags & IFF_BROADCAST) != 0)
rxfilt |= NGE_RXFILTCTL_BROAD;
if ((ifp->if_flags & IFF_PROMISC) != 0 ||
(ifp->if_flags & IFF_ALLMULTI) != 0) {
rxfilt |= NGE_RXFILTCTL_ALLMULTI;
if ((ifp->if_flags & IFF_PROMISC) != 0)
rxfilt |= NGE_RXFILTCTL_ALLPHYS;
goto done;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
/*
* We have to explicitly enable the multicast hash table
* on the NatSemi chip if we want to use it, which we do.
*/
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
rxfilt |= NGE_RXFILTCTL_MCHASH;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
/* first, zot all the existing hash bits */
for (i = 0; i < NGE_MCAST_FILTER_LEN; i += 2) {
CSR_WRITE_4(sc, NGE_RXFILT_CTL, NGE_FILTADDR_MCAST_LO + i);
CSR_WRITE_4(sc, NGE_RXFILT_DATA, 0);
}
/*
* From the 11 bits returned by the crc routine, the top 7
* bits represent the 16-bit word in the mcast hash table
* that needs to be updated, and the lower 4 bits represent
* which bit within that byte needs to be set.
*/
Use if_maddr_rlock()/if_maddr_runlock() rather than IF_ADDR_LOCK()/ IF_ADDR_UNLOCK() across network device drivers when accessing the per-interface multicast address list, if_multiaddrs. This will allow us to change the locking strategy without affecting our driver programming interface or binary interface. For two wireless drivers, remove unnecessary locking, since they don't actually access the multicast address list. Approved by: re (kib) MFC after: 6 weeks
2009-06-26 11:45:06 +00:00
if_maddr_rlock(ifp);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
if (ifma->ifma_addr->sa_family != AF_LINK)
continue;
Replace handrolled CRC calculation with ether_crc32_[lb]e().
2004-06-09 14:34:04 +00:00
h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
ifma->ifma_addr), ETHER_ADDR_LEN) >> 21;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
index = (h >> 4) & 0x7F;
bit = h & 0xF;
CSR_WRITE_4(sc, NGE_RXFILT_CTL,
NGE_FILTADDR_MCAST_LO + (index * 2));
NGE_SETBIT(sc, NGE_RXFILT_DATA, (1 << bit));
}
Use if_maddr_rlock()/if_maddr_runlock() rather than IF_ADDR_LOCK()/ IF_ADDR_UNLOCK() across network device drivers when accessing the per-interface multicast address list, if_multiaddrs. This will allow us to change the locking strategy without affecting our driver programming interface or binary interface. For two wireless drivers, remove unnecessary locking, since they don't actually access the multicast address list. Approved by: re (kib) MFC after: 6 weeks
2009-06-26 11:45:06 +00:00
if_maddr_runlock(ifp);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
done:
CSR_WRITE_4(sc, NGE_RXFILT_CTL, rxfilt);
/* Turn the receive filter on. */
rxfilt |= NGE_RXFILTCTL_ENABLE;
CSR_WRITE_4(sc, NGE_RXFILT_CTL, rxfilt);
- Import the common MII bitbang'ing code from NetBSD and convert drivers to take advantage of it instead of duplicating it. This reduces the size of the i386 GENERIC kernel by about 4k. The only potential in-tree user left unconverted is xe(4), which generally should be changed to use miibus(4) instead of implementing PHY handling on its own, as otherwise it makes not much sense to add a dependency on miibus(4)/mii_bitbang(4) to xe(4) just for the MII bitbang'ing code. The common MII bitbang'ing code also is useful in the embedded space for using GPIO pins to implement MII access. - Based on lessons learnt with dc(4) (see r185750), add bus barriers to the MII bitbang read and write functions of the other drivers converted in order to ensure the intended ordering. Given that register access via an index register as well as register bank/window switching is subject to the same problem, also add bus barriers to the respective functions of smc(4), tl(4) and xl(4). - Sprinkle some const. Thanks to the following testers: Andrew Bliznak (nge(4)), nwhitehorn@ (bm(4)), yongari@ (sis(4) and ste(4)) Thanks to Hans-Joerg Sirtl for supplying hardware to test stge(4). Reviewed by: yongari (subset of drivers) Obtained from: NetBSD (partially)
2011-11-01 16:13:59 +00:00
CSR_BARRIER_4(sc, NGE_RXFILT_CTL, BUS_SPACE_BARRIER_WRITE);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static void
Use ANSI C declarations for all functions.
2009-05-18 06:02:54 +00:00
nge_reset(struct nge_softc *sc)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
uint32_t v;
style(9)
2009-05-18 07:04:03 +00:00
int i;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
NGE_SETBIT(sc, NGE_CSR, NGE_CSR_RESET);
for (i = 0; i < NGE_TIMEOUT; i++) {
if (!(CSR_READ_4(sc, NGE_CSR) & NGE_CSR_RESET))
break;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
DELAY(1);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
if (i == NGE_TIMEOUT)
- Consistently use if_printf() only in interface methods: if_start(), if_watchdog, etc., or in functions used only in these methods. In all other functions in the driver use device_printf(). - Use __func__ instead of typing function name. Submitted by: Alex Lyashkov <umka sevcity.net>
2006-09-15 15:16:12 +00:00
device_printf(sc->nge_dev, "reset never completed\n");
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
/* Wait a little while for the chip to get its brains in order. */
DELAY(1000);
/*
* If this is a NetSemi chip, make sure to clear
* PME mode.
*/
CSR_WRITE_4(sc, NGE_CLKRUN, NGE_CLKRUN_PMESTS);
CSR_WRITE_4(sc, NGE_CLKRUN, 0);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
/* Clear WOL events which may interfere normal Rx filter opertaion. */
CSR_WRITE_4(sc, NGE_WOLCSR, 0);
/*
* Only DP83820 supports 64bits addressing/data transfers and
* 64bit addressing requires different descriptor structures.
* To make it simple, disable 64bit addressing/data transfers.
*/
v = CSR_READ_4(sc, NGE_CFG);
v &= ~(NGE_CFG_64BIT_ADDR_ENB | NGE_CFG_64BIT_DATA_ENB);
CSR_WRITE_4(sc, NGE_CFG, v);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
/*
Fix typos, mostly s/ an / a / where appropriate and a few s/an/and/ Add FreeBSD Id tag where missing.
2002-12-30 21:18:15 +00:00
* Probe for a NatSemi chip. Check the PCI vendor and device
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
* IDs against our list and return a device name if we find a match.
*/
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static int
Use ANSI C declarations for all functions.
2009-05-18 06:02:54 +00:00
nge_probe(device_t dev)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
- Import the common MII bitbang'ing code from NetBSD and convert drivers to take advantage of it instead of duplicating it. This reduces the size of the i386 GENERIC kernel by about 4k. The only potential in-tree user left unconverted is xe(4), which generally should be changed to use miibus(4) instead of implementing PHY handling on its own, as otherwise it makes not much sense to add a dependency on miibus(4)/mii_bitbang(4) to xe(4) just for the MII bitbang'ing code. The common MII bitbang'ing code also is useful in the embedded space for using GPIO pins to implement MII access. - Based on lessons learnt with dc(4) (see r185750), add bus barriers to the MII bitbang read and write functions of the other drivers converted in order to ensure the intended ordering. Given that register access via an index register as well as register bank/window switching is subject to the same problem, also add bus barriers to the respective functions of smc(4), tl(4) and xl(4). - Sprinkle some const. Thanks to the following testers: Andrew Bliznak (nge(4)), nwhitehorn@ (bm(4)), yongari@ (sis(4) and ste(4)) Thanks to Hans-Joerg Sirtl for supplying hardware to test stge(4). Reviewed by: yongari (subset of drivers) Obtained from: NetBSD (partially)
2011-11-01 16:13:59 +00:00
const struct nge_type *t;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
t = nge_devs;
style(9) - space after keyword.
2009-05-18 06:19:17 +00:00
while (t->nge_name != NULL) {
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
if ((pci_get_vendor(dev) == t->nge_vid) &&
(pci_get_device(dev) == t->nge_did)) {
device_set_desc(dev, t->nge_name);
style(9) - space after keyword.
2009-05-18 06:19:17 +00:00
return (BUS_PROBE_DEFAULT);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
t++;
}
style(9) - space after keyword.
2009-05-18 06:19:17 +00:00
return (ENXIO);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
/*
* Attach the interface. Allocate softc structures, do ifmedia
* setup and ethernet/BPF attach.
*/
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static int
Use ANSI C declarations for all functions.
2009-05-18 06:02:54 +00:00
nge_attach(device_t dev)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
uint8_t eaddr[ETHER_ADDR_LEN];
uint16_t ea[ETHER_ADDR_LEN/2], ea_temp, reg;
style(9)
2009-05-18 07:04:03 +00:00
struct nge_softc *sc;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
struct ifnet *ifp;
int error, i, rid;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
error = 0;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
sc = device_get_softc(dev);
- Consistently use if_printf() only in interface methods: if_start(), if_watchdog, etc., or in functions used only in these methods. In all other functions in the driver use device_printf(). - Use __func__ instead of typing function name. Submitted by: Alex Lyashkov <umka sevcity.net>
2006-09-15 15:16:12 +00:00
sc->nge_dev = dev;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
NGE_LOCK_INIT(sc, device_get_nameunit(dev));
Minor tweaks and fixups: - Use device_printf() and if_printf() and remove nge_unit. - Use callout_init_mtx() and remove nge_tick_locked() as nge_tick() is now always called with the driver lock held. - Use M_ZERO to contigmalloc() when allocating nge_ldata. It was possible for the random garbage to be used in certain cases otherwise. - Cleanup attach error handling including no longer leaking nge_ldata. - Add locking to the ifmedia callouts. - Lock accesses to if_hwassist and if_capenable in nge_ioctl(). Submitted by: Yuriy N. Shkandybin jura at networks dot ru (1, 3, 4) Tested by: Yuriy N. Shkandybin jura at networks dot ru MFC after: 3 days
2005-10-13 20:22:07 +00:00
callout_init_mtx(&sc->nge_stat_ch, &sc->nge_mtx, 0);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
/*
* Map control/status registers.
*/
pci_enable_busmaster(dev);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
#ifdef NGE_USEIOSPACE
sc->nge_res_type = SYS_RES_IOPORT;
sc->nge_res_id = PCIR_BAR(0);
#else
sc->nge_res_type = SYS_RES_MEMORY;
sc->nge_res_id = PCIR_BAR(1);
#endif
sc->nge_res = bus_alloc_resource_any(dev, sc->nge_res_type,
&sc->nge_res_id, RF_ACTIVE);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
if (sc->nge_res == NULL) {
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if (sc->nge_res_type == SYS_RES_MEMORY) {
sc->nge_res_type = SYS_RES_IOPORT;
sc->nge_res_id = PCIR_BAR(0);
} else {
sc->nge_res_type = SYS_RES_MEMORY;
sc->nge_res_id = PCIR_BAR(1);
}
sc->nge_res = bus_alloc_resource_any(dev, sc->nge_res_type,
&sc->nge_res_id, RF_ACTIVE);
if (sc->nge_res == NULL) {
device_printf(dev, "couldn't allocate %s resources\n",
sc->nge_res_type == SYS_RES_MEMORY ? "memory" :
"I/O");
NGE_LOCK_DESTROY(sc);
return (ENXIO);
}
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
/* Allocate interrupt */
rid = 0;
Convert callers to the new bus_alloc_resource_any(9) API. Submitted by: Mark Santcroos <marks@ripe.net> Reviewed by: imp, dfr, bde
2004-03-17 17:50:55 +00:00
sc->nge_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
RF_SHAREABLE | RF_ACTIVE);
if (sc->nge_irq == NULL) {
Minor tweaks and fixups: - Use device_printf() and if_printf() and remove nge_unit. - Use callout_init_mtx() and remove nge_tick_locked() as nge_tick() is now always called with the driver lock held. - Use M_ZERO to contigmalloc() when allocating nge_ldata. It was possible for the random garbage to be used in certain cases otherwise. - Cleanup attach error handling including no longer leaking nge_ldata. - Add locking to the ifmedia callouts. - Lock accesses to if_hwassist and if_capenable in nge_ioctl(). Submitted by: Yuriy N. Shkandybin jura at networks dot ru (1, 3, 4) Tested by: Yuriy N. Shkandybin jura at networks dot ru MFC after: 3 days
2005-10-13 20:22:07 +00:00
device_printf(dev, "couldn't map interrupt\n");
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
error = ENXIO;
goto fail;
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
/* Enable MWI. */
reg = pci_read_config(dev, PCIR_COMMAND, 2);
reg |= PCIM_CMD_MWRICEN;
pci_write_config(dev, PCIR_COMMAND, reg, 2);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
/* Reset the adapter. */
nge_reset(sc);
/*
* Get station address from the EEPROM.
*/
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
nge_read_eeprom(sc, (caddr_t)ea, NGE_EE_NODEADDR, 3);
for (i = 0; i < ETHER_ADDR_LEN / 2; i++)
ea[i] = le16toh(ea[i]);
ea_temp = ea[0];
ea[0] = ea[2];
ea[2] = ea_temp;
bcopy(ea, eaddr, sizeof(eaddr));
if (nge_dma_alloc(sc) != 0) {
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
error = ENXIO;
goto fail;
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
nge_sysctl_node(sc);
Stop embedding struct ifnet at the top of driver softcs. Instead the struct ifnet or the layer 2 common structure it was embedded in have been replaced with a struct ifnet pointer to be filled by a call to the new function, if_alloc(). The layer 2 common structure is also allocated via if_alloc() based on the interface type. It is hung off the new struct ifnet member, if_l2com. This change removes the size of these structures from the kernel ABI and will allow us to better manage them as interfaces come and go. Other changes of note: - Struct arpcom is no longer referenced in normal interface code. Instead the Ethernet address is accessed via the IFP2ENADDR() macro. To enforce this ac_enaddr has been renamed to _ac_enaddr. - The second argument to ether_ifattach is now always the mac address from driver private storage rather than sometimes being ac_enaddr. Reviewed by: sobomax, sam
2005-06-10 16:49:24 +00:00
ifp = sc->nge_ifp = if_alloc(IFT_ETHER);
if (ifp == NULL) {
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
device_printf(dev, "can not allocate ifnet structure\n");
Stop embedding struct ifnet at the top of driver softcs. Instead the struct ifnet or the layer 2 common structure it was embedded in have been replaced with a struct ifnet pointer to be filled by a call to the new function, if_alloc(). The layer 2 common structure is also allocated via if_alloc() based on the interface type. It is hung off the new struct ifnet member, if_l2com. This change removes the size of these structures from the kernel ABI and will allow us to better manage them as interfaces come and go. Other changes of note: - Struct arpcom is no longer referenced in normal interface code. Instead the Ethernet address is accessed via the IFP2ENADDR() macro. To enforce this ac_enaddr has been renamed to _ac_enaddr. - The second argument to ether_ifattach is now always the mac address from driver private storage rather than sometimes being ac_enaddr. Reviewed by: sobomax, sam
2005-06-10 16:49:24 +00:00
error = ENOSPC;
goto fail;
}
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
ifp->if_softc = sc;
Replace the if_name and if_unit members of struct ifnet with new members if_xname, if_dname, and if_dunit. if_xname is the name of the interface and if_dname/unit are the driver name and instance. This change paves the way for interface renaming and enhanced pseudo device creation and configuration symantics. Approved By: re (in principle) Reviewed By: njl, imp Tested On: i386, amd64, sparc64 Obtained From: NetBSD (if_xname)
2003-10-31 18:32:15 +00:00
if_initname(ifp, device_get_name(dev), device_get_unit(dev));
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
ifp->if_ioctl = nge_ioctl;
ifp->if_start = nge_start;
ifp->if_init = nge_init;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
ifp->if_snd.ifq_drv_maxlen = NGE_TX_RING_CNT - 1;
IFQ_SET_MAXLEN(&ifp->if_snd, ifp->if_snd.ifq_drv_maxlen);
IFQ_SET_READY(&ifp->if_snd);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
ifp->if_hwassist = NGE_CSUM_FEATURES;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
ifp->if_capabilities = IFCAP_HWCSUM;
/*
* It seems that some hardwares doesn't provide 3.3V auxiliary
* supply(3VAUX) to drive PME such that checking PCI power
* management capability is necessary.
*/
Do a sweep of the tree replacing calls to pci_find_extcap() with calls to pci_find_cap() instead.
2011-03-23 13:10:15 +00:00
if (pci_find_cap(sc->nge_dev, PCIY_PMG, &i) == 0)
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
ifp->if_capabilities |= IFCAP_WOL;
Big polling(4) cleanup. o Axe poll in trap. o Axe IFF_POLLING flag from if_flags. o Rework revision 1.21 (Giant removal), in such a way that poll_mtx is not dropped during call to polling handler. This fixes problem with idle polling. o Make registration and deregistration from polling in a functional way, insted of next tick/interrupt. o Obsolete kern.polling.enable. Polling is turned on/off with ifconfig. Detailed kern_poll.c changes: - Remove polling handler flags, introduced in 1.21. The are not needed now. - Forget and do not check if_flags, if_capenable and if_drv_flags. - Call all registered polling handlers unconditionally. - Do not drop poll_mtx, when entering polling handlers. - In ether_poll() NET_LOCK_GIANT prior to locking poll_mtx. - In netisr_poll() axe the block, where polling code asks drivers to unregister. - In netisr_poll() and ether_poll() do polling always, if any handlers are present. - In ether_poll_[de]register() remove a lot of error hiding code. Assert that arguments are correct, instead. - In ether_poll_[de]register() use standard return values in case of error or success. - Introduce poll_switch() that is a sysctl handler for kern.polling.enable. poll_switch() goes through interface list and enabled/disables polling. A message that kern.polling.enable is deprecated is printed. Detailed driver changes: - On attach driver announces IFCAP_POLLING in if_capabilities, but not in if_capenable. - On detach driver calls ether_poll_deregister() if polling is enabled. - In polling handler driver obtains its lock and checks IFF_DRV_RUNNING flag. If there is no, then unlocks and returns. - In ioctl handler driver checks for IFCAP_POLLING flag requested to be set or cleared. Driver first calls ether_poll_[de]register(), then obtains driver lock and [dis/en]ables interrupts. - In interrupt handler driver checks IFCAP_POLLING flag in if_capenable. If present, then returns.This is important to protect from spurious interrupts. Reviewed by: ru, sam, jhb
2005-10-01 18:56:19 +00:00
ifp->if_capenable = ifp->if_capabilities;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((CSR_READ_4(sc, NGE_CFG) & NGE_CFG_TBI_EN) != 0) {
sc->nge_flags |= NGE_FLAG_TBI;
device_printf(dev, "Using TBI\n");
/* Configure GPIO. */
CSR_WRITE_4(sc, NGE_GPIO, CSR_READ_4(sc, NGE_GPIO)
| NGE_GPIO_GP4_OUT
| NGE_GPIO_GP1_OUTENB | NGE_GPIO_GP2_OUTENB
| NGE_GPIO_GP3_OUTENB
| NGE_GPIO_GP3_IN | NGE_GPIO_GP4_IN);
}
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
/*
* Do MII setup.
*/
Converted the remainder of the NIC drivers to use the mii_attach() introduced in r213878 instead of mii_phy_probe(). Unlike r213893 these are only straight forward conversions though. Reviewed by: yongari
2010-10-15 15:00:30 +00:00
error = mii_attach(dev, &sc->nge_miibus, ifp, nge_mediachange,
nge_mediastatus, BMSR_DEFCAPMASK, MII_PHY_ANY, MII_OFFSET_ANY, 0);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if (error != 0) {
Converted the remainder of the NIC drivers to use the mii_attach() introduced in r213878 instead of mii_phy_probe(). Unlike r213893 these are only straight forward conversions though. Reviewed by: yongari
2010-10-15 15:00:30 +00:00
device_printf(dev, "attaching PHYs failed\n");
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
goto fail;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
/*
* Call MI attach routine.
*/
network interface driver changes: o don't strip the Ethernet header from inbound packets; pass packets up the stack intact (required significant changes to some drivers) o reference common definitions in net/ethernet.h (e.g. ETHER_ALIGN) o track ether_ifattach/ether_ifdetach API changes o track bpf changes (use BPF_TAP and BPF_MTAP) o track vlan changes (ifnet capabilities, revised processing scheme, etc.) o use if_input to pass packets "up" o call ether_ioctl for default handling of ioctls Reviewed by: many Approved by: re
2002-11-14 23:54:55 +00:00
ether_ifattach(ifp, eaddr);
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
/* VLAN capability setup. */
ifp->if_capabilities |= IFCAP_VLAN_MTU | IFCAP_VLAN_HWTAGGING;
ifp->if_capabilities |= IFCAP_VLAN_HWCSUM;
ifp->if_capenable = ifp->if_capabilities;
#ifdef DEVICE_POLLING
ifp->if_capabilities |= IFCAP_POLLING;
#endif
/*
* Tell the upper layer(s) we support long frames.
* Must appear after the call to ether_ifattach() because
* ether_ifattach() sets ifi_hdrlen to the default value.
*/
ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
/*
* Hookup IRQ last.
*/
error = bus_setup_intr(dev, sc->nge_irq, INTR_TYPE_NET | INTR_MPSAFE,
o break newbus api: add a new argument of type driver_filter_t to bus_setup_intr() o add an int return code to all fast handlers o retire INTR_FAST/IH_FAST For more info: http://docs.freebsd.org/cgi/getmsg.cgi?fetch=465712+0+current/freebsd-current Reviewed by: many Approved by: re@
2007-02-23 12:19:07 +00:00
NULL, nge_intr, sc, &sc->nge_intrhand);
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
if (error) {
Minor tweaks and fixups: - Use device_printf() and if_printf() and remove nge_unit. - Use callout_init_mtx() and remove nge_tick_locked() as nge_tick() is now always called with the driver lock held. - Use M_ZERO to contigmalloc() when allocating nge_ldata. It was possible for the random garbage to be used in certain cases otherwise. - Cleanup attach error handling including no longer leaking nge_ldata. - Add locking to the ifmedia callouts. - Lock accesses to if_hwassist and if_capenable in nge_ioctl(). Submitted by: Yuriy N. Shkandybin jura at networks dot ru (1, 3, 4) Tested by: Yuriy N. Shkandybin jura at networks dot ru MFC after: 3 days
2005-10-13 20:22:07 +00:00
device_printf(dev, "couldn't set up irq\n");
goto fail;
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
}
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
Minor tweaks and fixups: - Use device_printf() and if_printf() and remove nge_unit. - Use callout_init_mtx() and remove nge_tick_locked() as nge_tick() is now always called with the driver lock held. - Use M_ZERO to contigmalloc() when allocating nge_ldata. It was possible for the random garbage to be used in certain cases otherwise. - Cleanup attach error handling including no longer leaking nge_ldata. - Add locking to the ifmedia callouts. - Lock accesses to if_hwassist and if_capenable in nge_ioctl(). Submitted by: Yuriy N. Shkandybin jura at networks dot ru (1, 3, 4) Tested by: Yuriy N. Shkandybin jura at networks dot ru MFC after: 3 days
2005-10-13 20:22:07 +00:00
fail:
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if (error != 0)
nge_detach(dev);
style(9) - space after keyword.
2009-05-18 06:19:17 +00:00
return (error);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static int
Use ANSI C declarations for all functions.
2009-05-18 06:02:54 +00:00
nge_detach(device_t dev)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
style(9)
2009-05-18 07:04:03 +00:00
struct nge_softc *sc;
struct ifnet *ifp;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
sc = device_get_softc(dev);
Stop embedding struct ifnet at the top of driver softcs. Instead the struct ifnet or the layer 2 common structure it was embedded in have been replaced with a struct ifnet pointer to be filled by a call to the new function, if_alloc(). The layer 2 common structure is also allocated via if_alloc() based on the interface type. It is hung off the new struct ifnet member, if_l2com. This change removes the size of these structures from the kernel ABI and will allow us to better manage them as interfaces come and go. Other changes of note: - Struct arpcom is no longer referenced in normal interface code. Instead the Ethernet address is accessed via the IFP2ENADDR() macro. To enforce this ac_enaddr has been renamed to _ac_enaddr. - The second argument to ether_ifattach is now always the mac address from driver private storage rather than sometimes being ac_enaddr. Reviewed by: sobomax, sam
2005-06-10 16:49:24 +00:00
ifp = sc->nge_ifp;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
Big polling(4) cleanup. o Axe poll in trap. o Axe IFF_POLLING flag from if_flags. o Rework revision 1.21 (Giant removal), in such a way that poll_mtx is not dropped during call to polling handler. This fixes problem with idle polling. o Make registration and deregistration from polling in a functional way, insted of next tick/interrupt. o Obsolete kern.polling.enable. Polling is turned on/off with ifconfig. Detailed kern_poll.c changes: - Remove polling handler flags, introduced in 1.21. The are not needed now. - Forget and do not check if_flags, if_capenable and if_drv_flags. - Call all registered polling handlers unconditionally. - Do not drop poll_mtx, when entering polling handlers. - In ether_poll() NET_LOCK_GIANT prior to locking poll_mtx. - In netisr_poll() axe the block, where polling code asks drivers to unregister. - In netisr_poll() and ether_poll() do polling always, if any handlers are present. - In ether_poll_[de]register() remove a lot of error hiding code. Assert that arguments are correct, instead. - In ether_poll_[de]register() use standard return values in case of error or success. - Introduce poll_switch() that is a sysctl handler for kern.polling.enable. poll_switch() goes through interface list and enabled/disables polling. A message that kern.polling.enable is deprecated is printed. Detailed driver changes: - On attach driver announces IFCAP_POLLING in if_capabilities, but not in if_capenable. - On detach driver calls ether_poll_deregister() if polling is enabled. - In polling handler driver obtains its lock and checks IFF_DRV_RUNNING flag. If there is no, then unlocks and returns. - In ioctl handler driver checks for IFCAP_POLLING flag requested to be set or cleared. Driver first calls ether_poll_[de]register(), then obtains driver lock and [dis/en]ables interrupts. - In interrupt handler driver checks IFCAP_POLLING flag in if_capenable. If present, then returns.This is important to protect from spurious interrupts. Reviewed by: ru, sam, jhb
2005-10-01 18:56:19 +00:00
#ifdef DEVICE_POLLING
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if (ifp != NULL && ifp->if_capenable & IFCAP_POLLING)
Big polling(4) cleanup. o Axe poll in trap. o Axe IFF_POLLING flag from if_flags. o Rework revision 1.21 (Giant removal), in such a way that poll_mtx is not dropped during call to polling handler. This fixes problem with idle polling. o Make registration and deregistration from polling in a functional way, insted of next tick/interrupt. o Obsolete kern.polling.enable. Polling is turned on/off with ifconfig. Detailed kern_poll.c changes: - Remove polling handler flags, introduced in 1.21. The are not needed now. - Forget and do not check if_flags, if_capenable and if_drv_flags. - Call all registered polling handlers unconditionally. - Do not drop poll_mtx, when entering polling handlers. - In ether_poll() NET_LOCK_GIANT prior to locking poll_mtx. - In netisr_poll() axe the block, where polling code asks drivers to unregister. - In netisr_poll() and ether_poll() do polling always, if any handlers are present. - In ether_poll_[de]register() remove a lot of error hiding code. Assert that arguments are correct, instead. - In ether_poll_[de]register() use standard return values in case of error or success. - Introduce poll_switch() that is a sysctl handler for kern.polling.enable. poll_switch() goes through interface list and enabled/disables polling. A message that kern.polling.enable is deprecated is printed. Detailed driver changes: - On attach driver announces IFCAP_POLLING in if_capabilities, but not in if_capenable. - On detach driver calls ether_poll_deregister() if polling is enabled. - In polling handler driver obtains its lock and checks IFF_DRV_RUNNING flag. If there is no, then unlocks and returns. - In ioctl handler driver checks for IFCAP_POLLING flag requested to be set or cleared. Driver first calls ether_poll_[de]register(), then obtains driver lock and [dis/en]ables interrupts. - In interrupt handler driver checks IFCAP_POLLING flag in if_capenable. If present, then returns.This is important to protect from spurious interrupts. Reviewed by: ru, sam, jhb
2005-10-01 18:56:19 +00:00
ether_poll_deregister(ifp);
#endif
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if (device_is_attached(dev)) {
NGE_LOCK(sc);
sc->nge_flags |= NGE_FLAG_DETACH;
nge_stop(sc);
NGE_UNLOCK(sc);
callout_drain(&sc->nge_stat_ch);
if (ifp != NULL)
ether_ifdetach(ifp);
}
if (sc->nge_miibus != NULL) {
Add support for SX cards using TBI such as Netgear GA621. Sponsored by: Vernier Networks. MFC after: 1 week
2002-08-08 18:33:28 +00:00
device_delete_child(dev, sc->nge_miibus);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
sc->nge_miibus = NULL;
Add support for SX cards using TBI such as Netgear GA621. Sponsored by: Vernier Networks. MFC after: 1 week
2002-08-08 18:33:28 +00:00
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
bus_generic_detach(dev);
if (sc->nge_intrhand != NULL)
bus_teardown_intr(dev, sc->nge_irq, sc->nge_intrhand);
if (sc->nge_irq != NULL)
bus_release_resource(dev, SYS_RES_IRQ, 0, sc->nge_irq);
if (sc->nge_res != NULL)
bus_release_resource(dev, sc->nge_res_type, sc->nge_res_id,
sc->nge_res);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
nge_dma_free(sc);
if (ifp != NULL)
if_free(ifp);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
Add missing NGE_LOCK_DESTROY() to nge_detach().
2004-09-14 22:32:58 +00:00
NGE_LOCK_DESTROY(sc);
style(9) - space after keyword.
2009-05-18 06:19:17 +00:00
return (0);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
struct nge_dmamap_arg {
bus_addr_t nge_busaddr;
};
static void
nge_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
{
struct nge_dmamap_arg *ctx;
if (error != 0)
return;
ctx = arg;
ctx->nge_busaddr = segs[0].ds_addr;
}
static int
nge_dma_alloc(struct nge_softc *sc)
{
struct nge_dmamap_arg ctx;
struct nge_txdesc *txd;
struct nge_rxdesc *rxd;
int error, i;
/* Create parent DMA tag. */
error = bus_dma_tag_create(
bus_get_dma_tag(sc->nge_dev), /* parent */
1, 0, /* alignment, boundary */
BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
BUS_SPACE_MAXADDR, /* highaddr */
NULL, NULL, /* filter, filterarg */
BUS_SPACE_MAXSIZE_32BIT, /* maxsize */
0, /* nsegments */
BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
0, /* flags */
NULL, NULL, /* lockfunc, lockarg */
&sc->nge_cdata.nge_parent_tag);
if (error != 0) {
device_printf(sc->nge_dev, "failed to create parent DMA tag\n");
goto fail;
}
/* Create tag for Tx ring. */
error = bus_dma_tag_create(sc->nge_cdata.nge_parent_tag,/* parent */
NGE_RING_ALIGN, 0, /* alignment, boundary */
BUS_SPACE_MAXADDR, /* lowaddr */
BUS_SPACE_MAXADDR, /* highaddr */
NULL, NULL, /* filter, filterarg */
NGE_TX_RING_SIZE, /* maxsize */
1, /* nsegments */
NGE_TX_RING_SIZE, /* maxsegsize */
0, /* flags */
NULL, NULL, /* lockfunc, lockarg */
&sc->nge_cdata.nge_tx_ring_tag);
if (error != 0) {
device_printf(sc->nge_dev, "failed to create Tx ring DMA tag\n");
goto fail;
}
/* Create tag for Rx ring. */
error = bus_dma_tag_create(sc->nge_cdata.nge_parent_tag,/* parent */
NGE_RING_ALIGN, 0, /* alignment, boundary */
BUS_SPACE_MAXADDR, /* lowaddr */
BUS_SPACE_MAXADDR, /* highaddr */
NULL, NULL, /* filter, filterarg */
NGE_RX_RING_SIZE, /* maxsize */
1, /* nsegments */
NGE_RX_RING_SIZE, /* maxsegsize */
0, /* flags */
NULL, NULL, /* lockfunc, lockarg */
&sc->nge_cdata.nge_rx_ring_tag);
if (error != 0) {
device_printf(sc->nge_dev,
"failed to create Rx ring DMA tag\n");
goto fail;
}
/* Create tag for Tx buffers. */
error = bus_dma_tag_create(sc->nge_cdata.nge_parent_tag,/* parent */
1, 0, /* alignment, boundary */
BUS_SPACE_MAXADDR, /* lowaddr */
BUS_SPACE_MAXADDR, /* highaddr */
NULL, NULL, /* filter, filterarg */
MCLBYTES * NGE_MAXTXSEGS, /* maxsize */
NGE_MAXTXSEGS, /* nsegments */
MCLBYTES, /* maxsegsize */
0, /* flags */
NULL, NULL, /* lockfunc, lockarg */
&sc->nge_cdata.nge_tx_tag);
if (error != 0) {
device_printf(sc->nge_dev, "failed to create Tx DMA tag\n");
goto fail;
}
/* Create tag for Rx buffers. */
error = bus_dma_tag_create(sc->nge_cdata.nge_parent_tag,/* parent */
NGE_RX_ALIGN, 0, /* alignment, boundary */
BUS_SPACE_MAXADDR, /* lowaddr */
BUS_SPACE_MAXADDR, /* highaddr */
NULL, NULL, /* filter, filterarg */
MCLBYTES, /* maxsize */
1, /* nsegments */
MCLBYTES, /* maxsegsize */
0, /* flags */
NULL, NULL, /* lockfunc, lockarg */
&sc->nge_cdata.nge_rx_tag);
if (error != 0) {
device_printf(sc->nge_dev, "failed to create Rx DMA tag\n");
goto fail;
}
/* Allocate DMA'able memory and load the DMA map for Tx ring. */
error = bus_dmamem_alloc(sc->nge_cdata.nge_tx_ring_tag,
(void **)&sc->nge_rdata.nge_tx_ring, BUS_DMA_WAITOK |
BUS_DMA_COHERENT | BUS_DMA_ZERO, &sc->nge_cdata.nge_tx_ring_map);
if (error != 0) {
device_printf(sc->nge_dev,
"failed to allocate DMA'able memory for Tx ring\n");
goto fail;
}
ctx.nge_busaddr = 0;
error = bus_dmamap_load(sc->nge_cdata.nge_tx_ring_tag,
sc->nge_cdata.nge_tx_ring_map, sc->nge_rdata.nge_tx_ring,
NGE_TX_RING_SIZE, nge_dmamap_cb, &ctx, 0);
if (error != 0 || ctx.nge_busaddr == 0) {
device_printf(sc->nge_dev,
"failed to load DMA'able memory for Tx ring\n");
goto fail;
}
sc->nge_rdata.nge_tx_ring_paddr = ctx.nge_busaddr;
/* Allocate DMA'able memory and load the DMA map for Rx ring. */
error = bus_dmamem_alloc(sc->nge_cdata.nge_rx_ring_tag,
(void **)&sc->nge_rdata.nge_rx_ring, BUS_DMA_WAITOK |
BUS_DMA_COHERENT | BUS_DMA_ZERO, &sc->nge_cdata.nge_rx_ring_map);
if (error != 0) {
device_printf(sc->nge_dev,
"failed to allocate DMA'able memory for Rx ring\n");
goto fail;
}
ctx.nge_busaddr = 0;
error = bus_dmamap_load(sc->nge_cdata.nge_rx_ring_tag,
sc->nge_cdata.nge_rx_ring_map, sc->nge_rdata.nge_rx_ring,
NGE_RX_RING_SIZE, nge_dmamap_cb, &ctx, 0);
if (error != 0 || ctx.nge_busaddr == 0) {
device_printf(sc->nge_dev,
"failed to load DMA'able memory for Rx ring\n");
goto fail;
}
sc->nge_rdata.nge_rx_ring_paddr = ctx.nge_busaddr;
/* Create DMA maps for Tx buffers. */
for (i = 0; i < NGE_TX_RING_CNT; i++) {
txd = &sc->nge_cdata.nge_txdesc[i];
txd->tx_m = NULL;
txd->tx_dmamap = NULL;
error = bus_dmamap_create(sc->nge_cdata.nge_tx_tag, 0,
&txd->tx_dmamap);
if (error != 0) {
device_printf(sc->nge_dev,
"failed to create Tx dmamap\n");
goto fail;
}
}
/* Create DMA maps for Rx buffers. */
if ((error = bus_dmamap_create(sc->nge_cdata.nge_rx_tag, 0,
&sc->nge_cdata.nge_rx_sparemap)) != 0) {
device_printf(sc->nge_dev,
"failed to create spare Rx dmamap\n");
goto fail;
}
for (i = 0; i < NGE_RX_RING_CNT; i++) {
rxd = &sc->nge_cdata.nge_rxdesc[i];
rxd->rx_m = NULL;
rxd->rx_dmamap = NULL;
error = bus_dmamap_create(sc->nge_cdata.nge_rx_tag, 0,
&rxd->rx_dmamap);
if (error != 0) {
device_printf(sc->nge_dev,
"failed to create Rx dmamap\n");
goto fail;
}
}
fail:
return (error);
}
static void
nge_dma_free(struct nge_softc *sc)
{
struct nge_txdesc *txd;
struct nge_rxdesc *rxd;
int i;
/* Tx ring. */
if (sc->nge_cdata.nge_tx_ring_tag) {
if (sc->nge_cdata.nge_tx_ring_map)
bus_dmamap_unload(sc->nge_cdata.nge_tx_ring_tag,
sc->nge_cdata.nge_tx_ring_map);
if (sc->nge_cdata.nge_tx_ring_map &&
sc->nge_rdata.nge_tx_ring)
bus_dmamem_free(sc->nge_cdata.nge_tx_ring_tag,
sc->nge_rdata.nge_tx_ring,
sc->nge_cdata.nge_tx_ring_map);
sc->nge_rdata.nge_tx_ring = NULL;
sc->nge_cdata.nge_tx_ring_map = NULL;
bus_dma_tag_destroy(sc->nge_cdata.nge_tx_ring_tag);
sc->nge_cdata.nge_tx_ring_tag = NULL;
}
/* Rx ring. */
if (sc->nge_cdata.nge_rx_ring_tag) {
if (sc->nge_cdata.nge_rx_ring_map)
bus_dmamap_unload(sc->nge_cdata.nge_rx_ring_tag,
sc->nge_cdata.nge_rx_ring_map);
if (sc->nge_cdata.nge_rx_ring_map &&
sc->nge_rdata.nge_rx_ring)
bus_dmamem_free(sc->nge_cdata.nge_rx_ring_tag,
sc->nge_rdata.nge_rx_ring,
sc->nge_cdata.nge_rx_ring_map);
sc->nge_rdata.nge_rx_ring = NULL;
sc->nge_cdata.nge_rx_ring_map = NULL;
bus_dma_tag_destroy(sc->nge_cdata.nge_rx_ring_tag);
sc->nge_cdata.nge_rx_ring_tag = NULL;
}
/* Tx buffers. */
if (sc->nge_cdata.nge_tx_tag) {
for (i = 0; i < NGE_TX_RING_CNT; i++) {
txd = &sc->nge_cdata.nge_txdesc[i];
if (txd->tx_dmamap) {
bus_dmamap_destroy(sc->nge_cdata.nge_tx_tag,
txd->tx_dmamap);
txd->tx_dmamap = NULL;
}
}
bus_dma_tag_destroy(sc->nge_cdata.nge_tx_tag);
sc->nge_cdata.nge_tx_tag = NULL;
}
/* Rx buffers. */
if (sc->nge_cdata.nge_rx_tag) {
for (i = 0; i < NGE_RX_RING_CNT; i++) {
rxd = &sc->nge_cdata.nge_rxdesc[i];
if (rxd->rx_dmamap) {
bus_dmamap_destroy(sc->nge_cdata.nge_rx_tag,
rxd->rx_dmamap);
rxd->rx_dmamap = NULL;
}
}
if (sc->nge_cdata.nge_rx_sparemap) {
bus_dmamap_destroy(sc->nge_cdata.nge_rx_tag,
sc->nge_cdata.nge_rx_sparemap);
sc->nge_cdata.nge_rx_sparemap = 0;
}
bus_dma_tag_destroy(sc->nge_cdata.nge_rx_tag);
sc->nge_cdata.nge_rx_tag = NULL;
}
if (sc->nge_cdata.nge_parent_tag) {
bus_dma_tag_destroy(sc->nge_cdata.nge_parent_tag);
sc->nge_cdata.nge_parent_tag = NULL;
}
}
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
/*
* Initialize the transmit descriptors.
*/
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static int
Use ANSI C declarations for all functions.
2009-05-18 06:02:54 +00:00
nge_list_tx_init(struct nge_softc *sc)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
struct nge_ring_data *rd;
struct nge_txdesc *txd;
bus_addr_t addr;
style(9)
2009-05-18 07:04:03 +00:00
int i;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
sc->nge_cdata.nge_tx_prod = 0;
sc->nge_cdata.nge_tx_cons = 0;
sc->nge_cdata.nge_tx_cnt = 0;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
rd = &sc->nge_rdata;
bzero(rd->nge_tx_ring, sizeof(struct nge_desc) * NGE_TX_RING_CNT);
for (i = 0; i < NGE_TX_RING_CNT; i++) {
if (i == NGE_TX_RING_CNT - 1)
addr = NGE_TX_RING_ADDR(sc, 0);
else
addr = NGE_TX_RING_ADDR(sc, i + 1);
rd->nge_tx_ring[i].nge_next = htole32(NGE_ADDR_LO(addr));
txd = &sc->nge_cdata.nge_txdesc[i];
txd->tx_m = NULL;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
bus_dmamap_sync(sc->nge_cdata.nge_tx_ring_tag,
sc->nge_cdata.nge_tx_ring_map,
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
style(9) - space after keyword.
2009-05-18 06:19:17 +00:00
return (0);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
/*
* Initialize the RX descriptors and allocate mbufs for them. Note that
* we arrange the descriptors in a closed ring, so that the last descriptor
* points back to the first.
*/
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static int
Use ANSI C declarations for all functions.
2009-05-18 06:02:54 +00:00
nge_list_rx_init(struct nge_softc *sc)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
struct nge_ring_data *rd;
bus_addr_t addr;
style(9)
2009-05-18 07:04:03 +00:00
int i;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
sc->nge_cdata.nge_rx_cons = 0;
sc->nge_head = sc->nge_tail = NULL;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
rd = &sc->nge_rdata;
bzero(rd->nge_rx_ring, sizeof(struct nge_desc) * NGE_RX_RING_CNT);
for (i = 0; i < NGE_RX_RING_CNT; i++) {
if (nge_newbuf(sc, i) != 0)
style(9) - space after keyword.
2009-05-18 06:19:17 +00:00
return (ENOBUFS);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if (i == NGE_RX_RING_CNT - 1)
addr = NGE_RX_RING_ADDR(sc, 0);
else
addr = NGE_RX_RING_ADDR(sc, i + 1);
rd->nge_rx_ring[i].nge_next = htole32(NGE_ADDR_LO(addr));
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
bus_dmamap_sync(sc->nge_cdata.nge_rx_ring_tag,
sc->nge_cdata.nge_rx_ring_map,
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
style(9) - space after keyword.
2009-05-18 06:19:17 +00:00
return (0);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
static __inline void
nge_discard_rxbuf(struct nge_softc *sc, int idx)
{
struct nge_desc *desc;
desc = &sc->nge_rdata.nge_rx_ring[idx];
desc->nge_cmdsts = htole32(MCLBYTES - sizeof(uint64_t));
desc->nge_extsts = 0;
}
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
/*
* Initialize an RX descriptor and attach an MBUF cluster.
*/
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static int
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
nge_newbuf(struct nge_softc *sc, int idx)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
struct nge_desc *desc;
struct nge_rxdesc *rxd;
struct mbuf *m;
bus_dma_segment_t segs[1];
bus_dmamap_t map;
int nsegs;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
Mechanically substitute flags from historic mbuf allocator with malloc(9) flags in sys/dev.
2012-12-04 09:32:43 +00:00
m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if (m == NULL)
return (ENOBUFS);
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
m->m_len = m->m_pkthdr.len = MCLBYTES;
s/u_int8_t/uint8_t/g s/u_int16_t/uint16_t/g s/u_int32_t/uint32_t/g
2009-05-18 06:32:38 +00:00
m_adj(m, sizeof(uint64_t));
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if (bus_dmamap_load_mbuf_sg(sc->nge_cdata.nge_rx_tag,
sc->nge_cdata.nge_rx_sparemap, m, segs, &nsegs, 0) != 0) {
m_freem(m);
return (ENOBUFS);
}
KASSERT(nsegs == 1, ("%s: %d segments returned!", __func__, nsegs));
rxd = &sc->nge_cdata.nge_rxdesc[idx];
if (rxd->rx_m != NULL) {
bus_dmamap_sync(sc->nge_cdata.nge_rx_tag, rxd->rx_dmamap,
BUS_DMASYNC_POSTREAD);
bus_dmamap_unload(sc->nge_cdata.nge_rx_tag, rxd->rx_dmamap);
}
map = rxd->rx_dmamap;
rxd->rx_dmamap = sc->nge_cdata.nge_rx_sparemap;
sc->nge_cdata.nge_rx_sparemap = map;
bus_dmamap_sync(sc->nge_cdata.nge_rx_tag, rxd->rx_dmamap,
BUS_DMASYNC_PREREAD);
rxd->rx_m = m;
desc = &sc->nge_rdata.nge_rx_ring[idx];
desc->nge_ptr = htole32(NGE_ADDR_LO(segs[0].ds_addr));
desc->nge_cmdsts = htole32(segs[0].ds_len);
desc->nge_extsts = 0;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
style(9) - space after keyword.
2009-05-18 06:19:17 +00:00
return (0);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
#ifndef __NO_STRICT_ALIGNMENT
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
static __inline void
Use ANSI C declarations for all functions.
2009-05-18 06:02:54 +00:00
nge_fixup_rx(struct mbuf *m)
Remove trailling whitespaces.
2009-05-18 06:09:10 +00:00
{
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
int i;
uint16_t *src, *dst;
Remove trailling whitespaces.
2009-05-18 06:09:10 +00:00
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
src = mtod(m, uint16_t *);
dst = src - 1;
Remove trailling whitespaces.
2009-05-18 06:09:10 +00:00
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
for (i = 0; i < (m->m_len / sizeof(uint16_t) + 1); i++)
*dst++ = *src++;
Remove trailling whitespaces.
2009-05-18 06:09:10 +00:00
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
m->m_data -= ETHER_ALIGN;
Remove trailling whitespaces.
2009-05-18 06:09:10 +00:00
}
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
#endif
/*
* A frame has been uploaded: pass the resulting mbuf chain up to
* the higher level protocols.
*/
Unbreak build. Pointy hat to: attilio
2009-05-30 18:39:22 +00:00
static int
Use ANSI C declarations for all functions.
2009-05-18 06:02:54 +00:00
nge_rxeof(struct nge_softc *sc)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
Consistently use tab characters instead of spaces.
2009-05-18 07:10:48 +00:00
struct mbuf *m;
struct ifnet *ifp;
style(9)
2009-05-18 07:04:03 +00:00
struct nge_desc *cur_rx;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
struct nge_rxdesc *rxd;
Unbreak build. Pointy hat to: attilio
2009-05-30 18:39:22 +00:00
int cons, prog, rx_npkts, total_len;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
uint32_t cmdsts, extsts;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
NGE_LOCK_ASSERT(sc);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
Stop embedding struct ifnet at the top of driver softcs. Instead the struct ifnet or the layer 2 common structure it was embedded in have been replaced with a struct ifnet pointer to be filled by a call to the new function, if_alloc(). The layer 2 common structure is also allocated via if_alloc() based on the interface type. It is hung off the new struct ifnet member, if_l2com. This change removes the size of these structures from the kernel ABI and will allow us to better manage them as interfaces come and go. Other changes of note: - Struct arpcom is no longer referenced in normal interface code. Instead the Ethernet address is accessed via the IFP2ENADDR() macro. To enforce this ac_enaddr has been renamed to _ac_enaddr. - The second argument to ether_ifattach is now always the mac address from driver private storage rather than sometimes being ac_enaddr. Reviewed by: sobomax, sam
2005-06-10 16:49:24 +00:00
ifp = sc->nge_ifp;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
cons = sc->nge_cdata.nge_rx_cons;
Unbreak build. Pointy hat to: attilio
2009-05-30 18:39:22 +00:00
rx_npkts = 0;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
bus_dmamap_sync(sc->nge_cdata.nge_rx_ring_tag,
sc->nge_cdata.nge_rx_ring_map,
BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
for (prog = 0; prog < NGE_RX_RING_CNT &&
(ifp->if_drv_flags & IFF_DRV_RUNNING) != 0;
NGE_INC(cons, NGE_RX_RING_CNT)) {
Add support for DEVICE_POLLING. PR: kern/44772 Submitted by: Takashi Oono <takashi@yha.att.ne.jp> MFC after: 1 week
2002-11-06 15:50:32 +00:00
#ifdef DEVICE_POLLING
Big polling(4) cleanup. o Axe poll in trap. o Axe IFF_POLLING flag from if_flags. o Rework revision 1.21 (Giant removal), in such a way that poll_mtx is not dropped during call to polling handler. This fixes problem with idle polling. o Make registration and deregistration from polling in a functional way, insted of next tick/interrupt. o Obsolete kern.polling.enable. Polling is turned on/off with ifconfig. Detailed kern_poll.c changes: - Remove polling handler flags, introduced in 1.21. The are not needed now. - Forget and do not check if_flags, if_capenable and if_drv_flags. - Call all registered polling handlers unconditionally. - Do not drop poll_mtx, when entering polling handlers. - In ether_poll() NET_LOCK_GIANT prior to locking poll_mtx. - In netisr_poll() axe the block, where polling code asks drivers to unregister. - In netisr_poll() and ether_poll() do polling always, if any handlers are present. - In ether_poll_[de]register() remove a lot of error hiding code. Assert that arguments are correct, instead. - In ether_poll_[de]register() use standard return values in case of error or success. - Introduce poll_switch() that is a sysctl handler for kern.polling.enable. poll_switch() goes through interface list and enabled/disables polling. A message that kern.polling.enable is deprecated is printed. Detailed driver changes: - On attach driver announces IFCAP_POLLING in if_capabilities, but not in if_capenable. - On detach driver calls ether_poll_deregister() if polling is enabled. - In polling handler driver obtains its lock and checks IFF_DRV_RUNNING flag. If there is no, then unlocks and returns. - In ioctl handler driver checks for IFCAP_POLLING flag requested to be set or cleared. Driver first calls ether_poll_[de]register(), then obtains driver lock and [dis/en]ables interrupts. - In interrupt handler driver checks IFCAP_POLLING flag in if_capenable. If present, then returns.This is important to protect from spurious interrupts. Reviewed by: ru, sam, jhb
2005-10-01 18:56:19 +00:00
if (ifp->if_capenable & IFCAP_POLLING) {
Add support for DEVICE_POLLING. PR: kern/44772 Submitted by: Takashi Oono <takashi@yha.att.ne.jp> MFC after: 1 week
2002-11-06 15:50:32 +00:00
if (sc->rxcycles <= 0)
break;
sc->rxcycles--;
}
Big polling(4) cleanup. o Axe poll in trap. o Axe IFF_POLLING flag from if_flags. o Rework revision 1.21 (Giant removal), in such a way that poll_mtx is not dropped during call to polling handler. This fixes problem with idle polling. o Make registration and deregistration from polling in a functional way, insted of next tick/interrupt. o Obsolete kern.polling.enable. Polling is turned on/off with ifconfig. Detailed kern_poll.c changes: - Remove polling handler flags, introduced in 1.21. The are not needed now. - Forget and do not check if_flags, if_capenable and if_drv_flags. - Call all registered polling handlers unconditionally. - Do not drop poll_mtx, when entering polling handlers. - In ether_poll() NET_LOCK_GIANT prior to locking poll_mtx. - In netisr_poll() axe the block, where polling code asks drivers to unregister. - In netisr_poll() and ether_poll() do polling always, if any handlers are present. - In ether_poll_[de]register() remove a lot of error hiding code. Assert that arguments are correct, instead. - In ether_poll_[de]register() use standard return values in case of error or success. - Introduce poll_switch() that is a sysctl handler for kern.polling.enable. poll_switch() goes through interface list and enabled/disables polling. A message that kern.polling.enable is deprecated is printed. Detailed driver changes: - On attach driver announces IFCAP_POLLING in if_capabilities, but not in if_capenable. - On detach driver calls ether_poll_deregister() if polling is enabled. - In polling handler driver obtains its lock and checks IFF_DRV_RUNNING flag. If there is no, then unlocks and returns. - In ioctl handler driver checks for IFCAP_POLLING flag requested to be set or cleared. Driver first calls ether_poll_[de]register(), then obtains driver lock and [dis/en]ables interrupts. - In interrupt handler driver checks IFCAP_POLLING flag in if_capenable. If present, then returns.This is important to protect from spurious interrupts. Reviewed by: ru, sam, jhb
2005-10-01 18:56:19 +00:00
#endif
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
cur_rx = &sc->nge_rdata.nge_rx_ring[cons];
cmdsts = le32toh(cur_rx->nge_cmdsts);
extsts = le32toh(cur_rx->nge_extsts);
if ((cmdsts & NGE_CMDSTS_OWN) == 0)
break;
prog++;
rxd = &sc->nge_cdata.nge_rxdesc[cons];
m = rxd->rx_m;
total_len = cmdsts & NGE_CMDSTS_BUFLEN;
if ((cmdsts & NGE_CMDSTS_MORE) != 0) {
if (nge_newbuf(sc, cons) != 0) {
ifp->if_iqdrops++;
if (sc->nge_head != NULL) {
m_freem(sc->nge_head);
sc->nge_head = sc->nge_tail = NULL;
}
nge_discard_rxbuf(sc, cons);
continue;
}
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
m->m_len = total_len;
if (sc->nge_head == NULL) {
m->m_pkthdr.len = total_len;
sc->nge_head = sc->nge_tail = m;
} else {
m->m_flags &= ~M_PKTHDR;
sc->nge_head->m_pkthdr.len += total_len;
sc->nge_tail->m_next = m;
sc->nge_tail = m;
}
continue;
}
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
/*
* If an error occurs, update stats, clear the
* status word and leave the mbuf cluster in place:
* it should simply get re-used next time this descriptor
* comes up in the ring.
*/
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((cmdsts & NGE_CMDSTS_PKT_OK) == 0) {
if ((cmdsts & NGE_RXSTAT_RUNT) &&
total_len >= (ETHER_MIN_LEN - ETHER_CRC_LEN - 4)) {
/*
* Work-around hardware bug, accept runt frames
* if its length is larger than or equal to 56.
*/
} else {
/*
* Input error counters are updated by hardware.
*/
if (sc->nge_head != NULL) {
m_freem(sc->nge_head);
sc->nge_head = sc->nge_tail = NULL;
}
nge_discard_rxbuf(sc, cons);
continue;
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
}
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
/* Try conjure up a replacement mbuf. */
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if (nge_newbuf(sc, cons) != 0) {
ifp->if_iqdrops++;
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
if (sc->nge_head != NULL) {
m_freem(sc->nge_head);
sc->nge_head = sc->nge_tail = NULL;
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
nge_discard_rxbuf(sc, cons);
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
continue;
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
/* Chain received mbufs. */
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
if (sc->nge_head != NULL) {
m->m_len = total_len;
m->m_flags &= ~M_PKTHDR;
sc->nge_tail->m_next = m;
m = sc->nge_head;
m->m_pkthdr.len += total_len;
sc->nge_head = sc->nge_tail = NULL;
} else
m->m_pkthdr.len = m->m_len = total_len;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
/*
* Ok. NatSemi really screwed up here. This is the
* only gigE chip I know of with alignment constraints
* on receive buffers. RX buffers must be 64-bit aligned.
*/
Two optimizations: 1) Bite the bullet, and allow unaligned accesses without buffer copies on the i386 platform. According to some tests run by Andrew Gallatin, the buffer copy performance hit is greater than the unaligned access performance hit (especially with jumbo frames). We still need to copy everywhere else. 2) Enable interrupt moderation with a 100us timeout. Submitted by: Andrew Gallatin <no longer at duke.edu> MFC after: 1 week
2001-07-10 23:07:15 +00:00
/*
* By popular demand, ignore the alignment problems
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
* on the non-strict alignment platform. The performance hit
Two optimizations: 1) Bite the bullet, and allow unaligned accesses without buffer copies on the i386 platform. According to some tests run by Andrew Gallatin, the buffer copy performance hit is greater than the unaligned access performance hit (especially with jumbo frames). We still need to copy everywhere else. 2) Enable interrupt moderation with a 100us timeout. Submitted by: Andrew Gallatin <no longer at duke.edu> MFC after: 1 week
2001-07-10 23:07:15 +00:00
* incurred due to unaligned accesses is much smaller
* than the hit produced by forcing buffer copies all
* the time, especially with jumbo frames. We still
* need to fix up the alignment everywhere else though.
*/
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
#ifndef __NO_STRICT_ALIGNMENT
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
nge_fixup_rx(m);
Two optimizations: 1) Bite the bullet, and allow unaligned accesses without buffer copies on the i386 platform. According to some tests run by Andrew Gallatin, the buffer copy performance hit is greater than the unaligned access performance hit (especially with jumbo frames). We still need to copy everywhere else. 2) Enable interrupt moderation with a 100us timeout. Submitted by: Andrew Gallatin <no longer at duke.edu> MFC after: 1 week
2001-07-10 23:07:15 +00:00
#endif
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
m->m_pkthdr.rcvif = ifp;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
ifp->if_ipackets++;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((ifp->if_capenable & IFCAP_RXCSUM) != 0) {
/* Do IP checksum checking. */
if ((extsts & NGE_RXEXTSTS_IPPKT) != 0)
m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED;
if ((extsts & NGE_RXEXTSTS_IPCSUMERR) == 0)
m->m_pkthdr.csum_flags |= CSUM_IP_VALID;
if ((extsts & NGE_RXEXTSTS_TCPPKT &&
!(extsts & NGE_RXEXTSTS_TCPCSUMERR)) ||
(extsts & NGE_RXEXTSTS_UDPPKT &&
!(extsts & NGE_RXEXTSTS_UDPCSUMERR))) {
m->m_pkthdr.csum_flags |=
CSUM_DATA_VALID | CSUM_PSEUDO_HDR;
m->m_pkthdr.csum_data = 0xffff;
}
Fix the last serious bug I've been chasing: The DP83820/83821 has an undocumented limitation concerning jumbo frames and TX checksum offload. In order for TX checksum offload to work, the outgoing frame must fit entirely within the TX FIFO, which is 8192 bytes in size. This isn't a problem, until you try to send a 9000-byte frame, at which point the TX DMA engine goes to sleep. It turns out that if you want to send a jumbo frame larger than 8170 bytes (8192 - 64), you have to turn off the TX checksum support. As a workaround, I changed nge_ioctl() so that if the user selects an MTU larger than 8152 bytes, we clear the if_hwassist flags. The flags will be set again once the MTU is reduced to a smaller value.
2001-06-16 03:38:44 +00:00
}
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
/*
* If we received a packet with a vlan tag, pass it
* to vlan_input() instead of ether_input().
*/
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((extsts & NGE_RXEXTSTS_VLANPKT) != 0 &&
(ifp->if_capenable & IFCAP_VLAN_HWTAGGING) != 0) {
Move ethernet VLAN tags from mtags to its own mbuf packet header field m_pkthdr.ether_vlan. The presence of the M_VLANTAG flag on the mbuf signifies the presence and validity of its content. Drivers that support hardware VLAN tag stripping fill in the received VLAN tag (containing both vlan and priority information) into the ether_vtag mbuf packet header field: m->m_pkthdr.ether_vtag = vlan_id; /* ntohs()? */ m->m_flags |= M_VLANTAG; to mark the packet m with the specified VLAN tag. On output the driver should check the mbuf for the M_VLANTAG flag to see if a VLAN tag is present and valid: if (m->m_flags & M_VLANTAG) { ... = m->m_pkthdr.ether_vtag; /* htons()? */ ... pass tag to hardware ... } VLAN tags are stored in host byte order. Byte swapping may be necessary. (Note: This driver conversion was mechanic and did not add or remove any byte swapping in the drivers.) Remove zone_mtag_vlan UMA zone and MTAG_VLAN definition. No more tag memory allocation have to be done. Reviewed by: thompsa, yar Sponsored by: TCP/IP Optimization Fundraise 2005
2006-09-17 13:33:30 +00:00
m->m_pkthdr.ether_vtag =
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
bswap16(extsts & NGE_RXEXTSTS_VTCI);
Move ethernet VLAN tags from mtags to its own mbuf packet header field m_pkthdr.ether_vlan. The presence of the M_VLANTAG flag on the mbuf signifies the presence and validity of its content. Drivers that support hardware VLAN tag stripping fill in the received VLAN tag (containing both vlan and priority information) into the ether_vtag mbuf packet header field: m->m_pkthdr.ether_vtag = vlan_id; /* ntohs()? */ m->m_flags |= M_VLANTAG; to mark the packet m with the specified VLAN tag. On output the driver should check the mbuf for the M_VLANTAG flag to see if a VLAN tag is present and valid: if (m->m_flags & M_VLANTAG) { ... = m->m_pkthdr.ether_vtag; /* htons()? */ ... pass tag to hardware ... } VLAN tags are stored in host byte order. Byte swapping may be necessary. (Note: This driver conversion was mechanic and did not add or remove any byte swapping in the drivers.) Remove zone_mtag_vlan UMA zone and MTAG_VLAN definition. No more tag memory allocation have to be done. Reviewed by: thompsa, yar Sponsored by: TCP/IP Optimization Fundraise 2005
2006-09-17 13:33:30 +00:00
m->m_flags |= M_VLANTAG;
network interface driver changes: o don't strip the Ethernet header from inbound packets; pass packets up the stack intact (required significant changes to some drivers) o reference common definitions in net/ethernet.h (e.g. ETHER_ALIGN) o track ether_ifattach/ether_ifdetach API changes o track bpf changes (use BPF_TAP and BPF_MTAP) o track vlan changes (ifnet capabilities, revised processing scheme, etc.) o use if_input to pass packets "up" o call ether_ioctl for default handling of ioctls Reviewed by: many Approved by: re
2002-11-14 23:54:55 +00:00
}
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
NGE_UNLOCK(sc);
network interface driver changes: o don't strip the Ethernet header from inbound packets; pass packets up the stack intact (required significant changes to some drivers) o reference common definitions in net/ethernet.h (e.g. ETHER_ALIGN) o track ether_ifattach/ether_ifdetach API changes o track bpf changes (use BPF_TAP and BPF_MTAP) o track vlan changes (ifnet capabilities, revised processing scheme, etc.) o use if_input to pass packets "up" o call ether_ioctl for default handling of ioctls Reviewed by: many Approved by: re
2002-11-14 23:54:55 +00:00
(*ifp->if_input)(ifp, m);
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
NGE_LOCK(sc);
Unbreak build. Pointy hat to: attilio
2009-05-30 18:39:22 +00:00
rx_npkts++;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if (prog > 0) {
sc->nge_cdata.nge_rx_cons = cons;
bus_dmamap_sync(sc->nge_cdata.nge_rx_ring_tag,
sc->nge_cdata.nge_rx_ring_map,
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
}
Unbreak build. Pointy hat to: attilio
2009-05-30 18:39:22 +00:00
return (rx_npkts);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
/*
* A frame was downloaded to the chip. It's safe for us to clean up
* the list buffers.
*/
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static void
Use ANSI C declarations for all functions.
2009-05-18 06:02:54 +00:00
nge_txeof(struct nge_softc *sc)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
struct nge_desc *cur_tx;
struct nge_txdesc *txd;
style(9)
2009-05-18 07:04:03 +00:00
struct ifnet *ifp;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
uint32_t cmdsts;
int cons, prod;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
NGE_LOCK_ASSERT(sc);
Stop embedding struct ifnet at the top of driver softcs. Instead the struct ifnet or the layer 2 common structure it was embedded in have been replaced with a struct ifnet pointer to be filled by a call to the new function, if_alloc(). The layer 2 common structure is also allocated via if_alloc() based on the interface type. It is hung off the new struct ifnet member, if_l2com. This change removes the size of these structures from the kernel ABI and will allow us to better manage them as interfaces come and go. Other changes of note: - Struct arpcom is no longer referenced in normal interface code. Instead the Ethernet address is accessed via the IFP2ENADDR() macro. To enforce this ac_enaddr has been renamed to _ac_enaddr. - The second argument to ether_ifattach is now always the mac address from driver private storage rather than sometimes being ac_enaddr. Reviewed by: sobomax, sam
2005-06-10 16:49:24 +00:00
ifp = sc->nge_ifp;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
cons = sc->nge_cdata.nge_tx_cons;
prod = sc->nge_cdata.nge_tx_prod;
if (cons == prod)
return;
bus_dmamap_sync(sc->nge_cdata.nge_tx_ring_tag,
sc->nge_cdata.nge_tx_ring_map,
BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
/*
* Go through our tx list and free mbufs for those
* frames that have been transmitted.
*/
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
for (; cons != prod; NGE_INC(cons, NGE_TX_RING_CNT)) {
cur_tx = &sc->nge_rdata.nge_tx_ring[cons];
cmdsts = le32toh(cur_tx->nge_cmdsts);
if ((cmdsts & NGE_CMDSTS_OWN) != 0)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
break;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
sc->nge_cdata.nge_tx_cnt--;
ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
if ((cmdsts & NGE_CMDSTS_MORE) != 0)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
continue;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
txd = &sc->nge_cdata.nge_txdesc[cons];
bus_dmamap_sync(sc->nge_cdata.nge_tx_tag, txd->tx_dmamap,
BUS_DMASYNC_POSTWRITE);
bus_dmamap_unload(sc->nge_cdata.nge_tx_tag, txd->tx_dmamap);
if ((cmdsts & NGE_CMDSTS_PKT_OK) == 0) {
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
ifp->if_oerrors++;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((cmdsts & NGE_TXSTAT_EXCESSCOLLS) != 0)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
ifp->if_collisions++;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((cmdsts & NGE_TXSTAT_OUTOFWINCOLL) != 0)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
ifp->if_collisions++;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
} else
ifp->if_opackets++;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
ifp->if_collisions += (cmdsts & NGE_TXSTAT_COLLCNT) >> 16;
KASSERT(txd->tx_m != NULL, ("%s: freeing NULL mbuf!\n",
__func__));
m_freem(txd->tx_m);
txd->tx_m = NULL;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
sc->nge_cdata.nge_tx_cons = cons;
if (sc->nge_cdata.nge_tx_cnt == 0)
sc->nge_watchdog_timer = 0;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static void
Use ANSI C declarations for all functions.
2009-05-18 06:02:54 +00:00
nge_tick(void *xsc)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
style(9)
2009-05-18 07:04:03 +00:00
struct nge_softc *sc;
struct mii_data *mii;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
Minor tweaks and fixups: - Use device_printf() and if_printf() and remove nge_unit. - Use callout_init_mtx() and remove nge_tick_locked() as nge_tick() is now always called with the driver lock held. - Use M_ZERO to contigmalloc() when allocating nge_ldata. It was possible for the random garbage to be used in certain cases otherwise. - Cleanup attach error handling including no longer leaking nge_ldata. - Add locking to the ifmedia callouts. - Lock accesses to if_hwassist and if_capenable in nge_ioctl(). Submitted by: Yuriy N. Shkandybin jura at networks dot ru (1, 3, 4) Tested by: Yuriy N. Shkandybin jura at networks dot ru MFC after: 3 days
2005-10-13 20:22:07 +00:00
sc = xsc;
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
NGE_LOCK_ASSERT(sc);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
mii = device_get_softc(sc->nge_miibus);
mii_tick(mii);
/*
* For PHYs that does not reset established link, it is
* necessary to check whether driver still have a valid
* link(e.g link state change callback is not called).
* Otherwise, driver think it lost link because driver
* initialization routine clears link state flag.
*/
if ((sc->nge_flags & NGE_FLAG_LINK) == 0)
nge_miibus_statchg(sc->nge_dev);
nge_stats_update(sc);
nge_watchdog(sc);
callout_reset(&sc->nge_stat_ch, hz, nge_tick, sc);
}
static void
nge_stats_update(struct nge_softc *sc)
{
struct ifnet *ifp;
struct nge_stats now, *stats, *nstats;
NGE_LOCK_ASSERT(sc);
Stop embedding struct ifnet at the top of driver softcs. Instead the struct ifnet or the layer 2 common structure it was embedded in have been replaced with a struct ifnet pointer to be filled by a call to the new function, if_alloc(). The layer 2 common structure is also allocated via if_alloc() based on the interface type. It is hung off the new struct ifnet member, if_l2com. This change removes the size of these structures from the kernel ABI and will allow us to better manage them as interfaces come and go. Other changes of note: - Struct arpcom is no longer referenced in normal interface code. Instead the Ethernet address is accessed via the IFP2ENADDR() macro. To enforce this ac_enaddr has been renamed to _ac_enaddr. - The second argument to ether_ifattach is now always the mac address from driver private storage rather than sometimes being ac_enaddr. Reviewed by: sobomax, sam
2005-06-10 16:49:24 +00:00
ifp = sc->nge_ifp;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
stats = &now;
stats->rx_pkts_errs =
CSR_READ_4(sc, NGE_MIB_RXERRPKT) & 0xFFFF;
stats->rx_crc_errs =
CSR_READ_4(sc, NGE_MIB_RXERRFCS) & 0xFFFF;
stats->rx_fifo_oflows =
CSR_READ_4(sc, NGE_MIB_RXERRMISSEDPKT) & 0xFFFF;
stats->rx_align_errs =
CSR_READ_4(sc, NGE_MIB_RXERRALIGN) & 0xFFFF;
stats->rx_sym_errs =
CSR_READ_4(sc, NGE_MIB_RXERRSYM) & 0xFFFF;
stats->rx_pkts_jumbos =
CSR_READ_4(sc, NGE_MIB_RXERRGIANT) & 0xFFFF;
stats->rx_len_errs =
CSR_READ_4(sc, NGE_MIB_RXERRRANGLEN) & 0xFFFF;
stats->rx_unctl_frames =
CSR_READ_4(sc, NGE_MIB_RXBADOPCODE) & 0xFFFF;
stats->rx_pause =
CSR_READ_4(sc, NGE_MIB_RXPAUSEPKTS) & 0xFFFF;
stats->tx_pause =
CSR_READ_4(sc, NGE_MIB_TXPAUSEPKTS) & 0xFFFF;
stats->tx_seq_errs =
CSR_READ_4(sc, NGE_MIB_TXERRSQE) & 0xFF;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
/*
* Since we've accept errored frames exclude Rx length errors.
*/
ifp->if_ierrors += stats->rx_pkts_errs + stats->rx_crc_errs +
stats->rx_fifo_oflows + stats->rx_sym_errs;
nstats = &sc->nge_stats;
nstats->rx_pkts_errs += stats->rx_pkts_errs;
nstats->rx_crc_errs += stats->rx_crc_errs;
nstats->rx_fifo_oflows += stats->rx_fifo_oflows;
nstats->rx_align_errs += stats->rx_align_errs;
nstats->rx_sym_errs += stats->rx_sym_errs;
nstats->rx_pkts_jumbos += stats->rx_pkts_jumbos;
nstats->rx_len_errs += stats->rx_len_errs;
nstats->rx_unctl_frames += stats->rx_unctl_frames;
nstats->rx_pause += stats->rx_pause;
nstats->tx_pause += stats->tx_pause;
nstats->tx_seq_errs += stats->tx_seq_errs;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
Add support for DEVICE_POLLING. PR: kern/44772 Submitted by: Takashi Oono <takashi@yha.att.ne.jp> MFC after: 1 week
2002-11-06 15:50:32 +00:00
#ifdef DEVICE_POLLING
static poll_handler_t nge_poll;
Unbreak build. Pointy hat to: attilio
2009-05-30 18:39:22 +00:00
static int
Add support for DEVICE_POLLING. PR: kern/44772 Submitted by: Takashi Oono <takashi@yha.att.ne.jp> MFC after: 1 week
2002-11-06 15:50:32 +00:00
nge_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
{
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
struct nge_softc *sc;
Unbreak build. Pointy hat to: attilio
2009-05-30 18:39:22 +00:00
int rx_npkts = 0;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
sc = ifp->if_softc;
Add support for DEVICE_POLLING. PR: kern/44772 Submitted by: Takashi Oono <takashi@yha.att.ne.jp> MFC after: 1 week
2002-11-06 15:50:32 +00:00
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
NGE_LOCK(sc);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
NGE_UNLOCK(sc);
Unbreak build. Pointy hat to: attilio
2009-05-30 18:39:22 +00:00
return (rx_npkts);
Add support for DEVICE_POLLING. PR: kern/44772 Submitted by: Takashi Oono <takashi@yha.att.ne.jp> MFC after: 1 week
2002-11-06 15:50:32 +00:00
}
/*
* On the nge, reading the status register also clears it.
* So before returning to intr mode we must make sure that all
* possible pending sources of interrupts have been served.
* In practice this means run to completion the *eof routines,
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
* and then call the interrupt routine.
Add support for DEVICE_POLLING. PR: kern/44772 Submitted by: Takashi Oono <takashi@yha.att.ne.jp> MFC after: 1 week
2002-11-06 15:50:32 +00:00
*/
sc->rxcycles = count;
Unbreak build. Pointy hat to: attilio
2009-05-30 18:39:22 +00:00
rx_npkts = nge_rxeof(sc);
Add support for DEVICE_POLLING. PR: kern/44772 Submitted by: Takashi Oono <takashi@yha.att.ne.jp> MFC after: 1 week
2002-11-06 15:50:32 +00:00
nge_txeof(sc);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
nge_start_locked(ifp);
Add support for DEVICE_POLLING. PR: kern/44772 Submitted by: Takashi Oono <takashi@yha.att.ne.jp> MFC after: 1 week
2002-11-06 15:50:32 +00:00
if (sc->rxcycles > 0 || cmd == POLL_AND_CHECK_STATUS) {
s/u_int8_t/uint8_t/g s/u_int16_t/uint16_t/g s/u_int32_t/uint32_t/g
2009-05-18 06:32:38 +00:00
uint32_t status;
Add support for DEVICE_POLLING. PR: kern/44772 Submitted by: Takashi Oono <takashi@yha.att.ne.jp> MFC after: 1 week
2002-11-06 15:50:32 +00:00
/* Reading the ISR register clears all interrupts. */
status = CSR_READ_4(sc, NGE_ISR);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((status & (NGE_ISR_RX_ERR|NGE_ISR_RX_OFLOW)) != 0)
Unbreak build. Pointy hat to: attilio
2009-05-30 18:39:22 +00:00
rx_npkts += nge_rxeof(sc);
Add support for DEVICE_POLLING. PR: kern/44772 Submitted by: Takashi Oono <takashi@yha.att.ne.jp> MFC after: 1 week
2002-11-06 15:50:32 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((status & NGE_ISR_RX_IDLE) != 0)
Add support for DEVICE_POLLING. PR: kern/44772 Submitted by: Takashi Oono <takashi@yha.att.ne.jp> MFC after: 1 week
2002-11-06 15:50:32 +00:00
NGE_SETBIT(sc, NGE_CSR, NGE_CSR_RX_ENABLE);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((status & NGE_ISR_SYSERR) != 0) {
ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
nge_init_locked(sc);
Add support for DEVICE_POLLING. PR: kern/44772 Submitted by: Takashi Oono <takashi@yha.att.ne.jp> MFC after: 1 week
2002-11-06 15:50:32 +00:00
}
}
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
NGE_UNLOCK(sc);
Unbreak build. Pointy hat to: attilio
2009-05-30 18:39:22 +00:00
return (rx_npkts);
Add support for DEVICE_POLLING. PR: kern/44772 Submitted by: Takashi Oono <takashi@yha.att.ne.jp> MFC after: 1 week
2002-11-06 15:50:32 +00:00
}
#endif /* DEVICE_POLLING */
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static void
Use ANSI C declarations for all functions.
2009-05-18 06:02:54 +00:00
nge_intr(void *arg)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
style(9)
2009-05-18 07:04:03 +00:00
struct nge_softc *sc;
struct ifnet *ifp;
uint32_t status;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
sc = (struct nge_softc *)arg;
Stop embedding struct ifnet at the top of driver softcs. Instead the struct ifnet or the layer 2 common structure it was embedded in have been replaced with a struct ifnet pointer to be filled by a call to the new function, if_alloc(). The layer 2 common structure is also allocated via if_alloc() based on the interface type. It is hung off the new struct ifnet member, if_l2com. This change removes the size of these structures from the kernel ABI and will allow us to better manage them as interfaces come and go. Other changes of note: - Struct arpcom is no longer referenced in normal interface code. Instead the Ethernet address is accessed via the IFP2ENADDR() macro. To enforce this ac_enaddr has been renamed to _ac_enaddr. - The second argument to ether_ifattach is now always the mac address from driver private storage rather than sometimes being ac_enaddr. Reviewed by: sobomax, sam
2005-06-10 16:49:24 +00:00
ifp = sc->nge_ifp;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
NGE_LOCK(sc);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((sc->nge_flags & NGE_FLAG_SUSPENDED) != 0)
goto done_locked;
/* Reading the ISR register clears all interrupts. */
status = CSR_READ_4(sc, NGE_ISR);
if (status == 0xffffffff || (status & NGE_INTRS) == 0)
goto done_locked;
Add support for DEVICE_POLLING. PR: kern/44772 Submitted by: Takashi Oono <takashi@yha.att.ne.jp> MFC after: 1 week
2002-11-06 15:50:32 +00:00
#ifdef DEVICE_POLLING
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((ifp->if_capenable & IFCAP_POLLING) != 0)
goto done_locked;
Big polling(4) cleanup. o Axe poll in trap. o Axe IFF_POLLING flag from if_flags. o Rework revision 1.21 (Giant removal), in such a way that poll_mtx is not dropped during call to polling handler. This fixes problem with idle polling. o Make registration and deregistration from polling in a functional way, insted of next tick/interrupt. o Obsolete kern.polling.enable. Polling is turned on/off with ifconfig. Detailed kern_poll.c changes: - Remove polling handler flags, introduced in 1.21. The are not needed now. - Forget and do not check if_flags, if_capenable and if_drv_flags. - Call all registered polling handlers unconditionally. - Do not drop poll_mtx, when entering polling handlers. - In ether_poll() NET_LOCK_GIANT prior to locking poll_mtx. - In netisr_poll() axe the block, where polling code asks drivers to unregister. - In netisr_poll() and ether_poll() do polling always, if any handlers are present. - In ether_poll_[de]register() remove a lot of error hiding code. Assert that arguments are correct, instead. - In ether_poll_[de]register() use standard return values in case of error or success. - Introduce poll_switch() that is a sysctl handler for kern.polling.enable. poll_switch() goes through interface list and enabled/disables polling. A message that kern.polling.enable is deprecated is printed. Detailed driver changes: - On attach driver announces IFCAP_POLLING in if_capabilities, but not in if_capenable. - On detach driver calls ether_poll_deregister() if polling is enabled. - In polling handler driver obtains its lock and checks IFF_DRV_RUNNING flag. If there is no, then unlocks and returns. - In ioctl handler driver checks for IFCAP_POLLING flag requested to be set or cleared. Driver first calls ether_poll_[de]register(), then obtains driver lock and [dis/en]ables interrupts. - In interrupt handler driver checks IFCAP_POLLING flag in if_capenable. If present, then returns.This is important to protect from spurious interrupts. Reviewed by: ru, sam, jhb
2005-10-01 18:56:19 +00:00
#endif
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
goto done_locked;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
/* Disable interrupts. */
CSR_WRITE_4(sc, NGE_IER, 0);
Add support for SX cards using TBI such as Netgear GA621. Sponsored by: Vernier Networks. MFC after: 1 week
2002-08-08 18:33:28 +00:00
/* Data LED on for TBI mode */
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((sc->nge_flags & NGE_FLAG_TBI) != 0)
CSR_WRITE_4(sc, NGE_GPIO,
CSR_READ_4(sc, NGE_GPIO) | NGE_GPIO_GP3_OUT);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
for (; (status & NGE_INTRS) != 0;) {
if ((status & (NGE_ISR_TX_DESC_OK | NGE_ISR_TX_ERR |
NGE_ISR_TX_OK | NGE_ISR_TX_IDLE)) != 0)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
nge_txeof(sc);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((status & (NGE_ISR_RX_DESC_OK | NGE_ISR_RX_ERR |
NGE_ISR_RX_OFLOW | NGE_ISR_RX_FIFO_OFLOW |
NGE_ISR_RX_IDLE | NGE_ISR_RX_OK)) != 0)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
nge_rxeof(sc);
If the receiver runs out of space for an received frame in the internal FIFO or the in-RAM descriptors it will switch to RX_IDLE from where it is not restarted. We used to deal with RX_IDLE by doing a total reinit but this lost our link and caused a potential 30sec autonegotiation against switches. This was changed to a less heavyhanded approach, but this failed to restart the receiver it it were in the RX_IDLE state. This change adds the RX_IDLE and the RX_FIFO_OFLOW conditions as triggers for interrupts and receive side processing, and restarts the receiver when it is RX_IDLE. Remove the #ifdef notyet'ed nge_rxeoc() function. Sponsored by: Cybercity Internet, Denmark. MFC after: 7 days
2002-04-13 21:33:33 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((status & NGE_ISR_RX_IDLE) != 0)
If the receiver runs out of space for an received frame in the internal FIFO or the in-RAM descriptors it will switch to RX_IDLE from where it is not restarted. We used to deal with RX_IDLE by doing a total reinit but this lost our link and caused a potential 30sec autonegotiation against switches. This was changed to a less heavyhanded approach, but this failed to restart the receiver it it were in the RX_IDLE state. This change adds the RX_IDLE and the RX_FIFO_OFLOW conditions as triggers for interrupts and receive side processing, and restarts the receiver when it is RX_IDLE. Remove the #ifdef notyet'ed nge_rxeoc() function. Sponsored by: Cybercity Internet, Denmark. MFC after: 7 days
2002-04-13 21:33:33 +00:00
NGE_SETBIT(sc, NGE_CSR, NGE_CSR_RX_ENABLE);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((status & NGE_ISR_SYSERR) != 0) {
Propagate rename of IFF_OACTIVE and IFF_RUNNING to IFF_DRV_OACTIVE and IFF_DRV_RUNNING, as well as the move from ifnet.if_flags to ifnet.if_drv_flags. Device drivers are now responsible for synchronizing access to these flags, as they are in if_drv_flags. This helps prevent races between the network stack and device driver in maintaining the interface flags field. Many __FreeBSD__ and __FreeBSD_version checks maintained and continued; some less so. Reviewed by: pjd, bz MFC after: 7 days
2005-08-09 10:20:02 +00:00
ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
nge_init_locked(sc);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
/* Reading the ISR register clears all interrupts. */
status = CSR_READ_4(sc, NGE_ISR);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
/* Re-enable interrupts. */
CSR_WRITE_4(sc, NGE_IER, 1);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
nge_start_locked(ifp);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
Add support for SX cards using TBI such as Netgear GA621. Sponsored by: Vernier Networks. MFC after: 1 week
2002-08-08 18:33:28 +00:00
/* Data LED off for TBI mode */
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((sc->nge_flags & NGE_FLAG_TBI) != 0)
CSR_WRITE_4(sc, NGE_GPIO,
CSR_READ_4(sc, NGE_GPIO) & ~NGE_GPIO_GP3_OUT);
Add support for SX cards using TBI such as Netgear GA621. Sponsored by: Vernier Networks. MFC after: 1 week
2002-08-08 18:33:28 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
done_locked:
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
NGE_UNLOCK(sc);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
/*
* Encapsulate an mbuf chain in a descriptor by coupling the mbuf data
* pointers to the fragment pointers.
*/
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static int
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
nge_encap(struct nge_softc *sc, struct mbuf **m_head)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
struct nge_txdesc *txd, *txd_last;
struct nge_desc *desc;
style(9)
2009-05-18 07:04:03 +00:00
struct mbuf *m;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
bus_dmamap_t map;
bus_dma_segment_t txsegs[NGE_MAXTXSEGS];
int error, i, nsegs, prod, si;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
NGE_LOCK_ASSERT(sc);
m = *m_head;
prod = sc->nge_cdata.nge_tx_prod;
txd = &sc->nge_cdata.nge_txdesc[prod];
txd_last = txd;
map = txd->tx_dmamap;
error = bus_dmamap_load_mbuf_sg(sc->nge_cdata.nge_tx_tag, map,
*m_head, txsegs, &nsegs, BUS_DMA_NOWAIT);
if (error == EFBIG) {
Mechanically substitute flags from historic mbuf allocator with malloc(9) flags in sys/dev.
2012-12-04 09:32:43 +00:00
m = m_collapse(*m_head, M_NOWAIT, NGE_MAXTXSEGS);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if (m == NULL) {
m_freem(*m_head);
*m_head = NULL;
return (ENOBUFS);
}
*m_head = m;
error = bus_dmamap_load_mbuf_sg(sc->nge_cdata.nge_tx_tag,
map, *m_head, txsegs, &nsegs, BUS_DMA_NOWAIT);
if (error != 0) {
m_freem(*m_head);
*m_head = NULL;
return (error);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
} else if (error != 0)
return (error);
if (nsegs == 0) {
m_freem(*m_head);
*m_head = NULL;
return (EIO);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
/* Check number of available descriptors. */
if (sc->nge_cdata.nge_tx_cnt + nsegs >= (NGE_TX_RING_CNT - 1)) {
bus_dmamap_unload(sc->nge_cdata.nge_tx_tag, map);
style(9) - space after keyword.
2009-05-18 06:19:17 +00:00
return (ENOBUFS);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
bus_dmamap_sync(sc->nge_cdata.nge_tx_tag, map, BUS_DMASYNC_PREWRITE);
si = prod;
for (i = 0; i < nsegs; i++) {
desc = &sc->nge_rdata.nge_tx_ring[prod];
desc->nge_ptr = htole32(NGE_ADDR_LO(txsegs[i].ds_addr));
if (i == 0)
desc->nge_cmdsts = htole32(txsegs[i].ds_len |
NGE_CMDSTS_MORE);
else
desc->nge_cmdsts = htole32(txsegs[i].ds_len |
NGE_CMDSTS_MORE | NGE_CMDSTS_OWN);
desc->nge_extsts = 0;
sc->nge_cdata.nge_tx_cnt++;
NGE_INC(prod, NGE_TX_RING_CNT);
}
/* Update producer index. */
sc->nge_cdata.nge_tx_prod = prod;
prod = (prod + NGE_TX_RING_CNT - 1) % NGE_TX_RING_CNT;
desc = &sc->nge_rdata.nge_tx_ring[prod];
/* Check if we have a VLAN tag to insert. */
if ((m->m_flags & M_VLANTAG) != 0)
desc->nge_extsts |= htole32(NGE_TXEXTSTS_VLANPKT |
bswap16(m->m_pkthdr.ether_vtag));
/* Set EOP on the last desciptor. */
desc->nge_cmdsts &= htole32(~NGE_CMDSTS_MORE);
/* Set checksum offload in the first descriptor. */
desc = &sc->nge_rdata.nge_tx_ring[si];
if ((m->m_pkthdr.csum_flags & NGE_CSUM_FEATURES) != 0) {
if ((m->m_pkthdr.csum_flags & CSUM_IP) != 0)
desc->nge_extsts |= htole32(NGE_TXEXTSTS_IPCSUM);
if ((m->m_pkthdr.csum_flags & CSUM_TCP) != 0)
desc->nge_extsts |= htole32(NGE_TXEXTSTS_TCPCSUM);
if ((m->m_pkthdr.csum_flags & CSUM_UDP) != 0)
desc->nge_extsts |= htole32(NGE_TXEXTSTS_UDPCSUM);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
/* Lastly, turn the first descriptor ownership to hardware. */
desc->nge_cmdsts |= htole32(NGE_CMDSTS_OWN);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
txd = &sc->nge_cdata.nge_txdesc[prod];
map = txd_last->tx_dmamap;
txd_last->tx_dmamap = txd->tx_dmamap;
txd->tx_dmamap = map;
txd->tx_m = m;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
style(9) - space after keyword.
2009-05-18 06:19:17 +00:00
return (0);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
/*
* Main transmit routine. To avoid having to do mbuf copies, we put pointers
* to the mbuf data regions directly in the transmit lists. We also save a
* copy of the pointers since the transmit list fragment pointers are
* physical addresses.
*/
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static void
Use ANSI C declarations for all functions.
2009-05-18 06:02:54 +00:00
nge_start(struct ifnet *ifp)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
style(9)
2009-05-18 07:04:03 +00:00
struct nge_softc *sc;
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
sc = ifp->if_softc;
NGE_LOCK(sc);
nge_start_locked(ifp);
NGE_UNLOCK(sc);
}
static void
Use ANSI C declarations for all functions.
2009-05-18 06:02:54 +00:00
nge_start_locked(struct ifnet *ifp)
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
{
style(9)
2009-05-18 07:04:03 +00:00
struct nge_softc *sc;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
struct mbuf *m_head;
int enq;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
sc = ifp->if_softc;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
NGE_LOCK_ASSERT(sc);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) !=
IFF_DRV_RUNNING || (sc->nge_flags & NGE_FLAG_LINK) == 0)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
return;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
for (enq = 0; !IFQ_DRV_IS_EMPTY(&ifp->if_snd) &&
sc->nge_cdata.nge_tx_cnt < NGE_TX_RING_CNT - 2; ) {
IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
if (m_head == NULL)
break;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
/*
* Pack the data into the transmit ring. If we
* don't have room, set the OACTIVE flag and wait
* for the NIC to drain the ring.
*/
if (nge_encap(sc, &m_head)) {
if (m_head == NULL)
break;
IFQ_DRV_PREPEND(&ifp->if_snd, m_head);
Propagate rename of IFF_OACTIVE and IFF_RUNNING to IFF_DRV_OACTIVE and IFF_DRV_RUNNING, as well as the move from ifnet.if_flags to ifnet.if_drv_flags. Device drivers are now responsible for synchronizing access to these flags, as they are in if_drv_flags. This helps prevent races between the network stack and device driver in maintaining the interface flags field. Many __FreeBSD__ and __FreeBSD_version checks maintained and continued; some less so. Reviewed by: pjd, bz MFC after: 7 days
2005-08-09 10:20:02 +00:00
ifp->if_drv_flags |= IFF_DRV_OACTIVE;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
break;
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
enq++;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
/*
* If there's a BPF listener, bounce a copy of this frame
* to him.
*/
Catch up the rest of the drivers with the ether_vlan_mtap modifications. If these drivers are setting M_VLANTAG because they are stripping the layer 2 802.1Q headers, then they need to be re-inserting them so any bpf(4) peers can properly decode them. It should be noted that this is compiled tested only. MFC after: 3 weeks
2007-03-04 03:38:08 +00:00
ETHER_BPF_MTAP(ifp, m_head);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if (enq > 0) {
bus_dmamap_sync(sc->nge_cdata.nge_tx_ring_tag,
sc->nge_cdata.nge_tx_ring_map,
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
/* Transmit */
NGE_SETBIT(sc, NGE_CSR, NGE_CSR_TX_ENABLE);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
/* Set a timeout in case the chip goes out to lunch. */
sc->nge_watchdog_timer = 5;
}
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static void
Use ANSI C declarations for all functions.
2009-05-18 06:02:54 +00:00
nge_init(void *xsc)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
style(9)
2009-05-18 07:04:03 +00:00
struct nge_softc *sc = xsc;
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
NGE_LOCK(sc);
nge_init_locked(sc);
NGE_UNLOCK(sc);
}
static void
Use ANSI C declarations for all functions.
2009-05-18 06:02:54 +00:00
nge_init_locked(struct nge_softc *sc)
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
{
style(9)
2009-05-18 07:04:03 +00:00
struct ifnet *ifp = sc->nge_ifp;
struct mii_data *mii;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
uint8_t *eaddr;
uint32_t reg;
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
NGE_LOCK_ASSERT(sc);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
return;
/*
* Cancel pending I/O and free all RX/TX buffers.
*/
nge_stop(sc);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
/* Reset the adapter. */
nge_reset(sc);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
/* Disable Rx filter prior to programming Rx filter. */
CSR_WRITE_4(sc, NGE_RXFILT_CTL, 0);
- Import the common MII bitbang'ing code from NetBSD and convert drivers to take advantage of it instead of duplicating it. This reduces the size of the i386 GENERIC kernel by about 4k. The only potential in-tree user left unconverted is xe(4), which generally should be changed to use miibus(4) instead of implementing PHY handling on its own, as otherwise it makes not much sense to add a dependency on miibus(4)/mii_bitbang(4) to xe(4) just for the MII bitbang'ing code. The common MII bitbang'ing code also is useful in the embedded space for using GPIO pins to implement MII access. - Based on lessons learnt with dc(4) (see r185750), add bus barriers to the MII bitbang read and write functions of the other drivers converted in order to ensure the intended ordering. Given that register access via an index register as well as register bank/window switching is subject to the same problem, also add bus barriers to the respective functions of smc(4), tl(4) and xl(4). - Sprinkle some const. Thanks to the following testers: Andrew Bliznak (nge(4)), nwhitehorn@ (bm(4)), yongari@ (sis(4) and ste(4)) Thanks to Hans-Joerg Sirtl for supplying hardware to test stge(4). Reviewed by: yongari (subset of drivers) Obtained from: NetBSD (partially)
2011-11-01 16:13:59 +00:00
CSR_BARRIER_4(sc, NGE_RXFILT_CTL, BUS_SPACE_BARRIER_WRITE);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
mii = device_get_softc(sc->nge_miibus);
/* Set MAC address. */
eaddr = IF_LLADDR(sc->nge_ifp);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
CSR_WRITE_4(sc, NGE_RXFILT_CTL, NGE_FILTADDR_PAR0);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
CSR_WRITE_4(sc, NGE_RXFILT_DATA, (eaddr[1] << 8) | eaddr[0]);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
CSR_WRITE_4(sc, NGE_RXFILT_CTL, NGE_FILTADDR_PAR1);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
CSR_WRITE_4(sc, NGE_RXFILT_DATA, (eaddr[3] << 8) | eaddr[2]);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
CSR_WRITE_4(sc, NGE_RXFILT_CTL, NGE_FILTADDR_PAR2);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
CSR_WRITE_4(sc, NGE_RXFILT_DATA, (eaddr[5] << 8) | eaddr[4]);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
/* Init circular RX list. */
if (nge_list_rx_init(sc) == ENOBUFS) {
- Consistently use if_printf() only in interface methods: if_start(), if_watchdog, etc., or in functions used only in these methods. In all other functions in the driver use device_printf(). - Use __func__ instead of typing function name. Submitted by: Alex Lyashkov <umka sevcity.net>
2006-09-15 15:16:12 +00:00
device_printf(sc->nge_dev, "initialization failed: no "
Minor tweaks and fixups: - Use device_printf() and if_printf() and remove nge_unit. - Use callout_init_mtx() and remove nge_tick_locked() as nge_tick() is now always called with the driver lock held. - Use M_ZERO to contigmalloc() when allocating nge_ldata. It was possible for the random garbage to be used in certain cases otherwise. - Cleanup attach error handling including no longer leaking nge_ldata. - Add locking to the ifmedia callouts. - Lock accesses to if_hwassist and if_capenable in nge_ioctl(). Submitted by: Yuriy N. Shkandybin jura at networks dot ru (1, 3, 4) Tested by: Yuriy N. Shkandybin jura at networks dot ru MFC after: 3 days
2005-10-13 20:22:07 +00:00
"memory for rx buffers\n");
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
nge_stop(sc);
return;
}
/*
* Init tx descriptors.
*/
nge_list_tx_init(sc);
/*
* For the NatSemi chip, we have to explicitly enable the
* reception of ARP frames, as well as turn on the 'perfect
* match' filter where we store the station address, otherwise
* we won't receive unicasts meant for this host.
*/
NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_ARP);
NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_PERFECT);
/*
* Set the capture broadcast bit to capture broadcast frames.
*/
if (ifp->if_flags & IFF_BROADCAST) {
NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_BROAD);
} else {
NGE_CLRBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_BROAD);
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
/* Turn the receive filter on. */
NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_ENABLE);
/* Set Rx filter. */
nge_rxfilter(sc);
/* Disable PRIQ ctl. */
CSR_WRITE_4(sc, NGE_PRIOQCTL, 0);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
/*
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
* Set pause frames paramters.
* Rx stat FIFO hi-threshold : 2 or more packets
* Rx stat FIFO lo-threshold : less than 2 packets
* Rx data FIFO hi-threshold : 2K or more bytes
* Rx data FIFO lo-threshold : less than 2K bytes
* pause time : (512ns * 0xffff) -> 33.55ms
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
*/
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
CSR_WRITE_4(sc, NGE_PAUSECSR,
NGE_PAUSECSR_PAUSE_ON_MCAST |
NGE_PAUSECSR_PAUSE_ON_DA |
((1 << 24) & NGE_PAUSECSR_RX_STATFIFO_THR_HI) |
((1 << 22) & NGE_PAUSECSR_RX_STATFIFO_THR_LO) |
((1 << 20) & NGE_PAUSECSR_RX_DATAFIFO_THR_HI) |
((1 << 18) & NGE_PAUSECSR_RX_DATAFIFO_THR_LO) |
NGE_PAUSECSR_CNT);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
/*
* Load the address of the RX and TX lists.
*/
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
CSR_WRITE_4(sc, NGE_RX_LISTPTR_HI,
NGE_ADDR_HI(sc->nge_rdata.nge_rx_ring_paddr));
CSR_WRITE_4(sc, NGE_RX_LISTPTR_LO,
NGE_ADDR_LO(sc->nge_rdata.nge_rx_ring_paddr));
CSR_WRITE_4(sc, NGE_TX_LISTPTR_HI,
NGE_ADDR_HI(sc->nge_rdata.nge_tx_ring_paddr));
CSR_WRITE_4(sc, NGE_TX_LISTPTR_LO,
NGE_ADDR_LO(sc->nge_rdata.nge_tx_ring_paddr));
/* Set RX configuration. */
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
CSR_WRITE_4(sc, NGE_RX_CFG, NGE_RXCFG);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
CSR_WRITE_4(sc, NGE_VLAN_IP_RXCTL, 0);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
/*
* Enable hardware checksum validation for all IPv4
* packets, do not reject packets with bad checksums.
*/
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((ifp->if_capenable & IFCAP_RXCSUM) != 0)
NGE_SETBIT(sc, NGE_VLAN_IP_RXCTL, NGE_VIPRXCTL_IPCSUM_ENB);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
/*
Make vlan(4) loadable, unloadable, and clonable. As a side effect, interfaces must now always enable VLAN support. Reviewed by: jlemon MFC after: 3 weeks
2001-09-05 21:10:28 +00:00
* Tell the chip to detect and strip VLAN tag info from
* received frames. The tag will be provided in the extsts
* field in the RX descriptors.
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
*/
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
NGE_SETBIT(sc, NGE_VLAN_IP_RXCTL, NGE_VIPRXCTL_TAG_DETECT_ENB);
if ((ifp->if_capenable & IFCAP_VLAN_HWTAGGING) != 0)
NGE_SETBIT(sc, NGE_VLAN_IP_RXCTL, NGE_VIPRXCTL_TAG_STRIP_ENB);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
/* Set TX configuration. */
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
CSR_WRITE_4(sc, NGE_TX_CFG, NGE_TXCFG);
/*
* Enable TX IPv4 checksumming on a per-packet basis.
*/
Fix the last serious bug I've been chasing: The DP83820/83821 has an undocumented limitation concerning jumbo frames and TX checksum offload. In order for TX checksum offload to work, the outgoing frame must fit entirely within the TX FIFO, which is 8192 bytes in size. This isn't a problem, until you try to send a 9000-byte frame, at which point the TX DMA engine goes to sleep. It turns out that if you want to send a jumbo frame larger than 8170 bytes (8192 - 64), you have to turn off the TX checksum support. As a workaround, I changed nge_ioctl() so that if the user selects an MTU larger than 8152 bytes, we clear the if_hwassist flags. The flags will be set again once the MTU is reduced to a smaller value.
2001-06-16 03:38:44 +00:00
CSR_WRITE_4(sc, NGE_VLAN_IP_TXCTL, NGE_VIPTXCTL_CSUM_PER_PKT);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
/*
Make vlan(4) loadable, unloadable, and clonable. As a side effect, interfaces must now always enable VLAN support. Reviewed by: jlemon MFC after: 3 weeks
2001-09-05 21:10:28 +00:00
* Tell the chip to insert VLAN tags on a per-packet basis as
* dictated by the code in the frame encapsulation routine.
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
*/
NGE_SETBIT(sc, NGE_VLAN_IP_TXCTL, NGE_VIPTXCTL_TAG_PER_PKT);
/*
* Enable the delivery of PHY interrupts based on
- Remember to set the 'extsts enable' bit in the CFG register to enable the use of the extsts field in DMA descriptors. We need this to tell the chip to calculate TCP/IP checksums in hardware on a per-packet basis. - Fix the unions in DMA descriptor structures. Breakage on alpha led me to realize I'd done it wrong the first time.
2001-06-06 22:16:23 +00:00
* link/speed/duplex status changes. Also enable the
* extsts field in the DMA descriptors (needed for
* TCP/IP checksum offload on transmit).
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
*/
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
NGE_SETBIT(sc, NGE_CFG, NGE_CFG_PHYINTR_SPD |
NGE_CFG_PHYINTR_LNK | NGE_CFG_PHYINTR_DUP | NGE_CFG_EXTSTS_ENB);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
Two optimizations: 1) Bite the bullet, and allow unaligned accesses without buffer copies on the i386 platform. According to some tests run by Andrew Gallatin, the buffer copy performance hit is greater than the unaligned access performance hit (especially with jumbo frames). We still need to copy everywhere else. 2) Enable interrupt moderation with a 100us timeout. Submitted by: Andrew Gallatin <no longer at duke.edu> MFC after: 1 week
2001-07-10 23:07:15 +00:00
/*
* Configure interrupt holdoff (moderation). We can
* have the chip delay interrupt delivery for a certain
* period. Units are in 100us, and the max setting
* is 25500us (0xFF x 100us). Default is a 100us holdoff.
*/
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
CSR_WRITE_4(sc, NGE_IHR, sc->nge_int_holdoff);
/*
* Enable MAC statistics counters and clear.
*/
reg = CSR_READ_4(sc, NGE_MIBCTL);
reg &= ~NGE_MIBCTL_FREEZE_CNT;
reg |= NGE_MIBCTL_CLEAR_CNT;
CSR_WRITE_4(sc, NGE_MIBCTL, reg);
Two optimizations: 1) Bite the bullet, and allow unaligned accesses without buffer copies on the i386 platform. According to some tests run by Andrew Gallatin, the buffer copy performance hit is greater than the unaligned access performance hit (especially with jumbo frames). We still need to copy everywhere else. 2) Enable interrupt moderation with a 100us timeout. Submitted by: Andrew Gallatin <no longer at duke.edu> MFC after: 1 week
2001-07-10 23:07:15 +00:00
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
/*
* Enable interrupts.
*/
CSR_WRITE_4(sc, NGE_IMR, NGE_INTRS);
Add support for DEVICE_POLLING. PR: kern/44772 Submitted by: Takashi Oono <takashi@yha.att.ne.jp> MFC after: 1 week
2002-11-06 15:50:32 +00:00
#ifdef DEVICE_POLLING
/*
* ... only enable interrupts if we are not polling, make sure
* they are off otherwise.
*/
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((ifp->if_capenable & IFCAP_POLLING) != 0)
Add support for DEVICE_POLLING. PR: kern/44772 Submitted by: Takashi Oono <takashi@yha.att.ne.jp> MFC after: 1 week
2002-11-06 15:50:32 +00:00
CSR_WRITE_4(sc, NGE_IER, 0);
else
Big polling(4) cleanup. o Axe poll in trap. o Axe IFF_POLLING flag from if_flags. o Rework revision 1.21 (Giant removal), in such a way that poll_mtx is not dropped during call to polling handler. This fixes problem with idle polling. o Make registration and deregistration from polling in a functional way, insted of next tick/interrupt. o Obsolete kern.polling.enable. Polling is turned on/off with ifconfig. Detailed kern_poll.c changes: - Remove polling handler flags, introduced in 1.21. The are not needed now. - Forget and do not check if_flags, if_capenable and if_drv_flags. - Call all registered polling handlers unconditionally. - Do not drop poll_mtx, when entering polling handlers. - In ether_poll() NET_LOCK_GIANT prior to locking poll_mtx. - In netisr_poll() axe the block, where polling code asks drivers to unregister. - In netisr_poll() and ether_poll() do polling always, if any handlers are present. - In ether_poll_[de]register() remove a lot of error hiding code. Assert that arguments are correct, instead. - In ether_poll_[de]register() use standard return values in case of error or success. - Introduce poll_switch() that is a sysctl handler for kern.polling.enable. poll_switch() goes through interface list and enabled/disables polling. A message that kern.polling.enable is deprecated is printed. Detailed driver changes: - On attach driver announces IFCAP_POLLING in if_capabilities, but not in if_capenable. - On detach driver calls ether_poll_deregister() if polling is enabled. - In polling handler driver obtains its lock and checks IFF_DRV_RUNNING flag. If there is no, then unlocks and returns. - In ioctl handler driver checks for IFCAP_POLLING flag requested to be set or cleared. Driver first calls ether_poll_[de]register(), then obtains driver lock and [dis/en]ables interrupts. - In interrupt handler driver checks IFCAP_POLLING flag in if_capenable. If present, then returns.This is important to protect from spurious interrupts. Reviewed by: ru, sam, jhb
2005-10-01 18:56:19 +00:00
#endif
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
CSR_WRITE_4(sc, NGE_IER, 1);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
sc->nge_flags &= ~NGE_FLAG_LINK;
mii_mediachg(mii);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
sc->nge_watchdog_timer = 0;
callout_reset(&sc->nge_stat_ch, hz, nge_tick, sc);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
Propagate rename of IFF_OACTIVE and IFF_RUNNING to IFF_DRV_OACTIVE and IFF_DRV_RUNNING, as well as the move from ifnet.if_flags to ifnet.if_drv_flags. Device drivers are now responsible for synchronizing access to these flags, as they are in if_drv_flags. This helps prevent races between the network stack and device driver in maintaining the interface flags field. Many __FreeBSD__ and __FreeBSD_version checks maintained and continued; some less so. Reviewed by: pjd, bz MFC after: 7 days
2005-08-09 10:20:02 +00:00
ifp->if_drv_flags |= IFF_DRV_RUNNING;
ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
/*
* Set media options.
*/
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static int
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
nge_mediachange(struct ifnet *ifp)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
style(9)
2009-05-18 07:04:03 +00:00
struct nge_softc *sc;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
struct mii_data *mii;
struct mii_softc *miisc;
int error;
Minor tweaks and fixups: - Use device_printf() and if_printf() and remove nge_unit. - Use callout_init_mtx() and remove nge_tick_locked() as nge_tick() is now always called with the driver lock held. - Use M_ZERO to contigmalloc() when allocating nge_ldata. It was possible for the random garbage to be used in certain cases otherwise. - Cleanup attach error handling including no longer leaking nge_ldata. - Add locking to the ifmedia callouts. - Lock accesses to if_hwassist and if_capenable in nge_ioctl(). Submitted by: Yuriy N. Shkandybin jura at networks dot ru (1, 3, 4) Tested by: Yuriy N. Shkandybin jura at networks dot ru MFC after: 3 days
2005-10-13 20:22:07 +00:00
sc = ifp->if_softc;
NGE_LOCK(sc);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
mii = device_get_softc(sc->nge_miibus);
- Remove attempts to implement setting of BMCR_LOOP/MIIF_NOLOOP (reporting IFM_LOOP based on BMCR_LOOP is left in place though as it might provide useful for debugging). For most mii(4) drivers it was unclear whether the PHYs driven by them actually support loopback or not. Moreover, typically loopback mode also needs to be activated on the MAC, which none of the Ethernet drivers using mii(4) implements. Given that loopback media has no real use (and obviously hardly had a chance to actually work) besides for driver development (which just loopback mode should be sufficient for though, i.e one doesn't necessary need support for loopback media) support for it is just dropped as both NetBSD and OpenBSD already did quite some time ago. - Let mii_phy_add_media() also announce the support of IFM_NONE. - Restructure the PHY entry points to use a structure of entry points instead of discrete function pointers, and extend this to include a "reset" entry point. Make sure any PHY-specific reset routine is always used, and provide one for lxtphy(4) which disables MII interrupts (as is done for a few other PHYs we have drivers for). This includes changing NIC drivers which previously just called the generic mii_phy_reset() to now actually call the PHY-specific reset routine, which might be crucial in some cases. While at it, the redundant checks in these NIC drivers for mii->mii_instance not being zero before calling the reset routines were removed because as soon as one PHY driver attaches mii->mii_instance is incremented and we hardly can end up in their media change callbacks etc if no PHY driver has attached as mii_attach() would have failed in that case and not attach a miibus(4) instance. Consequently, NIC drivers now no longer should call mii_phy_reset() directly, so it was removed from EXPORT_SYMS. - Add a mii_phy_dev_attach() as a companion helper to mii_phy_dev_probe(). The purpose of that function is to perform the common steps to attach a PHY driver instance and to hook it up to the miibus(4) instance and to optionally also handle the probing, addition and initialization of the supported media. So all a PHY driver without any special requirements has to do in its bus attach method is to call mii_phy_dev_attach() along with PHY-specific MIIF_* flags, a pointer to its PHY functions and the add_media set to one. All PHY drivers were updated to take advantage of mii_phy_dev_attach() as appropriate. Along with these changes the capability mask was added to the mii_softc structure so PHY drivers taking advantage of mii_phy_dev_attach() but still handling media on their own do not need to fiddle with the MII attach arguments anyway. - Keep track of the PHY offset in the mii_softc structure. This is done for compatibility with NetBSD/OpenBSD. - Keep track of the PHY's OUI, model and revision in the mii_softc structure. Several PHY drivers require this information also after attaching and previously had to wrap their own softc around mii_softc. NetBSD/OpenBSD also keep track of the model and revision on their mii_softc structure. All PHY drivers were updated to take advantage as appropriate. - Convert the mebers of the MII data structure to unsigned where appropriate. This is partly inspired by NetBSD/OpenBSD. - According to IEEE 802.3-2002 the bits actually have to be reversed when mapping an OUI to the MII ID registers. All PHY drivers and miidevs where changed as necessary. Actually this now again allows to largely share miidevs with NetBSD, which fixed this problem already 9 years ago. Consequently miidevs was synced as far as possible. - Add MIIF_NOMANPAUSE and mii_phy_flowstatus() calls to drivers that weren't explicitly converted to support flow control before. It's unclear whether flow control actually works with these but typically it should and their net behavior should be more correct with these changes in place than without if the MAC driver sets MIIF_DOPAUSE. Obtained from: NetBSD (partially) Reviewed by: yongari (earlier version), silence on arch@ and net@
2011-05-03 19:51:29 +00:00
LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
PHY_RESET(miisc);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
error = mii_mediachg(mii);
Minor tweaks and fixups: - Use device_printf() and if_printf() and remove nge_unit. - Use callout_init_mtx() and remove nge_tick_locked() as nge_tick() is now always called with the driver lock held. - Use M_ZERO to contigmalloc() when allocating nge_ldata. It was possible for the random garbage to be used in certain cases otherwise. - Cleanup attach error handling including no longer leaking nge_ldata. - Add locking to the ifmedia callouts. - Lock accesses to if_hwassist and if_capenable in nge_ioctl(). Submitted by: Yuriy N. Shkandybin jura at networks dot ru (1, 3, 4) Tested by: Yuriy N. Shkandybin jura at networks dot ru MFC after: 3 days
2005-10-13 20:22:07 +00:00
NGE_UNLOCK(sc);
Remove trailling whitespaces.
2009-05-18 06:09:10 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
return (error);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
/*
* Report current media status.
*/
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static void
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
nge_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
style(9)
2009-05-18 07:04:03 +00:00
struct nge_softc *sc;
struct mii_data *mii;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
sc = ifp->if_softc;
Minor tweaks and fixups: - Use device_printf() and if_printf() and remove nge_unit. - Use callout_init_mtx() and remove nge_tick_locked() as nge_tick() is now always called with the driver lock held. - Use M_ZERO to contigmalloc() when allocating nge_ldata. It was possible for the random garbage to be used in certain cases otherwise. - Cleanup attach error handling including no longer leaking nge_ldata. - Add locking to the ifmedia callouts. - Lock accesses to if_hwassist and if_capenable in nge_ioctl(). Submitted by: Yuriy N. Shkandybin jura at networks dot ru (1, 3, 4) Tested by: Yuriy N. Shkandybin jura at networks dot ru MFC after: 3 days
2005-10-13 20:22:07 +00:00
NGE_LOCK(sc);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
mii = device_get_softc(sc->nge_miibus);
mii_pollstat(mii);
ifmr->ifm_active = mii->mii_media_active;
ifmr->ifm_status = mii->mii_media_status;
Close a race where SIOCGIFMEDIA ioctl get inconsistent link status. Because driver is accessing a common MII structure in mii_pollstat(), updating user supplied structure should be done before dropping a driver lock. Reported by: Karim (fodillemlinkarimi <> gmail dot com)
2011-10-17 19:49:00 +00:00
NGE_UNLOCK(sc);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static int
Use ANSI C declarations for all functions.
2009-05-18 06:02:54 +00:00
nge_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
style(9)
2009-05-18 07:04:03 +00:00
struct nge_softc *sc = ifp->if_softc;
struct ifreq *ifr = (struct ifreq *) data;
struct mii_data *mii;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
int error = 0, mask;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
style(9) - space after keyword.
2009-05-18 06:19:17 +00:00
switch (command) {
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
case SIOCSIFMTU:
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if (ifr->ifr_mtu < ETHERMIN || ifr->ifr_mtu > NGE_JUMBO_MTU)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
error = EINVAL;
Fix the last serious bug I've been chasing: The DP83820/83821 has an undocumented limitation concerning jumbo frames and TX checksum offload. In order for TX checksum offload to work, the outgoing frame must fit entirely within the TX FIFO, which is 8192 bytes in size. This isn't a problem, until you try to send a 9000-byte frame, at which point the TX DMA engine goes to sleep. It turns out that if you want to send a jumbo frame larger than 8170 bytes (8192 - 64), you have to turn off the TX checksum support. As a workaround, I changed nge_ioctl() so that if the user selects an MTU larger than 8152 bytes, we clear the if_hwassist flags. The flags will be set again once the MTU is reduced to a smaller value.
2001-06-16 03:38:44 +00:00
else {
Minor tweaks and fixups: - Use device_printf() and if_printf() and remove nge_unit. - Use callout_init_mtx() and remove nge_tick_locked() as nge_tick() is now always called with the driver lock held. - Use M_ZERO to contigmalloc() when allocating nge_ldata. It was possible for the random garbage to be used in certain cases otherwise. - Cleanup attach error handling including no longer leaking nge_ldata. - Add locking to the ifmedia callouts. - Lock accesses to if_hwassist and if_capenable in nge_ioctl(). Submitted by: Yuriy N. Shkandybin jura at networks dot ru (1, 3, 4) Tested by: Yuriy N. Shkandybin jura at networks dot ru MFC after: 3 days
2005-10-13 20:22:07 +00:00
NGE_LOCK(sc);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
ifp->if_mtu = ifr->ifr_mtu;
Fix the last serious bug I've been chasing: The DP83820/83821 has an undocumented limitation concerning jumbo frames and TX checksum offload. In order for TX checksum offload to work, the outgoing frame must fit entirely within the TX FIFO, which is 8192 bytes in size. This isn't a problem, until you try to send a 9000-byte frame, at which point the TX DMA engine goes to sleep. It turns out that if you want to send a jumbo frame larger than 8170 bytes (8192 - 64), you have to turn off the TX checksum support. As a workaround, I changed nge_ioctl() so that if the user selects an MTU larger than 8152 bytes, we clear the if_hwassist flags. The flags will be set again once the MTU is reduced to a smaller value.
2001-06-16 03:38:44 +00:00
/*
* Workaround: if the MTU is larger than
* 8152 (TX FIFO size minus 64 minus 18), turn off
* TX checksum offloading.
*/
According to the design of checksum offloading framework, if_hwassist should be in accord with the IFCAP_TXCSUM bit of if_capenable.
2004-05-23 20:22:40 +00:00
if (ifr->ifr_mtu >= 8152) {
ifp->if_capenable &= ~IFCAP_TXCSUM;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
ifp->if_hwassist &= ~NGE_CSUM_FEATURES;
According to the design of checksum offloading framework, if_hwassist should be in accord with the IFCAP_TXCSUM bit of if_capenable.
2004-05-23 20:22:40 +00:00
} else {
ifp->if_capenable |= IFCAP_TXCSUM;
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
ifp->if_hwassist |= NGE_CSUM_FEATURES;
According to the design of checksum offloading framework, if_hwassist should be in accord with the IFCAP_TXCSUM bit of if_capenable.
2004-05-23 20:22:40 +00:00
}
Minor tweaks and fixups: - Use device_printf() and if_printf() and remove nge_unit. - Use callout_init_mtx() and remove nge_tick_locked() as nge_tick() is now always called with the driver lock held. - Use M_ZERO to contigmalloc() when allocating nge_ldata. It was possible for the random garbage to be used in certain cases otherwise. - Cleanup attach error handling including no longer leaking nge_ldata. - Add locking to the ifmedia callouts. - Lock accesses to if_hwassist and if_capenable in nge_ioctl(). Submitted by: Yuriy N. Shkandybin jura at networks dot ru (1, 3, 4) Tested by: Yuriy N. Shkandybin jura at networks dot ru MFC after: 3 days
2005-10-13 20:22:07 +00:00
NGE_UNLOCK(sc);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
VLAN_CAPABILITIES(ifp);
Fix the last serious bug I've been chasing: The DP83820/83821 has an undocumented limitation concerning jumbo frames and TX checksum offload. In order for TX checksum offload to work, the outgoing frame must fit entirely within the TX FIFO, which is 8192 bytes in size. This isn't a problem, until you try to send a 9000-byte frame, at which point the TX DMA engine goes to sleep. It turns out that if you want to send a jumbo frame larger than 8170 bytes (8192 - 64), you have to turn off the TX checksum support. As a workaround, I changed nge_ioctl() so that if the user selects an MTU larger than 8152 bytes, we clear the if_hwassist flags. The flags will be set again once the MTU is reduced to a smaller value.
2001-06-16 03:38:44 +00:00
}
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
break;
case SIOCSIFFLAGS:
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
NGE_LOCK(sc);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((ifp->if_flags & IFF_UP) != 0) {
if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) {
if ((ifp->if_flags ^ sc->nge_if_flags) &
(IFF_PROMISC | IFF_ALLMULTI))
nge_rxfilter(sc);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
} else {
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((sc->nge_flags & NGE_FLAG_DETACH) == 0)
nge_init_locked(sc);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
} else {
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
nge_stop(sc);
}
sc->nge_if_flags = ifp->if_flags;
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
NGE_UNLOCK(sc);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
error = 0;
break;
case SIOCADDMULTI:
case SIOCDELMULTI:
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
NGE_LOCK(sc);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
nge_rxfilter(sc);
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
NGE_UNLOCK(sc);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
error = 0;
break;
case SIOCGIFMEDIA:
case SIOCSIFMEDIA:
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
mii = device_get_softc(sc->nge_miibus);
error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
break;
Implemented per-interface polling(4) control.
2004-04-11 19:25:56 +00:00
case SIOCSIFCAP:
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
NGE_LOCK(sc);
mask = ifr->ifr_reqcap ^ ifp->if_capenable;
Big polling(4) cleanup. o Axe poll in trap. o Axe IFF_POLLING flag from if_flags. o Rework revision 1.21 (Giant removal), in such a way that poll_mtx is not dropped during call to polling handler. This fixes problem with idle polling. o Make registration and deregistration from polling in a functional way, insted of next tick/interrupt. o Obsolete kern.polling.enable. Polling is turned on/off with ifconfig. Detailed kern_poll.c changes: - Remove polling handler flags, introduced in 1.21. The are not needed now. - Forget and do not check if_flags, if_capenable and if_drv_flags. - Call all registered polling handlers unconditionally. - Do not drop poll_mtx, when entering polling handlers. - In ether_poll() NET_LOCK_GIANT prior to locking poll_mtx. - In netisr_poll() axe the block, where polling code asks drivers to unregister. - In netisr_poll() and ether_poll() do polling always, if any handlers are present. - In ether_poll_[de]register() remove a lot of error hiding code. Assert that arguments are correct, instead. - In ether_poll_[de]register() use standard return values in case of error or success. - Introduce poll_switch() that is a sysctl handler for kern.polling.enable. poll_switch() goes through interface list and enabled/disables polling. A message that kern.polling.enable is deprecated is printed. Detailed driver changes: - On attach driver announces IFCAP_POLLING in if_capabilities, but not in if_capenable. - On detach driver calls ether_poll_deregister() if polling is enabled. - In polling handler driver obtains its lock and checks IFF_DRV_RUNNING flag. If there is no, then unlocks and returns. - In ioctl handler driver checks for IFCAP_POLLING flag requested to be set or cleared. Driver first calls ether_poll_[de]register(), then obtains driver lock and [dis/en]ables interrupts. - In interrupt handler driver checks IFCAP_POLLING flag in if_capenable. If present, then returns.This is important to protect from spurious interrupts. Reviewed by: ru, sam, jhb
2005-10-01 18:56:19 +00:00
#ifdef DEVICE_POLLING
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((mask & IFCAP_POLLING) != 0 &&
(IFCAP_POLLING & ifp->if_capabilities) != 0) {
ifp->if_capenable ^= IFCAP_POLLING;
if ((IFCAP_POLLING & ifp->if_capenable) != 0) {
error = ether_poll_register(nge_poll, ifp);
if (error != 0) {
NGE_UNLOCK(sc);
break;
}
/* Disable interrupts. */
CSR_WRITE_4(sc, NGE_IER, 0);
} else {
error = ether_poll_deregister(ifp);
/* Enable interrupts. */
CSR_WRITE_4(sc, NGE_IER, 1);
}
Big polling(4) cleanup. o Axe poll in trap. o Axe IFF_POLLING flag from if_flags. o Rework revision 1.21 (Giant removal), in such a way that poll_mtx is not dropped during call to polling handler. This fixes problem with idle polling. o Make registration and deregistration from polling in a functional way, insted of next tick/interrupt. o Obsolete kern.polling.enable. Polling is turned on/off with ifconfig. Detailed kern_poll.c changes: - Remove polling handler flags, introduced in 1.21. The are not needed now. - Forget and do not check if_flags, if_capenable and if_drv_flags. - Call all registered polling handlers unconditionally. - Do not drop poll_mtx, when entering polling handlers. - In ether_poll() NET_LOCK_GIANT prior to locking poll_mtx. - In netisr_poll() axe the block, where polling code asks drivers to unregister. - In netisr_poll() and ether_poll() do polling always, if any handlers are present. - In ether_poll_[de]register() remove a lot of error hiding code. Assert that arguments are correct, instead. - In ether_poll_[de]register() use standard return values in case of error or success. - Introduce poll_switch() that is a sysctl handler for kern.polling.enable. poll_switch() goes through interface list and enabled/disables polling. A message that kern.polling.enable is deprecated is printed. Detailed driver changes: - On attach driver announces IFCAP_POLLING in if_capabilities, but not in if_capenable. - On detach driver calls ether_poll_deregister() if polling is enabled. - In polling handler driver obtains its lock and checks IFF_DRV_RUNNING flag. If there is no, then unlocks and returns. - In ioctl handler driver checks for IFCAP_POLLING flag requested to be set or cleared. Driver first calls ether_poll_[de]register(), then obtains driver lock and [dis/en]ables interrupts. - In interrupt handler driver checks IFCAP_POLLING flag in if_capenable. If present, then returns.This is important to protect from spurious interrupts. Reviewed by: ru, sam, jhb
2005-10-01 18:56:19 +00:00
}
#endif /* DEVICE_POLLING */
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if ((mask & IFCAP_TXCSUM) != 0 &&
(IFCAP_TXCSUM & ifp->if_capabilities) != 0) {
ifp->if_capenable ^= IFCAP_TXCSUM;
if ((IFCAP_TXCSUM & ifp->if_capenable) != 0)
ifp->if_hwassist |= NGE_CSUM_FEATURES;
else
ifp->if_hwassist &= ~NGE_CSUM_FEATURES;
}
if ((mask & IFCAP_RXCSUM) != 0 &&
(IFCAP_RXCSUM & ifp->if_capabilities) != 0)
ifp->if_capenable ^= IFCAP_RXCSUM;
if ((mask & IFCAP_WOL) != 0 &&
(ifp->if_capabilities & IFCAP_WOL) != 0) {
if ((mask & IFCAP_WOL_UCAST) != 0)
ifp->if_capenable ^= IFCAP_WOL_UCAST;
if ((mask & IFCAP_WOL_MCAST) != 0)
ifp->if_capenable ^= IFCAP_WOL_MCAST;
if ((mask & IFCAP_WOL_MAGIC) != 0)
ifp->if_capenable ^= IFCAP_WOL_MAGIC;
}
if ((mask & IFCAP_VLAN_HWCSUM) != 0 &&
(ifp->if_capabilities & IFCAP_VLAN_HWCSUM) != 0)
ifp->if_capenable ^= IFCAP_VLAN_HWCSUM;
if ((mask & IFCAP_VLAN_HWTAGGING) != 0 &&
(ifp->if_capabilities & IFCAP_VLAN_HWTAGGING) != 0) {
ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) {
if ((ifp->if_capenable &
IFCAP_VLAN_HWTAGGING) != 0)
NGE_SETBIT(sc,
NGE_VLAN_IP_RXCTL,
NGE_VIPRXCTL_TAG_STRIP_ENB);
else
NGE_CLRBIT(sc,
NGE_VLAN_IP_RXCTL,
NGE_VIPRXCTL_TAG_STRIP_ENB);
}
}
/*
* Both VLAN hardware tagging and checksum offload is
* required to do checksum offload on VLAN interface.
*/
if ((ifp->if_capenable & IFCAP_TXCSUM) == 0)
ifp->if_capenable &= ~IFCAP_VLAN_HWCSUM;
if ((ifp->if_capenable & IFCAP_VLAN_HWTAGGING) == 0)
ifp->if_capenable &= ~IFCAP_VLAN_HWCSUM;
NGE_UNLOCK(sc);
VLAN_CAPABILITIES(ifp);
Implemented per-interface polling(4) control.
2004-04-11 19:25:56 +00:00
break;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
default:
network interface driver changes: o don't strip the Ethernet header from inbound packets; pass packets up the stack intact (required significant changes to some drivers) o reference common definitions in net/ethernet.h (e.g. ETHER_ALIGN) o track ether_ifattach/ether_ifdetach API changes o track bpf changes (use BPF_TAP and BPF_MTAP) o track vlan changes (ifnet capabilities, revised processing scheme, etc.) o use if_input to pass packets "up" o call ether_ioctl for default handling of ioctls Reviewed by: many Approved by: re
2002-11-14 23:54:55 +00:00
error = ether_ioctl(ifp, command, data);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
break;
}
style(9) - space after keyword.
2009-05-18 06:19:17 +00:00
return (error);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static void
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
nge_watchdog(struct nge_softc *sc)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
struct ifnet *ifp;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
NGE_LOCK_ASSERT(sc);
if (sc->nge_watchdog_timer == 0 || --sc->nge_watchdog_timer)
return;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
ifp = sc->nge_ifp;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
ifp->if_oerrors++;
- Consistently use if_printf() only in interface methods: if_start(), if_watchdog, etc., or in functions used only in these methods. In all other functions in the driver use device_printf(). - Use __func__ instead of typing function name. Submitted by: Alex Lyashkov <umka sevcity.net>
2006-09-15 15:16:12 +00:00
if_printf(ifp, "watchdog timeout\n");
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
Propagate rename of IFF_OACTIVE and IFF_RUNNING to IFF_DRV_OACTIVE and IFF_DRV_RUNNING, as well as the move from ifnet.if_flags to ifnet.if_drv_flags. Device drivers are now responsible for synchronizing access to these flags, as they are in if_drv_flags. This helps prevent races between the network stack and device driver in maintaining the interface flags field. Many __FreeBSD__ and __FreeBSD_version checks maintained and continued; some less so. Reviewed by: pjd, bz MFC after: 7 days
2005-08-09 10:20:02 +00:00
ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
nge_init_locked(sc);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
nge_start_locked(ifp);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
}
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
static int
nge_stop_mac(struct nge_softc *sc)
{
uint32_t reg;
int i;
NGE_LOCK_ASSERT(sc);
reg = CSR_READ_4(sc, NGE_CSR);
if ((reg & (NGE_CSR_TX_ENABLE | NGE_CSR_RX_ENABLE)) != 0) {
reg &= ~(NGE_CSR_TX_ENABLE | NGE_CSR_RX_ENABLE);
reg |= NGE_CSR_TX_DISABLE | NGE_CSR_RX_DISABLE;
CSR_WRITE_4(sc, NGE_CSR, reg);
for (i = 0; i < NGE_TIMEOUT; i++) {
DELAY(1);
if ((CSR_READ_4(sc, NGE_CSR) &
(NGE_CSR_RX_ENABLE | NGE_CSR_TX_ENABLE)) == 0)
break;
}
if (i == NGE_TIMEOUT)
return (ETIMEDOUT);
}
return (0);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
/*
* Stop the adapter and free any mbufs allocated to the
* RX and TX lists.
*/
Cleanup after my de-__P (remove leading whitespace before prototype args). Add newlines after function return types in function declarations. Approved by: wpaul (a long time ago)
2002-07-06 15:59:57 +00:00
static void
Use ANSI C declarations for all functions.
2009-05-18 06:02:54 +00:00
nge_stop(struct nge_softc *sc)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
struct nge_txdesc *txd;
struct nge_rxdesc *rxd;
style(9)
2009-05-18 07:04:03 +00:00
int i;
struct ifnet *ifp;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
NGE_LOCK_ASSERT(sc);
Stop embedding struct ifnet at the top of driver softcs. Instead the struct ifnet or the layer 2 common structure it was embedded in have been replaced with a struct ifnet pointer to be filled by a call to the new function, if_alloc(). The layer 2 common structure is also allocated via if_alloc() based on the interface type. It is hung off the new struct ifnet member, if_l2com. This change removes the size of these structures from the kernel ABI and will allow us to better manage them as interfaces come and go. Other changes of note: - Struct arpcom is no longer referenced in normal interface code. Instead the Ethernet address is accessed via the IFP2ENADDR() macro. To enforce this ac_enaddr has been renamed to _ac_enaddr. - The second argument to ether_ifattach is now always the mac address from driver private storage rather than sometimes being ac_enaddr. Reviewed by: sobomax, sam
2005-06-10 16:49:24 +00:00
ifp = sc->nge_ifp;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
sc->nge_flags &= ~NGE_FLAG_LINK;
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
callout_stop(&sc->nge_stat_ch);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
sc->nge_watchdog_timer = 0;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
CSR_WRITE_4(sc, NGE_IER, 0);
CSR_WRITE_4(sc, NGE_IMR, 0);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
if (nge_stop_mac(sc) == ETIMEDOUT)
device_printf(sc->nge_dev,
"%s: unable to stop Tx/Rx MAC\n", __func__);
CSR_WRITE_4(sc, NGE_TX_LISTPTR_HI, 0);
CSR_WRITE_4(sc, NGE_TX_LISTPTR_LO, 0);
CSR_WRITE_4(sc, NGE_RX_LISTPTR_HI, 0);
CSR_WRITE_4(sc, NGE_RX_LISTPTR_LO, 0);
nge_stats_update(sc);
if (sc->nge_head != NULL) {
m_freem(sc->nge_head);
sc->nge_head = sc->nge_tail = NULL;
}
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
/*
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
* Free RX and TX mbufs still in the queues.
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
*/
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
for (i = 0; i < NGE_RX_RING_CNT; i++) {
rxd = &sc->nge_cdata.nge_rxdesc[i];
if (rxd->rx_m != NULL) {
bus_dmamap_sync(sc->nge_cdata.nge_rx_tag,
rxd->rx_dmamap, BUS_DMASYNC_POSTREAD);
bus_dmamap_unload(sc->nge_cdata.nge_rx_tag,
rxd->rx_dmamap);
m_freem(rxd->rx_m);
rxd->rx_m = NULL;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
for (i = 0; i < NGE_TX_RING_CNT; i++) {
txd = &sc->nge_cdata.nge_txdesc[i];
if (txd->tx_m != NULL) {
bus_dmamap_sync(sc->nge_cdata.nge_tx_tag,
txd->tx_dmamap, BUS_DMASYNC_POSTWRITE);
bus_dmamap_unload(sc->nge_cdata.nge_tx_tag,
txd->tx_dmamap);
m_freem(txd->tx_m);
txd->tx_m = NULL;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
}
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
/*
* Before setting WOL bits, caller should have stopped Receiver.
*/
static void
nge_wol(struct nge_softc *sc)
{
struct ifnet *ifp;
uint32_t reg;
uint16_t pmstat;
int pmc;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
NGE_LOCK_ASSERT(sc);
Do a sweep of the tree replacing calls to pci_find_extcap() with calls to pci_find_cap() instead.
2011-03-23 13:10:15 +00:00
if (pci_find_cap(sc->nge_dev, PCIY_PMG, &pmc) != 0)
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
return;
ifp = sc->nge_ifp;
if ((ifp->if_capenable & IFCAP_WOL) == 0) {
/* Disable WOL & disconnect CLKRUN to save power. */
CSR_WRITE_4(sc, NGE_WOLCSR, 0);
CSR_WRITE_4(sc, NGE_CLKRUN, 0);
} else {
if (nge_stop_mac(sc) == ETIMEDOUT)
device_printf(sc->nge_dev,
"%s: unable to stop Tx/Rx MAC\n", __func__);
/*
* Make sure wake frames will be buffered in the Rx FIFO.
* (i.e. Silent Rx mode.)
*/
CSR_WRITE_4(sc, NGE_RX_LISTPTR_HI, 0);
- Import the common MII bitbang'ing code from NetBSD and convert drivers to take advantage of it instead of duplicating it. This reduces the size of the i386 GENERIC kernel by about 4k. The only potential in-tree user left unconverted is xe(4), which generally should be changed to use miibus(4) instead of implementing PHY handling on its own, as otherwise it makes not much sense to add a dependency on miibus(4)/mii_bitbang(4) to xe(4) just for the MII bitbang'ing code. The common MII bitbang'ing code also is useful in the embedded space for using GPIO pins to implement MII access. - Based on lessons learnt with dc(4) (see r185750), add bus barriers to the MII bitbang read and write functions of the other drivers converted in order to ensure the intended ordering. Given that register access via an index register as well as register bank/window switching is subject to the same problem, also add bus barriers to the respective functions of smc(4), tl(4) and xl(4). - Sprinkle some const. Thanks to the following testers: Andrew Bliznak (nge(4)), nwhitehorn@ (bm(4)), yongari@ (sis(4) and ste(4)) Thanks to Hans-Joerg Sirtl for supplying hardware to test stge(4). Reviewed by: yongari (subset of drivers) Obtained from: NetBSD (partially)
2011-11-01 16:13:59 +00:00
CSR_BARRIER_4(sc, NGE_RX_LISTPTR_HI, BUS_SPACE_BARRIER_WRITE);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
CSR_WRITE_4(sc, NGE_RX_LISTPTR_LO, 0);
- Import the common MII bitbang'ing code from NetBSD and convert drivers to take advantage of it instead of duplicating it. This reduces the size of the i386 GENERIC kernel by about 4k. The only potential in-tree user left unconverted is xe(4), which generally should be changed to use miibus(4) instead of implementing PHY handling on its own, as otherwise it makes not much sense to add a dependency on miibus(4)/mii_bitbang(4) to xe(4) just for the MII bitbang'ing code. The common MII bitbang'ing code also is useful in the embedded space for using GPIO pins to implement MII access. - Based on lessons learnt with dc(4) (see r185750), add bus barriers to the MII bitbang read and write functions of the other drivers converted in order to ensure the intended ordering. Given that register access via an index register as well as register bank/window switching is subject to the same problem, also add bus barriers to the respective functions of smc(4), tl(4) and xl(4). - Sprinkle some const. Thanks to the following testers: Andrew Bliznak (nge(4)), nwhitehorn@ (bm(4)), yongari@ (sis(4) and ste(4)) Thanks to Hans-Joerg Sirtl for supplying hardware to test stge(4). Reviewed by: yongari (subset of drivers) Obtained from: NetBSD (partially)
2011-11-01 16:13:59 +00:00
CSR_BARRIER_4(sc, NGE_RX_LISTPTR_LO, BUS_SPACE_BARRIER_WRITE);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
/* Enable Rx again. */
NGE_SETBIT(sc, NGE_CSR, NGE_CSR_RX_ENABLE);
- Import the common MII bitbang'ing code from NetBSD and convert drivers to take advantage of it instead of duplicating it. This reduces the size of the i386 GENERIC kernel by about 4k. The only potential in-tree user left unconverted is xe(4), which generally should be changed to use miibus(4) instead of implementing PHY handling on its own, as otherwise it makes not much sense to add a dependency on miibus(4)/mii_bitbang(4) to xe(4) just for the MII bitbang'ing code. The common MII bitbang'ing code also is useful in the embedded space for using GPIO pins to implement MII access. - Based on lessons learnt with dc(4) (see r185750), add bus barriers to the MII bitbang read and write functions of the other drivers converted in order to ensure the intended ordering. Given that register access via an index register as well as register bank/window switching is subject to the same problem, also add bus barriers to the respective functions of smc(4), tl(4) and xl(4). - Sprinkle some const. Thanks to the following testers: Andrew Bliznak (nge(4)), nwhitehorn@ (bm(4)), yongari@ (sis(4) and ste(4)) Thanks to Hans-Joerg Sirtl for supplying hardware to test stge(4). Reviewed by: yongari (subset of drivers) Obtained from: NetBSD (partially)
2011-11-01 16:13:59 +00:00
CSR_BARRIER_4(sc, NGE_CSR, BUS_SPACE_BARRIER_WRITE);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
/* Configure WOL events. */
reg = 0;
if ((ifp->if_capenable & IFCAP_WOL_UCAST) != 0)
reg |= NGE_WOLCSR_WAKE_ON_UNICAST;
if ((ifp->if_capenable & IFCAP_WOL_MCAST) != 0)
reg |= NGE_WOLCSR_WAKE_ON_MULTICAST;
if ((ifp->if_capenable & IFCAP_WOL_MAGIC) != 0)
reg |= NGE_WOLCSR_WAKE_ON_MAGICPKT;
CSR_WRITE_4(sc, NGE_WOLCSR, reg);
/* Activate CLKRUN. */
reg = CSR_READ_4(sc, NGE_CLKRUN);
reg |= NGE_CLKRUN_PMEENB | NGE_CLNRUN_CLKRUN_ENB;
CSR_WRITE_4(sc, NGE_CLKRUN, reg);
}
/* Request PME. */
pmstat = pci_read_config(sc->nge_dev, pmc + PCIR_POWER_STATUS, 2);
pmstat &= ~(PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE);
if ((ifp->if_capenable & IFCAP_WOL) != 0)
pmstat |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
pci_write_config(sc->nge_dev, pmc + PCIR_POWER_STATUS, pmstat, 2);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
/*
* Stop all chip I/O so that the kernel's probe routines don't
* get confused by errant DMAs when rebooting.
*/
Fix function prototype for device_shutdown method.
2007-11-22 02:45:00 +00:00
static int
Use ANSI C declarations for all functions.
2009-05-18 06:02:54 +00:00
nge_shutdown(device_t dev)
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
{
return (nge_suspend(dev));
}
static int
nge_suspend(device_t dev)
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
{
style(9)
2009-05-18 07:04:03 +00:00
struct nge_softc *sc;
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
sc = device_get_softc(dev);
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
NGE_LOCK(sc);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
nge_stop(sc);
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
nge_wol(sc);
sc->nge_flags |= NGE_FLAG_SUSPENDED;
Make two major changes to this code to address some stability/corruption problems: 1) Add locking for SMP, code provided by Alan Cox 2) While testing Alan's patches, I observed serious problems with the jumbo buffer allocation code (machine crashed twice), so I gutted it and rewrote the receive handler to use multiple chained descriptors. Each RX descriptor gets a single 2K cluster, and the chip will fill in as many as it needs to hold the complete packet. User reports that this corrects the data corruption issues previously observed and discussed on -current. Note that this driver still needs to be hit with the busdma stick. I intend to inflict said beating in the near future. MFC after: 1 week
2004-09-14 22:06:25 +00:00
NGE_UNLOCK(sc);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
Fix function prototype for device_shutdown method.
2007-11-22 02:45:00 +00:00
return (0);
Add support for gigabit ethernet cards based on the NatSemi DP83820 and DP83821 gigabit ethernet MAC chips and the NatSemi DP83861 10/100/1000 copper PHY. There are a whole bunch of very low cost cards available with this chipset selling for $150USD or less. This includes the SMC9462TX, D-Link DGE-500T, Asante GigaNIX 1000TA and 1000TPC, and a couple cards from Addtron. This chip supports TCP/IP checksum offload, VLAN tagging/insertion. 2048-bit multicast filter, jumbograms and has 8K TX and 32K RX FIFOs. I have not done serious performance testing with this driver. I know it works, and I want it under CVS control so I can keep tabs on it. Note that there's no serious mutex stuff in here yet either: I need to talk more with jhb to figure out the right way to do this. That said, I don't think there will be any problems. This driver should also work on the alpha. It's not turned on in GENERIC.
2001-05-11 19:56:39 +00:00
}
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
static int
nge_resume(device_t dev)
{
struct nge_softc *sc;
struct ifnet *ifp;
uint16_t pmstat;
int pmc;
sc = device_get_softc(dev);
NGE_LOCK(sc);
ifp = sc->nge_ifp;
Do a sweep of the tree replacing calls to pci_find_extcap() with calls to pci_find_cap() instead.
2011-03-23 13:10:15 +00:00
if (pci_find_cap(sc->nge_dev, PCIY_PMG, &pmc) == 0) {
bus_dma(9) conversion and make nge(4) work on all architectures. o Header file cleanup. o bus_dma(9) conversion. - Removed all consumers of vtophys(9) and converted to use bus_dma(9). - 64bit DMA support was disabled because DP83821 is not capable of handling the DMA request. 64bit DMA request on DP83820 requires different descriptor structures and it's hard to dynamically change descriptor format at run time so I disabled it. Note, this is the same behavior as previous one but previously nge(4) didn't explicitly disable 64bit mode on DP83820. - Added Tx/Rx descriptor ring alignment requirements(8 bytes alignment). - Limit maximum number of Tx DMA segments to 16. In fact, controller does not seem to have limitations on number of Tx DMA segments but 16 should be enough for most cases and m_collapse(9) will handle highly fragmented frames without consuming a lot of CPU cycles. - Added Rx buffer alignment requirements(8 bytes alignment). This means driver should fixup received frames to align on 16bits boundary on strict-alignment architectures. - Nuked driver private data structure in descriptor ring. - Added endianness support code in Tx/Rx descriptor access. o Prefer faster memory mapped register access to I/O mapped access. Added fall-back mechanism to use alternative register access. The hardware supports both memory and I/O mapped access. o Added suspend/resume methods but it wasn't tested as controller I have does not support PCI PME. o Removed swap argument in nge_read_eeprom() since endianness should be handled after reading EEPROM. o Implemented experimental 802.3x full-duplex flow-control. ATM it was commented out but will be activated after we have generic flow-control framework in mii(4) layer. o Rearranged promiscuous mode settings and simplified logic. o Always disable Rx filter prior to changing Rx filter functions as indicated in DP83820/DP83821 datasheet. o Added an explicit DELAY in timeout loop of nge_reset(). o Added a sysctl variable dev.nge.%d.int_holdoff to control interrupt moderation. Valid ranges are 1 to 255(default 1) in units of 100us. The actual delivery of interrupt would be delayed based on the sysctl value. The interface has to be brought down and up again before a change takes effect. With proper tuning value, users do not need to resort to polling(4) anymore. o Added ALTQ(4) support. o Added missing IFCAP_VLAN_HWCSUM as nge(4) can offload Tx/Rx checksum calculation on VLAN tagged frames as well as VLAN tag insertion/stripping. Also add IFCAP_VLAN_MTU capability as nge(4) can handle VLAN tagged oversized frames. o Fixed media header length for VLAN. o Rearranged nge_detach routine such that it's now used for general clean-up routine. o Enabled MWI. o Accessing EEPROM takes very long time so read 6 bytes ethernet address with one call instead of 3 separate accesses. o Don't set if_mtu in device attach, it's already set in ether_ifattach(). o Don't do any special things for TBI interface. Remove TBI specific media handling in the driver and have gentbi(4) handle it. Add glue code to read/write TBI PHY registers in miibus method. This change removes a lot of PHY handling code in driver and now its functionality is handled by mii(4). o Alignment fixup code is now applied only for strict-alignment architectures. Previously the code was applied for all architectures except i386. With this change amd64 will get instant Rx performance boost. o When driver fails to allocate a new mbuf, update if_qdrops so users can see what was wrong in Rx path. o Added a workaround for a hardware bug which resulted in short VLAN tagged frames(e.g. ARP) was rejected as if runt frame was received. With this workaround nge(4) now accepts the short VLAN tagged frame and nge(4) can take full advantage of hardware VLAN tag stripping. I have no idea how this bug wasn't known so far, without the workaround nge(4) may never work on VLAN environments. o Fixed Rx checksum offload logic such that it now honors active interface capability configured with ifconfig(8). o In nge_start()/nge_txencap(), always leave at least one free descriptor as indicated in datasheet. Without this the hardware would be confused with ring descriptor structure(e.g. no clue for the end of descriptor ring). o Removed dead-code that checks interrupts on PHY hardware. The code was designed to detect link state changes but it was disabled as driving nge_tick clock would break auto-negotiation timer. This code is no longer needed as nge(4) now uses mii(4) and link state change handling is done with mii callback. o Rearranged ethernet address programming logic such that it works on strict-alignment architectures. o Added IFCAP_VLAN_HWTAGGING/IFCAP_VLAN_HWCSUM handler in nge_ioctl() such that the functionality is configurable with ifconfig(8). DP83820/DP83821 can do checksum offload for VLAN tagged frames so enable Tx/Rx checksum offload for VLAN interfaces. o Simplified IFCAP_POLLING selection logic in nge_ioctl(). o Fixed module unload panic when bpf listeners are active. o Tx/Rx descriptor ring address uses 64bit DMA address for readability. High address part of DMA would be 0 as nge(4) disabled 64bit DMA transfers so it's ok for DP83821. o Removed volatile keyword in softc as bus_dmamap_sync(9) should take care of this. o Removed extra driver private structures in descriptor ring. These extra elements are not part of descriptor structure. Embedding private driver structure into descriptor ring is not good idea as its size may be different on 32bit/64bit architectures. o Added miibus_linkchg method handler to catch link state changes. o Removed unneeded nge_ifmedia in softc. All TBI access is handled in gentbi(4). There is no difference between TBI and non-TBI case now. o Removed "gigabit link up" message handling in nge_tick. Link state change notification is already performed by mii(4) and checking link state by accessing PHY registers in periodic timer handler of driver is wrong. All link state and speed/duplex monitoring should be handled in PHY driver. o Use our own timer for watchdog instead of if_watchdog/if_timer interface. o Added hardware MAC statistics counter, users canget current MAC statistics from dev.nge.%d.stats sysctl node(%d is unit number of a device). o Removed unused macros, NGE_LASTDESC, NGE_MODE, NGE_OWNDESC, NGE_RXBYTES. o Increased number of Tx/Rx descriptors from 128 to 256. From my experience on gigabit ethernet controllers, number of descriptors should be 256 or higher to get an optimal performance on gigabit link. o Increased jumbo frame length to 9022 bytes to cope with other gigabit ethernet drivers. Experimentation shows no problems with 9022 bytes. o Removed unused member variables in softc. o Switched from bus_space_{read|write}_4 to bus_{read|write}_4. o Added support for WOL.
2009-05-21 02:12:10 +00:00
/* Disable PME and clear PME status. */
pmstat = pci_read_config(sc->nge_dev,
pmc + PCIR_POWER_STATUS, 2);
if ((pmstat & PCIM_PSTAT_PMEENABLE) != 0) {
pmstat &= ~PCIM_PSTAT_PMEENABLE;
pci_write_config(sc->nge_dev,
pmc + PCIR_POWER_STATUS, pmstat, 2);
}
}
if (ifp->if_flags & IFF_UP) {
ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
nge_init_locked(sc);
}
sc->nge_flags &= ~NGE_FLAG_SUSPENDED;
NGE_UNLOCK(sc);
return (0);
}
#define NGE_SYSCTL_STAT_ADD32(c, h, n, p, d) \
SYSCTL_ADD_UINT(c, h, OID_AUTO, n, CTLFLAG_RD, p, 0, d)
static void
nge_sysctl_node(struct nge_softc *sc)
{
struct sysctl_ctx_list *ctx;
struct sysctl_oid_list *child, *parent;
struct sysctl_oid *tree;
struct nge_stats *stats;
int error;
ctx = device_get_sysctl_ctx(sc->nge_dev);
child = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->nge_dev));
SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "int_holdoff",
CTLTYPE_INT | CTLFLAG_RW, &sc->nge_int_holdoff, 0,
sysctl_hw_nge_int_holdoff, "I", "NGE interrupt moderation");
/* Pull in device tunables. */
sc->nge_int_holdoff = NGE_INT_HOLDOFF_DEFAULT;
error = resource_int_value(device_get_name(sc->nge_dev),
device_get_unit(sc->nge_dev), "int_holdoff", &sc->nge_int_holdoff);
if (error == 0) {
if (sc->nge_int_holdoff < NGE_INT_HOLDOFF_MIN ||
sc->nge_int_holdoff > NGE_INT_HOLDOFF_MAX ) {
device_printf(sc->nge_dev,
"int_holdoff value out of range; "
"using default: %d(%d us)\n",
NGE_INT_HOLDOFF_DEFAULT,
NGE_INT_HOLDOFF_DEFAULT * 100);
sc->nge_int_holdoff = NGE_INT_HOLDOFF_DEFAULT;
}
}
stats = &sc->nge_stats;
tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "stats", CTLFLAG_RD,
NULL, "NGE statistics");
parent = SYSCTL_CHILDREN(tree);
/* Rx statistics. */
tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "rx", CTLFLAG_RD,
NULL, "Rx MAC statistics");
child = SYSCTL_CHILDREN(tree);
NGE_SYSCTL_STAT_ADD32(ctx, child, "pkts_errs",
&stats->rx_pkts_errs,
"Packet errors including both wire errors and FIFO overruns");
NGE_SYSCTL_STAT_ADD32(ctx, child, "crc_errs",
&stats->rx_crc_errs, "CRC errors");
NGE_SYSCTL_STAT_ADD32(ctx, child, "fifo_oflows",
&stats->rx_fifo_oflows, "FIFO overflows");
NGE_SYSCTL_STAT_ADD32(ctx, child, "align_errs",
&stats->rx_align_errs, "Frame alignment errors");
NGE_SYSCTL_STAT_ADD32(ctx, child, "sym_errs",
&stats->rx_sym_errs, "One or more symbol errors");
NGE_SYSCTL_STAT_ADD32(ctx, child, "pkts_jumbos",
&stats->rx_pkts_jumbos,
"Packets received with length greater than 1518 bytes");
NGE_SYSCTL_STAT_ADD32(ctx, child, "len_errs",
&stats->rx_len_errs, "In Range Length errors");
NGE_SYSCTL_STAT_ADD32(ctx, child, "unctl_frames",
&stats->rx_unctl_frames, "Control frames with unsupported opcode");
NGE_SYSCTL_STAT_ADD32(ctx, child, "pause",
&stats->rx_pause, "Pause frames");
/* Tx statistics. */
tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "tx", CTLFLAG_RD,
NULL, "Tx MAC statistics");
child = SYSCTL_CHILDREN(tree);
NGE_SYSCTL_STAT_ADD32(ctx, child, "pause",
&stats->tx_pause, "Pause frames");
NGE_SYSCTL_STAT_ADD32(ctx, child, "seq_errs",
&stats->tx_seq_errs,
"Loss of collision heartbeat during transmission");
}
#undef NGE_SYSCTL_STAT_ADD32
static int
sysctl_int_range(SYSCTL_HANDLER_ARGS, int low, int high)
{
int error, value;
if (arg1 == NULL)
return (EINVAL);
value = *(int *)arg1;
error = sysctl_handle_int(oidp, &value, 0, req);
if (error != 0 || req->newptr == NULL)
return (error);
if (value < low || value > high)
return (EINVAL);
*(int *)arg1 = value;
return (0);
}
static int
sysctl_hw_nge_int_holdoff(SYSCTL_HANDLER_ARGS)
{
return (sysctl_int_range(oidp, arg1, arg2, req, NGE_INT_HOLDOFF_MIN,
NGE_INT_HOLDOFF_MAX));
}
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