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freebsd-dev/sys/mips/conf/CARAMBOLA2.hints

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Add 8devices CARAMBOLA2 support. This is based on the AR933x (Hornet) SoC from Qualcomm Atheros. It's a much nicer board to do development on - 64MB RAM, 16MB flash. The development board breaks out the GPIO pins, ethernet, serial (via a USB<->RS232 chip), USB host and of course a small wifi antenna. Everything but the wifi works thus far.
2013-06-08 20:21:17 +00:00
#
# This file adds to the values in AR91XX_BASE.hints.
#
# $FreeBSD$
# mdiobus on arge1
hint.argemdio.0.at="nexus0"
hint.argemdio.0.maddr=0x1a000000
hint.argemdio.0.msize=0x1000
hint.argemdio.0.order=0
# Embedded Atheros Switch
hint.arswitch.0.at="mdio0"
# XXX this should really say it's an AR933x switch, as there
# are some vlan specific differences here!
hint.arswitch.0.is_7240=1
hint.arswitch.0.numphys=4
hint.arswitch.0.phy4cpu=1 # phy 4 is a "CPU" separate PHY
hint.arswitch.0.is_rgmii=0
hint.arswitch.0.is_gmii=1 # arge1 <-> switch PHY is GMII
# arge0 - MII, autoneg, phy(4)
hint.arge.0.phymask=0x10 # PHY4
hint.arge.0.mdio=mdioproxy1 # .. off of the switch mdiobus
Add the MAC address hints for arge0/arge1 on the CARAMBOLA2. Obtained from: Linux OpenWRT
2015-03-28 19:59:33 +00:00
hint.arge.0.eeprommac=0x1fff0000
Add 8devices CARAMBOLA2 support. This is based on the AR933x (Hornet) SoC from Qualcomm Atheros. It's a much nicer board to do development on - 64MB RAM, 16MB flash. The development board breaks out the GPIO pins, ethernet, serial (via a USB<->RS232 chip), USB host and of course a small wifi antenna. Everything but the wifi works thus far.
2013-06-08 20:21:17 +00:00
# arge1 - GMII, 1000/full
hint.arge.1.phymask=0x0 # No directly mapped PHYs
hint.arge.1.media=1000
hint.arge.1.fduplex=1
Add the MAC address hints for arge0/arge1 on the CARAMBOLA2. Obtained from: Linux OpenWRT
2015-03-28 19:59:33 +00:00
hint.arge.1.eeprommac=0x1fff0006
Add 8devices CARAMBOLA2 support. This is based on the AR933x (Hornet) SoC from Qualcomm Atheros. It's a much nicer board to do development on - 64MB RAM, 16MB flash. The development board breaks out the GPIO pins, ethernet, serial (via a USB<->RS232 chip), USB host and of course a small wifi antenna. Everything but the wifi works thus far.
2013-06-08 20:21:17 +00:00
Add the EEPROM start offset and size in so ath_ahb will use the supplied EEPROM data. This needs to die in a fire and replaced with the firmware API to store the calibration data early ..
2013-06-26 05:03:47 +00:00
# Where the ART is - last 64k in the flash
# 0x9fff1000 ?
hint.ath.0.eepromaddr=0x1fff0000
hint.ath.0.eepromsize=16384
Add 8devices CARAMBOLA2 support. This is based on the AR933x (Hornet) SoC from Qualcomm Atheros. It's a much nicer board to do development on - 64MB RAM, 16MB flash. The development board breaks out the GPIO pins, ethernet, serial (via a USB<->RS232 chip), USB host and of course a small wifi antenna. Everything but the wifi works thus far.
2013-06-08 20:21:17 +00:00
# The AP121 16MB flash layout:
#
# [ 0.700000] 0x000000000000-0x000000040000 : "u-boot"
# [ 0.710000] 0x000000040000-0x000000050000 : "u-boot-env"
# [ 0.710000] 0x000000050000-0x000000250000 : "kernel"
# [ 0.720000] 0x000000250000-0x000000fe0000 : "rootfs"
# [ 0.720000] mtd: partition "rootfs" set to be root filesystem
# [ 0.730000] mtd: partition "rootfs_data" created automatically, ofs=480000, len=B60000
# [ 0.740000] 0x000000480000-0x000000fe0000 : "rootfs_data"
# [ 0.740000] 0x000000fe0000-0x000000ff0000 : "nvram"
# [ 0.750000] 0x000000ff0000-0x000001000000 : "art"
# [ 0.750000] 0x000000050000-0x000000fe0000 : "firmware"
hint.map.0.at="flash/spi0"
hint.map.0.start=0x00000000
hint.map.0.end=0x000040000
hint.map.0.name="uboot"
hint.map.0.readonly=1
hint.map.1.at="flash/spi0"
hint.map.1.start=0x00040000
hint.map.1.end=0x00050000
hint.map.1.name="uboot-env"
hint.map.1.readonly=0
hint.map.2.at="flash/spi0"
hint.map.2.start=0x00050000
Migrate these configs to use the geom map search function. Now that the search function reliably works, this allows for smaller images.
2015-03-21 06:18:25 +00:00
hint.map.2.end="search:0x00050000:0x10000:.!/bin/sh"
Add 8devices CARAMBOLA2 support. This is based on the AR933x (Hornet) SoC from Qualcomm Atheros. It's a much nicer board to do development on - 64MB RAM, 16MB flash. The development board breaks out the GPIO pins, ethernet, serial (via a USB<->RS232 chip), USB host and of course a small wifi antenna. Everything but the wifi works thus far.
2013-06-08 20:21:17 +00:00
hint.map.2.name="kernel"
hint.map.2.readonly=0
hint.map.3.at="flash/spi0"
Migrate these configs to use the geom map search function. Now that the search function reliably works, this allows for smaller images.
2015-03-21 06:18:25 +00:00
hint.map.3.start="search:0x00050000:0x10000:.!/bin/sh"
Add 8devices CARAMBOLA2 support. This is based on the AR933x (Hornet) SoC from Qualcomm Atheros. It's a much nicer board to do development on - 64MB RAM, 16MB flash. The development board breaks out the GPIO pins, ethernet, serial (via a USB<->RS232 chip), USB host and of course a small wifi antenna. Everything but the wifi works thus far.
2013-06-08 20:21:17 +00:00
hint.map.3.end=0x00fe0000
hint.map.3.name="rootfs"
hint.map.3.readonly=0
hint.map.4.at="flash/spi0"
hint.map.4.start=0x00fe0000
hint.map.4.end=0x00ff0000
hint.map.4.name="cfg"
hint.map.4.readonly=0
# This is radio calibration section. It is (or should be!) unique
# for each board, to take into account thermal and electrical differences
# as well as the regulatory compliance data.
#
hint.map.5.at="flash/spi0"
hint.map.5.start=0x00ff0000
hint.map.5.end=0x01000000
hint.map.5.name="art"
hint.map.5.readonly=1
# GPIO specific configuration block
# Don't flip on anything that isn't already enabled.
# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
# not used here.
hint.gpio.0.function_set=0x00000000
hint.gpio.0.function_clear=0x00000000
# These are the GPIO LEDs and buttons which can be software controlled.
Start enabling the available GPIO pins on the Carambola 2. The carambola2 exposes all the gpio pins, but some are reserved for core functions (eg usb, ethernet, etc.) Others are configured by default to be available as normal GPIO pins to do interesting things with. GPIO 18->23 is the I2S, SLIC and SPDIF device pins, but none of those are currently used. So, just allow those to show up. Tested: * AR9344, Carambola 2 * (.. bitbang SPI to an Adafruit LCD via libgpio, because FreeBSD could do with more shiny output devices that aren't network interfaces.) TODO: There are some other pins aren't currently included here, but should be. The LED pins are for the internal switch inside the AR9344. * GPIO 0+1 are "LED0 + LED1", but they're tied to high for bootstrapping. * GPIO 13-17 are "LED2..7", but they're tied (H, L, L, L, H) for bootstrapping. * GPIO 11 and 12 are UART RTS/CTS or I2S; but GPIO 12 is tied L for bootstrap.
2015-04-12 00:02:32 +00:00
hint.gpio.0.pinmask=0x00fc1803
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