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freebsd-dev/sys/dev/pci/isa_pci.c

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Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
/*-
* Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier
* Copyright (c) 2000 Michael Smith <msmith@freebsd.org>
* Copyright (c) 2000 BSDi
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
/*
* PCI:ISA bridge support
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
Save and restore the interrupt Edge/Level Control Registers (ELCR) across system suspends on the Intel 82371AB PCI-ISA bridge. On a Sony Vaio C1XD that I have, these registers are not set correctly after an ACPI resume. The result is that after resuming, a shared IRQ is left in edge-triggered mode so the interrupt can later become jammed in a state where the line remains asserted, but the handler is never called. Reviewed by: jhb
2002-10-30 19:55:06 +00:00
#include <machine/bus.h>
#include <machine/resource.h>
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
#include <sys/bus.h>
Save and restore the interrupt Edge/Level Control Registers (ELCR) across system suspends on the Intel 82371AB PCI-ISA bridge. On a Sony Vaio C1XD that I have, these registers are not set correctly after an ACPI resume. The result is that after resuming, a shared IRQ is left in edge-triggered mode so the interrupt can later become jammed in a state where the line remains asserted, but the handler is never called. Reviewed by: jhb
2002-10-30 19:55:06 +00:00
#include <sys/rman.h>
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
#include <pci/pcivar.h>
#include <pci/pcireg.h>
Save and restore the interrupt Edge/Level Control Registers (ELCR) across system suspends on the Intel 82371AB PCI-ISA bridge. On a Sony Vaio C1XD that I have, these registers are not set correctly after an ACPI resume. The result is that after resuming, a shared IRQ is left in edge-triggered mode so the interrupt can later become jammed in a state where the line remains asserted, but the handler is never called. Reviewed by: jhb
2002-10-30 19:55:06 +00:00
#define ELCR_IOADDR 0x4d0 /* Interrupt Edge/Level Control Registers */
#define ELCR_IOLEN 2
struct isab_softc {
struct resource *elcr_res;
u_char saved_elcr[ELCR_IOLEN];
};
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
static int isab_probe(device_t dev);
static int isab_attach(device_t dev);
Save and restore the interrupt Edge/Level Control Registers (ELCR) across system suspends on the Intel 82371AB PCI-ISA bridge. On a Sony Vaio C1XD that I have, these registers are not set correctly after an ACPI resume. The result is that after resuming, a shared IRQ is left in edge-triggered mode so the interrupt can later become jammed in a state where the line remains asserted, but the handler is never called. Reviewed by: jhb
2002-10-30 19:55:06 +00:00
static int isab_detach(device_t dev);
static int isab_resume(device_t dev);
static int isab_suspend(device_t dev);
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
static device_method_t isab_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, isab_probe),
DEVMETHOD(device_attach, isab_attach),
Save and restore the interrupt Edge/Level Control Registers (ELCR) across system suspends on the Intel 82371AB PCI-ISA bridge. On a Sony Vaio C1XD that I have, these registers are not set correctly after an ACPI resume. The result is that after resuming, a shared IRQ is left in edge-triggered mode so the interrupt can later become jammed in a state where the line remains asserted, but the handler is never called. Reviewed by: jhb
2002-10-30 19:55:06 +00:00
DEVMETHOD(device_detach, isab_detach),
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
DEVMETHOD(device_shutdown, bus_generic_shutdown),
Save and restore the interrupt Edge/Level Control Registers (ELCR) across system suspends on the Intel 82371AB PCI-ISA bridge. On a Sony Vaio C1XD that I have, these registers are not set correctly after an ACPI resume. The result is that after resuming, a shared IRQ is left in edge-triggered mode so the interrupt can later become jammed in a state where the line remains asserted, but the handler is never called. Reviewed by: jhb
2002-10-30 19:55:06 +00:00
DEVMETHOD(device_suspend, isab_suspend),
DEVMETHOD(device_resume, isab_resume),
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
/* Bus interface */
DEVMETHOD(bus_print_child, bus_generic_print_child),
DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
DEVMETHOD(bus_release_resource, bus_generic_release_resource),
DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
{ 0, 0 }
};
static driver_t isab_driver = {
"isab",
isab_methods,
Save and restore the interrupt Edge/Level Control Registers (ELCR) across system suspends on the Intel 82371AB PCI-ISA bridge. On a Sony Vaio C1XD that I have, these registers are not set correctly after an ACPI resume. The result is that after resuming, a shared IRQ is left in edge-triggered mode so the interrupt can later become jammed in a state where the line remains asserted, but the handler is never called. Reviewed by: jhb
2002-10-30 19:55:06 +00:00
sizeof(struct isab_softc),
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
};
static devclass_t isab_devclass;
DRIVER_MODULE(isab, pci, isab_driver, isab_devclass, 0, 0);
/*
* XXX we need to add a quirk list here for bridges that don't correctly
* report themselves.
*/
static int
isab_probe(device_t dev)
{
int matched = 0;
/*
* Try for a generic match based on class/subclass.
*/
- Don't return early from the PCI:EISA bridge attachment, or we will lose the ISA bus. - Don't expect that a PCI:ISA bridge will have a correct class value; if we're checking PCI IDs, only depend on these. This should fix the loss of ISA on machines with PCI:EISA bridges like the AS4100.
2000-12-12 03:33:02 +00:00
if ((pci_get_class(dev) == PCIC_BRIDGE) &&
(pci_get_subclass(dev) == PCIS_BRIDGE_ISA)) {
matched = 1;
} else {
/*
* These are devices that we *know* are PCI:ISA bridges.
* Sometimes, however, they don't report themselves as
* such. Check in case one of them is pretending to be
* something else.
*/
switch (pci_get_devid(dev)) {
case 0x04848086: /* Intel 82378ZB/82378IB */
case 0x122e8086: /* Intel 82371FB */
case 0x70008086: /* Intel 82371SB */
case 0x71108086: /* Intel 82371AB */
Add support for the Intel 82443MX chipset PR: kern/33032 MFC after: 1 month
2001-12-21 01:28:59 +00:00
case 0x71988086: /* Intel 82443MX */
- Don't return early from the PCI:EISA bridge attachment, or we will lose the ISA bus. - Don't expect that a PCI:ISA bridge will have a correct class value; if we're checking PCI IDs, only depend on these. This should fix the loss of ISA on machines with PCI:EISA bridges like the AS4100.
2000-12-12 03:33:02 +00:00
case 0x24108086: /* Intel 82801AA (ICH) */
case 0x24208086: /* Intel 82801AB (ICH0) */
case 0x24408086: /* Intel 82801AB (ICH2) */
case 0x00061004: /* VLSI 82C593 */
case 0x05861106: /* VIA 82C586 */
case 0x05961106: /* VIA 82C596 */
case 0x06861106: /* VIA 82C686 */
case 0x153310b9: /* AcerLabs M1533 */
case 0x154310b9: /* AcerLabs M1543 */
case 0x00081039: /* SiS 85c503 */
case 0x00001078: /* Cyrix Cx5510 */
case 0x01001078: /* Cyrix Cx5530 */
case 0xc7001045: /* OPTi 82C700 (FireStar) */
case 0x00011033: /* NEC 0001 (C-bus) */
case 0x002c1033: /* NEC 002C (C-bus) */
case 0x003b1033: /* NEC 003B (C-bus) */
case 0x886a1060: /* UMC UM8886 ISA */
case 0x02001166: /* ServerWorks IB6566 PCI */
if (bootverbose)
printf("PCI-ISA bridge with incorrect subclass 0x%x\n",
pci_get_subclass(dev));
It looks like we can't count on these devices always having a consistent class/subclass, so give up trying to cull the list. Instead, complain in the bootverbose case, but otherwise just accept that we will have to carry this list of device IDs around.
2000-12-11 10:04:01 +00:00
matched = 1;
- Don't return early from the PCI:EISA bridge attachment, or we will lose the ISA bus. - Don't expect that a PCI:ISA bridge will have a correct class value; if we're checking PCI IDs, only depend on these. This should fix the loss of ISA on machines with PCI:EISA bridges like the AS4100.
2000-12-12 03:33:02 +00:00
break;
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
- Don't return early from the PCI:EISA bridge attachment, or we will lose the ISA bus. - Don't expect that a PCI:ISA bridge will have a correct class value; if we're checking PCI IDs, only depend on these. This should fix the loss of ISA on machines with PCI:EISA bridges like the AS4100.
2000-12-12 03:33:02 +00:00
default:
break;
It looks like we can't count on these devices always having a consistent class/subclass, so give up trying to cull the list. Instead, complain in the bootverbose case, but otherwise just accept that we will have to carry this list of device IDs around.
2000-12-11 10:04:01 +00:00
}
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
}
if (matched) {
device_set_desc(dev, "PCI-ISA bridge");
return(-10000);
}
return(ENXIO);
}
static int
isab_attach(device_t dev)
{
device_t child;
Save and restore the interrupt Edge/Level Control Registers (ELCR) across system suspends on the Intel 82371AB PCI-ISA bridge. On a Sony Vaio C1XD that I have, these registers are not set correctly after an ACPI resume. The result is that after resuming, a shared IRQ is left in edge-triggered mode so the interrupt can later become jammed in a state where the line remains asserted, but the handler is never called. Reviewed by: jhb
2002-10-30 19:55:06 +00:00
struct isab_softc *sc = device_get_softc(dev);
int error, rid;
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
/*
* Attach an ISA bus. Note that we can only have one ISA bus.
*/
child = device_add_child(dev, "isa", 0);
Save and restore the interrupt Edge/Level Control Registers (ELCR) across system suspends on the Intel 82371AB PCI-ISA bridge. On a Sony Vaio C1XD that I have, these registers are not set correctly after an ACPI resume. The result is that after resuming, a shared IRQ is left in edge-triggered mode so the interrupt can later become jammed in a state where the line remains asserted, but the handler is never called. Reviewed by: jhb
2002-10-30 19:55:06 +00:00
if (child != NULL) {
error = bus_generic_attach(dev);
if (error)
return (error);
}
switch (pci_get_devid(dev)) {
case 0x71108086: /* Intel 82371AB */
/*
* Sometimes the ELCR (Edge/Level Control Register) is not restored
* correctly on resume by the BIOS, so we handle it ourselves.
*/
rid = 0;
bus_set_resource(dev, SYS_RES_IOPORT, rid, ELCR_IOADDR, ELCR_IOLEN);
sc->elcr_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0, 1,
RF_ACTIVE);
if (sc->elcr_res == NULL)
device_printf(dev, "failed to allocate ELCR resource\n");
break;
}
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
return(0);
}
Save and restore the interrupt Edge/Level Control Registers (ELCR) across system suspends on the Intel 82371AB PCI-ISA bridge. On a Sony Vaio C1XD that I have, these registers are not set correctly after an ACPI resume. The result is that after resuming, a shared IRQ is left in edge-triggered mode so the interrupt can later become jammed in a state where the line remains asserted, but the handler is never called. Reviewed by: jhb
2002-10-30 19:55:06 +00:00
static int
isab_detach(device_t dev)
{
struct isab_softc *sc = device_get_softc(dev);
if (sc->elcr_res != NULL)
bus_release_resource(dev, SYS_RES_IOPORT, 0, sc->elcr_res);
return (bus_generic_detach(dev));
}
static int
isab_suspend(device_t dev)
{
struct isab_softc *sc = device_get_softc(dev);
bus_space_tag_t bst;
bus_space_handle_t bsh;
int i;
/* Save the ELCR if required. */
if (sc->elcr_res != NULL) {
bst = rman_get_bustag(sc->elcr_res);
bsh = rman_get_bushandle(sc->elcr_res);
for (i = 0; i < ELCR_IOLEN; i++)
sc->saved_elcr[i] = bus_space_read_1(bst, bsh, i);
}
return (bus_generic_suspend(dev));
}
static int
isab_resume(device_t dev)
{
struct isab_softc *sc = device_get_softc(dev);
bus_space_tag_t bst;
bus_space_handle_t bsh;
int i;
/* Restore the ELCR if required. */
if (sc->elcr_res != NULL) {
bst = rman_get_bustag(sc->elcr_res);
bsh = rman_get_bushandle(sc->elcr_res);
for (i = 0; i < ELCR_IOLEN; i++)
bus_space_write_1(bst, bsh, i, sc->saved_elcr[i]);
}
return (bus_generic_resume(dev));
}
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