Check the page table before TLB1 in pmap_kextract()
The vast majority of pmap_kextract() calls are looking for a physical memory address, not a device address. By checking the page table first this saves the formerly inevitable 64 (on e500mc and derivatives) iteration loop through TLB1 in the most common cases. Benchmarking this on the P5020 (e5500 core) yields a 300% throughput improvement on dtsec(4) (115Mbit/s -> 460Mbit/s) measured with iperf. Benchmarked on the P1022 (e500v2 core, 16 TLB1 entries) yields a 50% throughput improvement on tsec(4) (~93Mbit/s -> 165Mbit/s) measured with iperf. MFC after: 1 week Relnotes: Maybe (significant performance improvement)
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=326045
@ -2089,18 +2089,23 @@ static vm_paddr_t
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mmu_booke_kextract(mmu_t mmu, vm_offset_t va)
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{
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tlb_entry_t e;
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vm_paddr_t p;
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int i;
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/* Check TLB1 mappings */
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for (i = 0; i < TLB1_ENTRIES; i++) {
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tlb1_read_entry(&e, i);
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if (!(e.mas1 & MAS1_VALID))
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continue;
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if (va >= e.virt && va < e.virt + e.size)
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return (e.phys + (va - e.virt));
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p = pte_vatopa(mmu, kernel_pmap, va);
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if (p == 0) {
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/* Check TLB1 mappings */
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for (i = 0; i < TLB1_ENTRIES; i++) {
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tlb1_read_entry(&e, i);
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if (!(e.mas1 & MAS1_VALID))
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continue;
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if (va >= e.virt && va < e.virt + e.size)
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return (e.phys + (va - e.virt));
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}
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}
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return (pte_vatopa(mmu, kernel_pmap, va));
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return (p);
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}
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/*
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