Merge commit d7be3eab5 from llvm git (by Luís Marques):
[RISCV] Handle fcopysign(f32, f64) and fcopysign(f64, f32) Summary: Adds tablegen patterns to explicitly handle fcopysign where the magnitude and sign arguments have different types, due to the sign value casts being removed the by DAGCombiner. Support for RV32IF follows in a separate commit. Adds tests for all relevant scenarios except RV32IF. Reviewers: lenary Reviewed By: lenary Tags: #llvm Differential Revision: https://reviews.llvm.org/D70678 This is a prerequisite for building and linking hard- and soft-float riscv worlds with clang and lld. Requested by: jhb MFC after: 1 week X-MFC-With: r353358
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=356332
@ -231,6 +231,9 @@ def : Pat<(fabs FPR64:$rs1), (FSGNJX_D $rs1, $rs1)>;
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def : PatFpr64Fpr64<fcopysign, FSGNJ_D>;
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def : Pat<(fcopysign FPR64:$rs1, (fneg FPR64:$rs2)), (FSGNJN_D $rs1, $rs2)>;
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def : Pat<(fcopysign FPR64:$rs1, FPR32:$rs2), (FSGNJ_D $rs1, (FCVT_D_S $rs2))>;
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def : Pat<(fcopysign FPR32:$rs1, FPR64:$rs2), (FSGNJ_S $rs1, (FCVT_S_D $rs2,
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0b111))>;
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// fmadd: rs1 * rs2 + rs3
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def : Pat<(fma FPR64:$rs1, FPR64:$rs2, FPR64:$rs3),
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