Pull in r263169 from upstream llvm trunk (by Tim Northover):

AArch64: only try to use scaled fcvt ops on legal vector types.

  Before we ended up calling getSimpleVectorType on a <3 x float>, which
  asserted.

This fixes an assertion when building the print/ghostscript9-agpl-base
port for AArch64.

PR:		213865
MFC after:	3 days
This commit is contained in:
Dimitry Andric 2016-11-11 21:01:45 +00:00
parent a0329fb4d2
commit 3cc771c38b
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=308559

View File

@ -7581,7 +7581,8 @@ static SDValue performFpToIntCombine(SDNode *N, SelectionDAG &DAG,
return SDValue();
SDValue Op = N->getOperand(0);
if (!Op.getValueType().isVector() || Op.getOpcode() != ISD::FMUL)
if (!Op.getValueType().isVector() || !Op.getValueType().isSimple() ||
Op.getOpcode() != ISD::FMUL)
return SDValue();
SDValue ConstVec = Op->getOperand(1);