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Assume all TSCs are synchronized for AMD Family 17h processors and later

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when it has passed the synchronization test.

"Processor Programming Reference (PPR) for AMD Family 17h" states that
the TSC uses a common reference for all sockets, cores and threads.

MFC after:	1 month
This commit is contained in:
Jung-uk Kim 2020-06-22 20:42:58 +00:00
parent c5305bb50a
commit 450d86fc7f
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=362509
1 changed files with 7 additions and 0 deletions
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7
sys/x86/x86/tsc.c
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@ -525,6 +525,13 @@ test_tsc(int adj_max_count)
switch (cpu_vendor_id) {
case CPU_VENDOR_AMD:
case CPU_VENDOR_HYGON:
/*
* Processor Programming Reference (PPR) for AMD
* Family 17h states that the TSC uses a common
* reference for all sockets, cores and threads.
*/
if (CPUID_TO_FAMILY(cpu_id) >= 0x17)
return (1000);
/*
* Starting with Family 15h processors, TSC clock
* source is in the north bridge. Check whether