arm64: Decode the ID_AA64PFR2_EL1 register
No fields have been defined, but it has been documented in the Architecture Reference Manual. Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D40897
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@ -143,6 +143,7 @@ struct cpu_desc {
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uint64_t id_aa64mmfr4;
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uint64_t id_aa64pfr0;
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uint64_t id_aa64pfr1;
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uint64_t id_aa64pfr2;
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uint64_t id_aa64zfr0;
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uint64_t ctr;
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#ifdef COMPAT_FREEBSD32
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@ -1542,6 +1543,12 @@ static const struct mrs_field id_aa64pfr1_fields[] = {
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};
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/* ID_AA64PFR2_EL1 */
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static const struct mrs_field id_aa64pfr2_fields[] = {
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MRS_FIELD_END,
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};
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/* ID_AA64ZFR0_EL1 */
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static const struct mrs_field_value id_aa64zfr0_f64mm[] = {
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MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ZFR0, F64MM, NONE, IMPL),
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@ -1844,6 +1851,7 @@ static const struct mrs_user_reg user_regs[] = {
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USER_REG(ID_AA64PFR0_EL1, id_aa64pfr0),
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USER_REG(ID_AA64PFR1_EL1, id_aa64pfr1),
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USER_REG(ID_AA64PFR2_EL1, id_aa64pfr2),
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USER_REG(ID_AA64ZFR0_EL1, id_aa64zfr0),
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@ -2552,6 +2560,11 @@ print_cpu_features(u_int cpu, struct cpu_desc *desc,
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print_id_register(sb, "Processor Features 1",
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desc->id_aa64pfr1, id_aa64pfr1_fields);
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/* AArch64 Processor Feature Register 2 */
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if (SHOULD_PRINT_REG(id_aa64pfr2))
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print_id_register(sb, "Processor Features 2",
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desc->id_aa64pfr2, id_aa64pfr2_fields);
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/* AArch64 Memory Model Feature Register 0 */
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if (SHOULD_PRINT_REG(id_aa64mmfr0))
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print_id_register(sb, "Memory Model Features 0",
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@ -2695,6 +2708,7 @@ identify_cpu(u_int cpu)
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desc->id_aa64mmfr4 = READ_SPECIALREG(id_aa64mmfr4_el1);
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desc->id_aa64pfr0 = READ_SPECIALREG(id_aa64pfr0_el1);
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desc->id_aa64pfr1 = READ_SPECIALREG(id_aa64pfr1_el1);
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desc->id_aa64pfr2 = READ_SPECIALREG(id_aa64pfr2_el1);
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/*
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* ID_AA64ZFR0_EL1 is only valid when at least one of:
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@ -1258,6 +1258,14 @@
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#define ID_AA64PFR1_NMI_NONE (UL(0x0) << ID_AA64PFR1_NMI_SHIFT)
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#define ID_AA64PFR1_NMI_IMPL (UL(0x1) << ID_AA64PFR1_NMI_SHIFT)
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/* ID_AA64PFR2_EL1 */
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#define ID_AA64PFR2_EL1 MRS_REG(ID_AA64PFR2_EL1)
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#define ID_AA64PFR2_EL1_op0 3
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#define ID_AA64PFR2_EL1_op1 0
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#define ID_AA64PFR2_EL1_CRn 0
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#define ID_AA64PFR2_EL1_CRm 4
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#define ID_AA64PFR2_EL1_op2 2
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/* ID_AA64ZFR0_EL1 */
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#define ID_AA64ZFR0_EL1 MRS_REG(ID_AA64ZFR0_EL1)
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#define ID_AA64ZFR0_EL1_REG MRS_REG_ALT_NAME(ID_AA64ZFR0_EL1)
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