Simplify check for CMPXCHG8B instruction. Note CMPXCHG8B instruction is

always available for Rise mP6 processors although it is not set by CPUID.
This commit is contained in:
Jung-uk Kim 2013-08-15 21:09:05 +00:00
parent 2bb93f2d18
commit 5772203b17
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=254384
2 changed files with 17 additions and 2 deletions

View File

@ -423,6 +423,19 @@ init_6x86(void)
#endif /* I486_CPU */
#ifdef I586_CPU
/*
* Rise mP6
*/
static void
init_rise(void)
{
/*
* The CMPXCHG8B instruction is always available but hidden.
*/
cpu_feature |= CPUID_CX8;
}
/*
* IDT WinChip C6/2/2A/2B/3
*
@ -690,6 +703,9 @@ initializecpu(void)
case CPU_VENDOR_TRANSMETA:
init_transmeta();
break;
case CPU_VENDOR_RISE:
init_rise();
break;
}
break;
#endif

View File

@ -1557,8 +1557,7 @@ static void
cpu_probe_cmpxchg8b(void)
{
if ((cpu_feature & CPUID_CX8) != 0 ||
cpu_vendor_id == CPU_VENDOR_RISE) {
if ((cpu_feature & CPUID_CX8) != 0) {
atomic_load_acq_64 = atomic_load_acq_64_i586;
atomic_store_rel_64 = atomic_store_rel_64_i586;
}