Add support for the Alpha Processor, Inc. UP1000 system.
Reviewed by: dfr Thanks to: Alpha Processor Inc. for supplying the hardware.
This commit is contained in:
parent
4fe82c1303
commit
72e9d2e8a2
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=61829
127
sys/alpha/alpha/api_up1000.c
Normal file
127
sys/alpha/alpha/api_up1000.c
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@ -0,0 +1,127 @@
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/*-
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* Copyright (c) 2000 Andrew Gallatin
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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||||
* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include "opt_ddb.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <machine/intr.h>
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#include <sys/termios.h>
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#include <machine/rpb.h>
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#include <machine/cpuconf.h>
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#include <machine/clock.h>
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#include <pci/pcireg.h>
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#include <pci/pcivar.h>
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#include <alpha/pci/irongatereg.h>
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#include <alpha/pci/irongatevar.h>
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#include "sio.h"
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#include "sc.h"
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#ifndef CONSPEED
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#define CONSPEED TTYDEF_SPEED
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#endif
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static int comcnrate = CONSPEED;
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void api_up1000_init __P((void));
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static void api_up1000_cons_init __P((void));
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extern int siocnattach __P((int, int));
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extern int siogdbattach __P((int, int));
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extern int sccnattach __P((void));
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void
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api_up1000_init()
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{
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platform.family = "UP1000";
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if ((platform.model = alpha_dsr_sysname()) == NULL) {
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/* XXX Don't know the system variations, yet. */
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platform.model = alpha_unknown_sysname();
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}
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platform.iobus = "irongate";
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platform.cons_init = api_up1000_cons_init;
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}
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extern int comconsole;
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static void
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api_up1000_cons_init()
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{
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struct ctb *ctb;
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irongate_init();
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#ifdef DDB
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siogdbattach(0x2f8, 57600);
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#endif
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ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off);
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switch (ctb->ctb_term_type) {
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case 2:
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/* serial console ... */
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/* XXX */
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{
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/*
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* Delay to allow PROM putchars to complete.
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* FIFO depth * character time,
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* character time = (1000000 / (defaultrate / 10))
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*/
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DELAY(160000000 / comcnrate);
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comconsole = 0;
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if (siocnattach(0x3f8, comcnrate))
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panic("can't init serial console");
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break;
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}
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case 3:
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/* display console ... */
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/* XXX */
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#if NSC > 0
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sccnattach();
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#else
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panic("not configured to use display && keyboard console");
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#endif
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break;
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default:
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printf("ctb->ctb_term_type = 0x%lx\n", ctb->ctb_term_type);
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printf("ctb->ctb_turboslot = 0x%lx\n", ctb->ctb_turboslot);
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panic("consinit: unknown console type %ld\n",
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ctb->ctb_term_type);
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}
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}
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@ -122,6 +122,12 @@ extern void dec_2100_a500_init __P((int));
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#define dec_2100_a500_init platform_not_configured
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#endif
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#ifdef API_UP1000
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extern void api_up1000_init __P((int));
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#else
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#define api_up1000_init(n) platform_not_configured((n) + API_ST_BASE)
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#endif
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struct cpuinit cpuinit[] = {
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cpu_notsupp("???"), /* 0: ??? */
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cpu_notsupp("ST_ADU"), /* 1: ST_ADU */
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@ -161,14 +167,30 @@ struct cpuinit cpuinit[] = {
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};
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int ncpuinit = (sizeof(cpuinit) / sizeof(cpuinit[0]));
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struct cpuinit api_cpuinit[] = {
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cpu_notsupp("???"), /* 0: ??? */
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cpu_init(api_up1000_init,"API_UP1000"), /* 1: ST_API_UP1000 */
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};
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int napi_cpuinit = (sizeof(api_cpuinit) / sizeof(api_cpuinit[0]));
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void
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platform_not_configured(int cputype)
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{
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struct cpuinit *cpu;
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if (cputype >= API_ST_BASE) {
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cputype -= API_ST_BASE;
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cpu = api_cpuinit;
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} else {
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cpu = cpuinit;
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}
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printf("\n");
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printf("Support for system type %d is not present in this kernel.\n",
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cputype);
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printf("Please build a kernel with \"options %s\" and reboot.\n",
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cpuinit[cputype].option);
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cpu[cputype].option);
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printf("\n");
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panic("platform not configured\n");
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}
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@ -733,11 +733,21 @@ alpha_init(pfn, ptb, bim, bip, biv)
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*/
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cputype = -cputype;
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}
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if (cputype >= ncpuinit) {
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platform_not_supported(cputype);
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/* NOTREACHED */
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if (cputype >= API_ST_BASE) {
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if (cputype >= napi_cpuinit + API_ST_BASE) {
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platform_not_supported(cputype);
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/* NOTREACHED */
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}
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cputype -= API_ST_BASE;
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api_cpuinit[cputype].init(cputype);
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} else {
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if (cputype >= ncpuinit) {
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platform_not_supported(cputype);
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/* NOTREACHED */
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}
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cpuinit[cputype].init(cputype);
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}
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cpuinit[cputype].init(cputype);
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snprintf(cpu_model, sizeof(cpu_model), "%s", platform.model);
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/*
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@ -121,7 +121,9 @@ const char *alpha_variation_name __P((u_int64_t variation,
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const char *alpha_unknown_sysname __P((void));
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extern struct cpuinit cpuinit[];
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extern struct cpuinit api_cpuinit[];
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extern int ncpuinit;
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extern int napi_cpuinit;
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extern void platform_not_configured __P((int));
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extern void platform_not_supported __P((int));
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@ -79,6 +79,13 @@ struct rpb {
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#define ST_DEC_ALPHAVME_320 33 /* "Yukon" (VME?) */
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#define ST_DEC_6600 34 /* "Monet/Goldrush" */
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/*
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* System types for Alpha Processor Inc. machines
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*/
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#define API_ST_BASE 200
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#define ST_API_UP1000 201 /* "Nautilus" */
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u_int64_t rpb_type; /* 50: */
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#define SV_MPCAP 0x00000001 /* multiprocessor capable */
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420
sys/alpha/pci/irongate.c
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420
sys/alpha/pci/irongate.c
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@ -0,0 +1,420 @@
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/*-
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* Copyright (c) 2000 Andrew Gallatin
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
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* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include "opt_cpu.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <sys/malloc.h>
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#include <pci/pcivar.h>
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#include <pci/pcireg.h>
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#include <alpha/isa/isavar.h>
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#include <alpha/pci/irongatereg.h>
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#include <alpha/pci/irongatevar.h>
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#include <alpha/pci/pcibus.h>
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#include <machine/bwx.h>
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#include <machine/intr.h>
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#include <machine/intrcnt.h>
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#include <machine/cpuconf.h>
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#include <machine/rpb.h>
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#include <machine/resource.h>
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#include <machine/sgmap.h>
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#include <vm/vm.h>
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#include <vm/vm_page.h>
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#define KV(pa) ALPHA_PHYS_TO_K0SEG(pa)
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static devclass_t irongate_devclass;
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static device_t irongate0; /* XXX only one for now */
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struct irongate_softc {
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int junk; /* no softc */
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};
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#define IRONGATE_SOFTC(dev) (struct irongate_softc*) device_get_softc(dev)
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static alpha_chipset_inb_t irongate_inb;
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static alpha_chipset_inw_t irongate_inw;
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static alpha_chipset_inl_t irongate_inl;
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static alpha_chipset_outb_t irongate_outb;
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static alpha_chipset_outw_t irongate_outw;
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static alpha_chipset_outl_t irongate_outl;
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static alpha_chipset_readb_t irongate_readb;
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static alpha_chipset_readw_t irongate_readw;
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static alpha_chipset_readl_t irongate_readl;
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static alpha_chipset_writeb_t irongate_writeb;
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static alpha_chipset_writew_t irongate_writew;
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static alpha_chipset_writel_t irongate_writel;
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static alpha_chipset_maxdevs_t irongate_maxdevs;
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static alpha_chipset_cfgreadb_t irongate_cfgreadb;
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static alpha_chipset_cfgreadw_t irongate_cfgreadw;
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static alpha_chipset_cfgreadl_t irongate_cfgreadl;
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static alpha_chipset_cfgwriteb_t irongate_cfgwriteb;
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static alpha_chipset_cfgwritew_t irongate_cfgwritew;
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static alpha_chipset_cfgwritel_t irongate_cfgwritel;
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static alpha_chipset_addrcvt_t irongate_cvt_dense, irongate_cvt_bwx;
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static alpha_chipset_read_hae_t irongate_read_hae;
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static alpha_chipset_write_hae_t irongate_write_hae;
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static alpha_chipset_t irongate_chipset = {
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irongate_inb,
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irongate_inw,
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irongate_inl,
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irongate_outb,
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irongate_outw,
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irongate_outl,
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irongate_readb,
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irongate_readw,
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irongate_readl,
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irongate_writeb,
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irongate_writew,
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irongate_writel,
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irongate_maxdevs,
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irongate_cfgreadb,
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irongate_cfgreadw,
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irongate_cfgreadl,
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irongate_cfgwriteb,
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irongate_cfgwritew,
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irongate_cfgwritel,
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irongate_cvt_dense,
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irongate_cvt_bwx,
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irongate_read_hae,
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irongate_write_hae,
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};
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static u_int8_t
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irongate_inb(u_int32_t port)
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{
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alpha_mb();
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return ldbu(KV(IRONGATE_IO + port));
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}
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static u_int16_t
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irongate_inw(u_int32_t port)
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{
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alpha_mb();
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return ldwu(KV(IRONGATE_IO + port));
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}
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static u_int32_t
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irongate_inl(u_int32_t port)
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{
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alpha_mb();
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return ldl(KV(IRONGATE_IO + port));
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}
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static void
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irongate_outb(u_int32_t port, u_int8_t data)
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{
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stb(KV(IRONGATE_IO + port), data);
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alpha_mb();
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}
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static void
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irongate_outw(u_int32_t port, u_int16_t data)
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{
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stw(KV(IRONGATE_IO + port), data);
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alpha_mb();
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}
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static void
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irongate_outl(u_int32_t port, u_int32_t data)
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{
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stl(KV(IRONGATE_IO + port), data);
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alpha_mb();
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}
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static u_int8_t
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irongate_readb(u_int32_t pa)
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{
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alpha_mb();
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return ldbu(KV(IRONGATE_MEM + pa));
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}
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static u_int16_t
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irongate_readw(u_int32_t pa)
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{
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alpha_mb();
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return ldwu(KV(IRONGATE_MEM + pa));
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}
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static u_int32_t
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irongate_readl(u_int32_t pa)
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{
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alpha_mb();
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return ldl(KV(IRONGATE_MEM + pa));
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}
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static void
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irongate_writeb(u_int32_t pa, u_int8_t data)
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{
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stb(KV(IRONGATE_MEM + pa), data);
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alpha_mb();
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}
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static void
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irongate_writew(u_int32_t pa, u_int16_t data)
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{
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stw(KV(IRONGATE_MEM + pa), data);
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alpha_mb();
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}
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static void
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irongate_writel(u_int32_t pa, u_int32_t data)
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{
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stl(KV(IRONGATE_MEM + pa), data);
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alpha_mb();
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}
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static int
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irongate_maxdevs(u_int b)
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{
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return 12; /* XXX */
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}
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static void
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irongate_clear_abort(void)
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{
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alpha_mb();
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alpha_pal_draina();
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}
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static int
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irongate_check_abort(void)
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{
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alpha_pal_draina();
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alpha_mb();
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return 0;
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}
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#define IRONGATE_CFGADDR(b, s, f, r) \
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KV(IRONGATE_CONF | ((b) << 16) | ((s) << 11) | ((f) << 8) | (r))
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#define CFGREAD(h, b, s, f, r, op, width, type) \
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vm_offset_t va; \
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type data; \
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va = IRONGATE_CFGADDR(b, s, f, r); \
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irongate_clear_abort(); \
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if (badaddr((caddr_t)va, width)) { \
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irongate_check_abort(); \
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return ~0; \
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} \
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data = ##op##(va); \
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if (irongate_check_abort()) \
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return ~0; \
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return data;
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#define CFWRITE(h, b, s, f, r, data, op, width) \
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vm_offset_t va; \
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va = IRONGATE_CFGADDR(b, s, f, r); \
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irongate_clear_abort(); \
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if (badaddr((caddr_t)va, width)) \
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return; \
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##op##(va, data); \
|
||||
irongate_check_abort();
|
||||
|
||||
|
||||
|
||||
|
||||
static u_int8_t
|
||||
irongate_cfgreadb(u_int h, u_int b, u_int s, u_int f, u_int r)
|
||||
{
|
||||
CFGREAD(h, b, s, f, r, ldbu, 1, u_int8_t)
|
||||
}
|
||||
|
||||
static u_int16_t
|
||||
irongate_cfgreadw(u_int h, u_int b, u_int s, u_int f, u_int r)
|
||||
{
|
||||
CFGREAD(h, b, s, f, r, ldwu, 2, u_int16_t)
|
||||
}
|
||||
|
||||
static u_int32_t
|
||||
irongate_cfgreadl(u_int h, u_int b, u_int s, u_int f, u_int r)
|
||||
{
|
||||
CFGREAD(h, b, s, f, r, ldl, 4, u_int32_t)
|
||||
}
|
||||
|
||||
static void
|
||||
irongate_cfgwriteb(u_int h, u_int b, u_int s, u_int f, u_int r, u_int8_t data)
|
||||
{
|
||||
CFWRITE(h, b, s, f, r, data, stb, 1)
|
||||
}
|
||||
|
||||
static void
|
||||
irongate_cfgwritew(u_int h, u_int b, u_int s, u_int f, u_int r, u_int16_t data)
|
||||
{
|
||||
CFWRITE(h, b, s, f, r, data, stw, 2)
|
||||
}
|
||||
|
||||
static void
|
||||
irongate_cfgwritel(u_int h, u_int b, u_int s, u_int f, u_int r, u_int32_t data)
|
||||
{
|
||||
CFWRITE(h, b, s, f, r, data, stl, 4)
|
||||
}
|
||||
|
||||
|
||||
vm_offset_t
|
||||
irongate_cvt_bwx(vm_offset_t addr)
|
||||
{
|
||||
addr &= 0xffffffffUL;
|
||||
return (KV(addr | IRONGATE_MEM));
|
||||
}
|
||||
|
||||
vm_offset_t
|
||||
irongate_cvt_dense(vm_offset_t addr)
|
||||
{
|
||||
return irongate_cvt_bwx(addr);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* There doesn't appear to be an hae on this platform
|
||||
*/
|
||||
|
||||
|
||||
static u_int64_t
|
||||
irongate_read_hae(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void
|
||||
irongate_write_hae(u_int64_t hae)
|
||||
{
|
||||
}
|
||||
|
||||
static int irongate_probe(device_t dev);
|
||||
static int irongate_attach(device_t dev);
|
||||
|
||||
static device_method_t irongate_methods[] = {
|
||||
/* Device interface */
|
||||
DEVMETHOD(device_probe, irongate_probe),
|
||||
DEVMETHOD(device_attach, irongate_attach),
|
||||
|
||||
/* Bus interface */
|
||||
DEVMETHOD(bus_print_child, bus_generic_print_child),
|
||||
DEVMETHOD(bus_alloc_resource, pci_alloc_resource),
|
||||
DEVMETHOD(bus_release_resource, pci_release_resource),
|
||||
DEVMETHOD(bus_activate_resource, pci_activate_resource),
|
||||
DEVMETHOD(bus_deactivate_resource, pci_deactivate_resource),
|
||||
DEVMETHOD(bus_setup_intr, isa_setup_intr),
|
||||
DEVMETHOD(bus_teardown_intr, isa_teardown_intr),
|
||||
|
||||
{ 0, 0 }
|
||||
};
|
||||
|
||||
static driver_t irongate_driver = {
|
||||
"irongate",
|
||||
irongate_methods,
|
||||
sizeof(struct irongate_softc),
|
||||
};
|
||||
|
||||
void
|
||||
irongate_init()
|
||||
{
|
||||
static int initted = 0;
|
||||
|
||||
if (initted) return;
|
||||
initted = 1;
|
||||
|
||||
chipset = irongate_chipset;
|
||||
alpha_XXX_dmamap_or = 0UL;
|
||||
|
||||
if (platform.pci_intr_init)
|
||||
platform.pci_intr_init();
|
||||
}
|
||||
|
||||
static int
|
||||
irongate_probe(device_t dev)
|
||||
{
|
||||
|
||||
if (irongate0)
|
||||
return ENXIO;
|
||||
irongate0 = dev;
|
||||
device_set_desc(dev, "AMD 751 Core Logic chipset");
|
||||
pci_init_resources();
|
||||
isa_init_intr();
|
||||
device_add_child(dev, "pcib", 0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
static int
|
||||
irongate_attach(device_t dev)
|
||||
{
|
||||
u_int8_t value;
|
||||
pcicfgregs southbridge;
|
||||
|
||||
|
||||
irongate_init();
|
||||
|
||||
if (!platform.iointr) /* XXX */
|
||||
set_iointr(alpha_dispatch_intr);
|
||||
|
||||
snprintf(chipset_type, sizeof(chipset_type), "irongate");
|
||||
chipset_bwx = 1;
|
||||
|
||||
chipset_ports = IRONGATE_IO;
|
||||
chipset_memory = IRONGATE_MEM;
|
||||
chipset_dense = IRONGATE_MEM;
|
||||
/* no s/g support in this chipset, must use bounce-buffers */
|
||||
chipset.sgmap = NULL;
|
||||
|
||||
/*
|
||||
* XXX -- The SRM console doesn't properly initialize
|
||||
* the AcerLabs M1533C southbridge. We must turn off 32-bit
|
||||
* DMA support.
|
||||
*/
|
||||
|
||||
southbridge.hose = 0;
|
||||
southbridge.bus = 0;
|
||||
southbridge.slot = 7;
|
||||
southbridge.func = 0;
|
||||
if ((0x153310b9 == pci_cfgread(&southbridge, PCIR_DEVVENDOR, 4))) {
|
||||
value = (u_int8_t)pci_cfgread(&southbridge, 0x42, 1);
|
||||
value &= ~0x40;
|
||||
pci_cfgwrite(&southbridge, 0x42, 0, 1);
|
||||
}
|
||||
|
||||
bus_generic_attach(dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
DRIVER_MODULE(irongate, root, irongate_driver, irongate_devclass, 0, 0);
|
||||
|
95
sys/alpha/pci/irongate_pci.c
Normal file
95
sys/alpha/pci/irongate_pci.c
Normal file
@ -0,0 +1,95 @@
|
||||
/*-
|
||||
* Copyright (c) 2000 Andrew Gallatin
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/module.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/bus.h>
|
||||
#include <machine/bus.h>
|
||||
#include <machine/md_var.h>
|
||||
#include <sys/rman.h>
|
||||
#include <pci/pcivar.h>
|
||||
#include <alpha/pci/irongatereg.h>
|
||||
#include <alpha/pci/irongatevar.h>
|
||||
|
||||
|
||||
static devclass_t pcib_devclass;
|
||||
|
||||
|
||||
static int
|
||||
irongate_pcib_probe(device_t dev)
|
||||
{
|
||||
|
||||
device_set_desc(dev, "AMD 751 PCI host bus adapter");
|
||||
|
||||
device_add_child(dev, "pci", -1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
irongate_pcib_read_ivar(device_t dev, device_t child, int which, u_long *result)
|
||||
{
|
||||
if (which == PCIB_IVAR_HOSE) {
|
||||
*result = 0;
|
||||
return 0;
|
||||
}
|
||||
return ENOENT;
|
||||
}
|
||||
|
||||
static device_method_t irongate_pcib_methods[] = {
|
||||
/* Device interface */
|
||||
DEVMETHOD(device_probe, irongate_pcib_probe),
|
||||
DEVMETHOD(device_attach, bus_generic_attach),
|
||||
|
||||
/* Bus interface */
|
||||
DEVMETHOD(bus_print_child, bus_generic_print_child),
|
||||
DEVMETHOD(bus_read_ivar, irongate_pcib_read_ivar),
|
||||
DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
|
||||
DEVMETHOD(bus_release_resource, bus_generic_release_resource),
|
||||
DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
|
||||
DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
|
||||
DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
|
||||
DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
|
||||
|
||||
{ 0, 0 }
|
||||
};
|
||||
|
||||
|
||||
static driver_t irongate_pcib_driver = {
|
||||
"pcib",
|
||||
irongate_pcib_methods,
|
||||
1,
|
||||
};
|
||||
|
||||
|
||||
DRIVER_MODULE(pcib, irongate, irongate_pcib_driver, pcib_devclass, 0, 0);
|
||||
|
||||
|
43
sys/alpha/pci/irongatereg.h
Normal file
43
sys/alpha/pci/irongatereg.h
Normal file
@ -0,0 +1,43 @@
|
||||
/*-
|
||||
* Copyright (c) 2000 Andrew Gallatin
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
/*
|
||||
* AMD-751 Chipset registers and constants.
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
/*
|
||||
* memory / i/o space macros
|
||||
*
|
||||
*/
|
||||
|
||||
#define IRONGATE_MEM 0x10000000000UL
|
||||
#define IRONGATE_IACK_SC 0x101F8000000UL
|
||||
#define IRONGATE_IO 0x101FC000000UL
|
||||
#define IRONGATE_CONF 0x101FE000000UL
|
30
sys/alpha/pci/irongatevar.h
Normal file
30
sys/alpha/pci/irongatevar.h
Normal file
@ -0,0 +1,30 @@
|
||||
/*-
|
||||
* Copyright (c) 2000 Andrew Gallatin
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
extern void irongate_init(void);
|
||||
|
@ -26,6 +26,7 @@ atkbdmap.h optional atkbd_dflt_keymap \
|
||||
alpha/alpha/autoconf.c standard
|
||||
alpha/alpha/cpuconf.c standard
|
||||
alpha/alpha/atomic.s standard
|
||||
alpha/alpha/api_up1000.c optional api_up1000
|
||||
alpha/alpha/dec_kn8ae.c optional dec_kn8ae
|
||||
alpha/alpha/dec_eb164.c optional dec_eb164
|
||||
alpha/alpha/dec_eb64plus.c optional dec_eb64plus
|
||||
@ -129,6 +130,8 @@ alpha/pci/cia_pci.c optional dec_eb164
|
||||
alpha/pci/cia_pci.c optional dec_kn20aa
|
||||
alpha/pci/cia_pci.c optional dec_st550
|
||||
alpha/pci/cia_pci.c optional dec_1000a
|
||||
alpha/pci/irongate.c optional api_up1000
|
||||
alpha/pci/irongate_pci.c optional api_up1000
|
||||
alpha/pci/lca.c optional dec_axppci_33
|
||||
alpha/pci/lca_pci.c optional dec_axppci_33
|
||||
alpha/pci/pci_eb164_intr.s optional dec_eb164
|
||||
|
@ -15,6 +15,7 @@ DEC_AXPPCI_33 opt_cpu.h
|
||||
DEC_3000_300 opt_cpu.h
|
||||
DEC_3000_500 opt_cpu.h
|
||||
DEC_1000A opt_cpu.h
|
||||
API_UP1000 opt_cpu.h
|
||||
|
||||
PPC_PROBE_CHIPSET opt_ppc.h
|
||||
PPC_DEBUG opt_ppc.h
|
||||
|
Loading…
Reference in New Issue
Block a user