d/freebsd-dev
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Various fixes for wl(4):

Browse Source 
- Don't recurse driver mutex.
- Don't hold driver mutex across fubyte/subyte.
- Replace fubyte/subyte loops with copyin/copyout calls.
- Use relatively sane locking in wl_ioctl().
- Use bus space accessors instead of in*()/out*().
- Use callout(9) instead of timeout(9).
- Stop watchdog timer in detach and don't hold mutex across
  bus_teardown_intr().
- Use device_printf() and if_printf().
- De-spl().

Tested by:	no one
This commit is contained in:
John Baldwin 2014-11-20 20:09:18 +00:00
parent 68355d6522
commit 7e88c64c79
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=274758
2 changed files with 421 additions and 433 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

814
sys/dev/wl/if_wl.c
View File

File diff suppressed because it is too large Load Diff

40
sys/dev/wl/if_wl.h
View File

@ -57,15 +57,15 @@ typedef struct {
/* WaveLAN host interface definitions */
#define HACR(base) (base) /* Host Adapter Command Register */
#define HASR(base) (base) /* Host Adapter Status Register */
#define MMCR(base) (base+0x2) /* Modem Management Ctrl Register */
#define PIOR0(base) (base+0x4) /* Program I/O Address Register 0 */
#define PIOP0(base) (base+0x6) /* Program I/O Port 0 */
#define PIOR1(base) (base+0x8) /* Program I/O Address Register 1 */
#define PIOP1(base) (base+0xa) /* Program I/O Port 1 */
#define PIOR2(base) (base+0xc) /* Program I/O Address Register 2 */
#define PIOP2(base) (base+0xe) /* Program I/O Port 2 */
#define HACR 0x0 /* Host Adapter Command Register */
#define HASR 0x0 /* Host Adapter Status Register */
#define MMCR 0x2 /* Modem Management Ctrl Register */
#define PIOR0 0x4 /* Program I/O Address Register 0 */
#define PIOP0 0x6 /* Program I/O Port 0 */
#define PIOR1 0x8 /* Program I/O Address Register 1 */
#define PIOP1 0xa /* Program I/O Port 1 */
#define PIOR2 0xc /* Program I/O Address Register 2 */
#define PIOP2 0xe /* Program I/O Port 2 */
/* Program I/O Mode Register values */
@ -96,9 +96,21 @@ typedef struct {
#define HACR_DEFAULT (HACR_OUT1 | HACR_OUT2 | HACR_16BITS | PIOM(STATIC_PIO, 0) | PIOM(AUTOINCR_PIO, 1) | PIOM(PARAM_ACCESS_PIO, 2))
#define HACR_INTRON (HACR_MASK_82586 | HACR_MASK_MMC | HACR_INTR_CLEN)
#define CMD(sc) \
#define WL_READ_1(sc, reg) bus_read_1((sc)->res_ioport, (reg))
#define WL_READ_2(sc, reg) bus_read_2((sc)->res_ioport, (reg))
#define WL_READ_MULTI_2(sc, reg, buf, len) \
bus_read_multi_2((sc)->res_ioport, (reg), (uint16_t *)(buf), (len))
#define WL_WRITE_1(sc, reg, val) \
bus_write_1((sc)->res_ioport, (reg), (val))
#define WL_WRITE_2(sc, reg, val) \
bus_write_2((sc)->res_ioport, (reg), (val))
#define WL_WRITE_MULTI_2(sc, reg, buf, len) \
bus_write_multi_2((sc)->res_ioport, (reg), (uint16_t *)(buf), (len))
#define CMD(sc) \
{ \
outw(HACR(sc->base),sc->hacr); \
WL_WRITE_2(sc, HACR, sc->hacr); \
/* delay for 50 us, might only be needed sometimes */ \
DELAY(DELAYCONST); \
}
@ -108,13 +120,13 @@ typedef struct {
*/
#define SET_CHAN_ATTN(sc) \
{ \
outw(HACR(sc->base),sc->hacr | HACR_CA); \
WL_WRITE_2(sc, HACR, sc->hacr | HACR_CA); \
}
#define MMC_WRITE(cmd,val) \
while(inw(HASR(sc->base)) & HASR_MMC_BUSY) ; \
outw(MMCR(sc->base), \
while (WL_READ_2(sc, HASR) & HASR_MMC_BUSY) ; \
WL_WRITE_2(sc, MMCR, \
(u_short)(((u_short)(val) << 8) | ((cmd) << 1) | 1))
#endif /* _IF_WL_H */