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On non-64-bit systems (which generally don't have lwsync), use eieio and

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isync to implement read and write barriers, following Appendix B.2 of
Book II of the architecture manual. This provides a 25% speed increase
to fork() on the PowerPC G4.
This commit is contained in:
Nathan Whitehorn 2012-04-22 20:23:34 +00:00
parent 6f26a88999
commit 83ae3d5531
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=234583
1 changed files with 5 additions and 0 deletions
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5
sys/powerpc/include/atomic.h
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@ -38,8 +38,13 @@
/* NOTE: lwsync is equivalent to sync on systems without lwsync */ /* NOTE: lwsync is equivalent to sync on systems without lwsync */
#define mb() __asm __volatile("lwsync" : : : "memory") #define mb() __asm __volatile("lwsync" : : : "memory")
#ifdef __powerpc64__
#define wmb() __asm __volatile("lwsync" : : : "memory") #define wmb() __asm __volatile("lwsync" : : : "memory")
#define rmb() __asm __volatile("lwsync" : : : "memory") #define rmb() __asm __volatile("lwsync" : : : "memory")
#else
#define wmb() __asm __volatile("eieio" : : : "memory")
#define rmb() __asm __volatile("isync" : : : "memory")
#endif
/* /*
* atomic_add(p, v) * atomic_add(p, v)