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mlx5_core: remove unneccessary LFENCE instruction.

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Use fence instead of barrier, which is optimized to take advantage of
the x86 TSO memory model.

Reviewed by:	hselasky
Sponsored by:	Mellanox Technologies
MFC after:	1 week
This commit is contained in:
Konstantin Belousov 2020-07-02 10:44:45 +00:00
parent f334f212d9
commit 92d8df2f37
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=362887
1 changed files with 1 additions and 1 deletions
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sys/dev/mlx5/mlx5_core/mlx5_eq.c
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@ -240,7 +240,7 @@ static int mlx5_eq_int(struct mlx5_core_dev *dev, struct mlx5_eq *eq)
* Make sure we read EQ entry contents after we've
* checked the ownership bit.
*/
rmb();
atomic_thread_fence_acq();
mlx5_core_dbg(eq->dev, "eqn %d, eqe type %s\n",
eq->eqn, eqe_type_str(eqe->type));