arm: allwinner: Remove frac mode from NM clk

We have a correct clock type aw_clk_frac now for this.
This commit is contained in:
Emmanuel Vadot 2019-05-23 17:36:55 +00:00
parent 747ef14e61
commit beba2ebaef
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=348182
3 changed files with 18 additions and 82 deletions

View File

@ -64,7 +64,6 @@ struct aw_clk_init {
#define AW_CLK_HAS_MUX 0x0004
#define AW_CLK_REPARENT 0x0008
#define AW_CLK_SCALE_CHANGE 0x0010
#define AW_CLK_HAS_FRAC 0x0020
#define AW_CLK_HAS_UPDATE 0x0040
#define AW_CLK_HAS_PREDIV 0x0080
@ -334,7 +333,7 @@ aw_clk_factor_get_value(struct aw_clk_factor *factor, uint32_t raw)
.gate_shift = _gate_shift, \
.lock_shift = _lock_shift, \
.lock_retries = _lock_retries, \
.flags = _flags | AW_CLK_HAS_FRAC, \
.flags = _flags, \
.frac.freq0 = _freq0, \
.frac.freq1 = _freq1, \
.frac.mode_sel = _mode_sel, \
@ -370,38 +369,6 @@ aw_clk_factor_get_value(struct aw_clk_factor *factor, uint32_t raw)
.flags = _flags, \
}
#define NM_CLK_WITH_FRAC(_clkname, _id, _name, _pnames, \
_offset, \
_nshift, _nwidth, _nvalue, _nflags, \
_mshift, _mwidth, _mvalue, _mflags, \
_gate_shift, _lock_shift,_lock_retries, \
_flags, _freq0, _freq1, _mode_sel, _freq_sel) \
static struct aw_clk_nm_def _clkname = { \
.clkdef = { \
.id = _id, \
.name = _name, \
.parent_names = _pnames, \
.parent_cnt = nitems(_pnames), \
}, \
.offset = _offset, \
.n.shift = _nshift, \
.n.width = _nwidth, \
.n.value = _nvalue, \
.n.flags = _nflags, \
.m.shift = _mshift, \
.m.width = _mwidth, \
.m.value = _mvalue, \
.m.flags = _mflags, \
.gate_shift = _gate_shift, \
.lock_shift = _lock_shift, \
.lock_retries = _lock_retries, \
.flags = _flags | AW_CLK_HAS_FRAC, \
.frac.freq0 = _freq0, \
.frac.freq1 = _freq1, \
.frac.mode_sel = _mode_sel, \
.frac.freq_sel = _freq_sel, \
}
#define PREDIV_CLK(_clkname, _id, _name, _pnames, \
_offset, \
_mux_shift, _mux_width, \

View File

@ -53,7 +53,6 @@ struct aw_clk_nm_sc {
struct aw_clk_factor m;
struct aw_clk_factor n;
struct aw_clk_factor prediv;
struct aw_clk_frac frac;
uint32_t mux_shift;
uint32_t mux_mask;
@ -182,13 +181,13 @@ aw_clk_nm_set_freq(struct clknode *clk, uint64_t fparent, uint64_t *fout,
struct aw_clk_nm_sc *sc;
struct clknode *p_clk;
const char **p_names;
uint64_t cur, best, best_frac;
uint64_t cur, best;
uint32_t val, m, n, best_m, best_n;
int p_idx, best_parent, retry;
sc = clknode_get_softc(clk);
best = best_frac = cur = 0;
best = cur = 0;
best_parent = 0;
if ((sc->flags & AW_CLK_REPARENT) != 0) {
@ -210,13 +209,8 @@ aw_clk_nm_set_freq(struct clknode *clk, uint64_t fparent, uint64_t *fout,
p_clk = clknode_get_parent(clk);
clknode_get_freq(p_clk, &fparent);
} else {
if (sc->flags & AW_CLK_HAS_FRAC &&
(*fout == sc->frac.freq0 || *fout == sc->frac.freq1))
best = best_frac = *fout;
if (best == 0)
best = aw_clk_nm_find_best(sc, fparent, fout,
&best_n, &best_m);
best = aw_clk_nm_find_best(sc, fparent, fout,
&best_n, &best_m);
}
if ((flags & CLK_SET_DRYRUN) != 0) {
@ -242,20 +236,12 @@ aw_clk_nm_set_freq(struct clknode *clk, uint64_t fparent, uint64_t *fout,
DEVICE_LOCK(clk);
READ4(clk, sc->offset, &val);
if (best_frac != 0) {
val &= ~sc->frac.mode_sel;
if (best_frac == sc->frac.freq0)
val &= ~sc->frac.freq_sel;
else
val |= sc->frac.freq_sel;
} else {
n = aw_clk_factor_get_value(&sc->n, best_n);
m = aw_clk_factor_get_value(&sc->m, best_m);
val &= ~sc->n.mask;
val &= ~sc->m.mask;
val |= n << sc->n.shift;
val |= m << sc->m.shift;
}
n = aw_clk_factor_get_value(&sc->n, best_n);
m = aw_clk_factor_get_value(&sc->m, best_m);
val &= ~sc->n.mask;
val &= ~sc->m.mask;
val |= n << sc->n.shift;
val |= m << sc->m.shift;
WRITE4(clk, sc->offset, val);
DEVICE_UNLOCK(clk);
@ -287,25 +273,14 @@ aw_clk_nm_recalc(struct clknode *clk, uint64_t *freq)
READ4(clk, sc->offset, &val);
DEVICE_UNLOCK(clk);
if (sc->flags & AW_CLK_HAS_FRAC && ((val & sc->frac.mode_sel) == 0)) {
if (val & sc->frac.freq_sel)
*freq = sc->frac.freq1;
else
*freq = sc->frac.freq0;
} else {
m = aw_clk_get_factor(val, &sc->m);
n = aw_clk_get_factor(val, &sc->n);
if (sc->flags & AW_CLK_HAS_PREDIV)
prediv = aw_clk_get_factor(val, &sc->prediv);
else
prediv = 1;
m = aw_clk_get_factor(val, &sc->m);
n = aw_clk_get_factor(val, &sc->n);
if (sc->flags & AW_CLK_HAS_PREDIV)
prediv = aw_clk_get_factor(val, &sc->prediv);
else
prediv = 1;
/* For FRAC NM the formula is freq_parent * n / m */
if (sc->flags & AW_CLK_HAS_FRAC)
*freq = *freq * n / m;
else
*freq = *freq / prediv / n / m;
}
*freq = *freq / prediv / n / m;
return (0);
}
@ -361,11 +336,6 @@ aw_clk_nm_register(struct clkdom *clkdom, struct aw_clk_nm_def *clkdef)
sc->prediv.cond_mask = clkdef->prediv.cond_mask;
sc->prediv.cond_value = clkdef->prediv.cond_value;
sc->frac.freq0 = clkdef->frac.freq0;
sc->frac.freq1 = clkdef->frac.freq1;
sc->frac.mode_sel = 1 << clkdef->frac.mode_sel;
sc->frac.freq_sel = 1 << clkdef->frac.freq_sel;
sc->mux_shift = clkdef->mux_shift;
sc->mux_mask = ((1 << clkdef->mux_width) - 1) << sc->mux_shift;

View File

@ -38,7 +38,6 @@ struct aw_clk_nm_def {
struct aw_clk_factor m;
struct aw_clk_factor n;
struct aw_clk_factor prediv;
struct aw_clk_frac frac;
uint32_t mux_shift;
uint32_t mux_width;