arm: allwinner: Remove frac mode from NM clk
We have a correct clock type aw_clk_frac now for this.
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747ef14e61
commit
beba2ebaef
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=348182
@ -64,7 +64,6 @@ struct aw_clk_init {
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#define AW_CLK_HAS_MUX 0x0004
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#define AW_CLK_REPARENT 0x0008
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#define AW_CLK_SCALE_CHANGE 0x0010
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#define AW_CLK_HAS_FRAC 0x0020
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#define AW_CLK_HAS_UPDATE 0x0040
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#define AW_CLK_HAS_PREDIV 0x0080
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@ -334,7 +333,7 @@ aw_clk_factor_get_value(struct aw_clk_factor *factor, uint32_t raw)
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.gate_shift = _gate_shift, \
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.lock_shift = _lock_shift, \
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.lock_retries = _lock_retries, \
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.flags = _flags | AW_CLK_HAS_FRAC, \
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.flags = _flags, \
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.frac.freq0 = _freq0, \
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.frac.freq1 = _freq1, \
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.frac.mode_sel = _mode_sel, \
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@ -370,38 +369,6 @@ aw_clk_factor_get_value(struct aw_clk_factor *factor, uint32_t raw)
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.flags = _flags, \
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}
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#define NM_CLK_WITH_FRAC(_clkname, _id, _name, _pnames, \
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_offset, \
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_nshift, _nwidth, _nvalue, _nflags, \
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_mshift, _mwidth, _mvalue, _mflags, \
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_gate_shift, _lock_shift,_lock_retries, \
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_flags, _freq0, _freq1, _mode_sel, _freq_sel) \
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static struct aw_clk_nm_def _clkname = { \
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.clkdef = { \
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.id = _id, \
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.name = _name, \
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.parent_names = _pnames, \
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.parent_cnt = nitems(_pnames), \
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}, \
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.offset = _offset, \
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.n.shift = _nshift, \
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.n.width = _nwidth, \
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.n.value = _nvalue, \
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.n.flags = _nflags, \
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.m.shift = _mshift, \
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.m.width = _mwidth, \
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.m.value = _mvalue, \
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.m.flags = _mflags, \
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.gate_shift = _gate_shift, \
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.lock_shift = _lock_shift, \
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.lock_retries = _lock_retries, \
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.flags = _flags | AW_CLK_HAS_FRAC, \
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.frac.freq0 = _freq0, \
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.frac.freq1 = _freq1, \
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.frac.mode_sel = _mode_sel, \
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.frac.freq_sel = _freq_sel, \
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}
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#define PREDIV_CLK(_clkname, _id, _name, _pnames, \
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_offset, \
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_mux_shift, _mux_width, \
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@ -53,7 +53,6 @@ struct aw_clk_nm_sc {
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struct aw_clk_factor m;
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struct aw_clk_factor n;
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struct aw_clk_factor prediv;
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struct aw_clk_frac frac;
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uint32_t mux_shift;
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uint32_t mux_mask;
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@ -182,13 +181,13 @@ aw_clk_nm_set_freq(struct clknode *clk, uint64_t fparent, uint64_t *fout,
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struct aw_clk_nm_sc *sc;
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struct clknode *p_clk;
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const char **p_names;
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uint64_t cur, best, best_frac;
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uint64_t cur, best;
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uint32_t val, m, n, best_m, best_n;
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int p_idx, best_parent, retry;
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sc = clknode_get_softc(clk);
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best = best_frac = cur = 0;
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best = cur = 0;
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best_parent = 0;
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if ((sc->flags & AW_CLK_REPARENT) != 0) {
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@ -210,13 +209,8 @@ aw_clk_nm_set_freq(struct clknode *clk, uint64_t fparent, uint64_t *fout,
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p_clk = clknode_get_parent(clk);
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clknode_get_freq(p_clk, &fparent);
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} else {
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if (sc->flags & AW_CLK_HAS_FRAC &&
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(*fout == sc->frac.freq0 || *fout == sc->frac.freq1))
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best = best_frac = *fout;
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if (best == 0)
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best = aw_clk_nm_find_best(sc, fparent, fout,
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&best_n, &best_m);
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best = aw_clk_nm_find_best(sc, fparent, fout,
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&best_n, &best_m);
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}
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if ((flags & CLK_SET_DRYRUN) != 0) {
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@ -242,20 +236,12 @@ aw_clk_nm_set_freq(struct clknode *clk, uint64_t fparent, uint64_t *fout,
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DEVICE_LOCK(clk);
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READ4(clk, sc->offset, &val);
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if (best_frac != 0) {
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val &= ~sc->frac.mode_sel;
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if (best_frac == sc->frac.freq0)
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val &= ~sc->frac.freq_sel;
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else
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val |= sc->frac.freq_sel;
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} else {
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n = aw_clk_factor_get_value(&sc->n, best_n);
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m = aw_clk_factor_get_value(&sc->m, best_m);
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val &= ~sc->n.mask;
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val &= ~sc->m.mask;
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val |= n << sc->n.shift;
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val |= m << sc->m.shift;
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}
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n = aw_clk_factor_get_value(&sc->n, best_n);
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m = aw_clk_factor_get_value(&sc->m, best_m);
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val &= ~sc->n.mask;
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val &= ~sc->m.mask;
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val |= n << sc->n.shift;
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val |= m << sc->m.shift;
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WRITE4(clk, sc->offset, val);
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DEVICE_UNLOCK(clk);
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@ -287,25 +273,14 @@ aw_clk_nm_recalc(struct clknode *clk, uint64_t *freq)
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READ4(clk, sc->offset, &val);
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DEVICE_UNLOCK(clk);
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if (sc->flags & AW_CLK_HAS_FRAC && ((val & sc->frac.mode_sel) == 0)) {
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if (val & sc->frac.freq_sel)
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*freq = sc->frac.freq1;
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else
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*freq = sc->frac.freq0;
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} else {
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m = aw_clk_get_factor(val, &sc->m);
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n = aw_clk_get_factor(val, &sc->n);
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if (sc->flags & AW_CLK_HAS_PREDIV)
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prediv = aw_clk_get_factor(val, &sc->prediv);
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else
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prediv = 1;
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m = aw_clk_get_factor(val, &sc->m);
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n = aw_clk_get_factor(val, &sc->n);
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if (sc->flags & AW_CLK_HAS_PREDIV)
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prediv = aw_clk_get_factor(val, &sc->prediv);
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else
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prediv = 1;
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/* For FRAC NM the formula is freq_parent * n / m */
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if (sc->flags & AW_CLK_HAS_FRAC)
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*freq = *freq * n / m;
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else
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*freq = *freq / prediv / n / m;
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}
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*freq = *freq / prediv / n / m;
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return (0);
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}
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@ -361,11 +336,6 @@ aw_clk_nm_register(struct clkdom *clkdom, struct aw_clk_nm_def *clkdef)
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sc->prediv.cond_mask = clkdef->prediv.cond_mask;
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sc->prediv.cond_value = clkdef->prediv.cond_value;
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sc->frac.freq0 = clkdef->frac.freq0;
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sc->frac.freq1 = clkdef->frac.freq1;
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sc->frac.mode_sel = 1 << clkdef->frac.mode_sel;
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sc->frac.freq_sel = 1 << clkdef->frac.freq_sel;
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sc->mux_shift = clkdef->mux_shift;
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sc->mux_mask = ((1 << clkdef->mux_width) - 1) << sc->mux_shift;
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@ -38,7 +38,6 @@ struct aw_clk_nm_def {
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struct aw_clk_factor m;
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struct aw_clk_factor n;
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struct aw_clk_factor prediv;
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struct aw_clk_frac frac;
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uint32_t mux_shift;
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uint32_t mux_width;
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