Deorbit the IEEE-488/GPIB support.
This commit is contained in:
Poul-Henning Kamp
parent
c93be3714d
commit
c05bafc566
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=276214
@ -38,6 +38,29 @@
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# xargs -n1 | sort | uniq -d;
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# done
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# 20141226: Remove gpib/ieee488
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OLD_FILES+=usr/include/dev/ieee488/ibfoo_int.h
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OLD_FILES+=usr/include/dev/ieee488/tnt4882.h
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OLD_FILES+=usr/include/dev/ieee488/ugpib.h
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OLD_FILES+=usr/include/dev/ieee488/upd7210.h
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OLD_DIRS+=usr/include/dev/ieee488
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OLD_FILES+=usr/include/gpib/gpib.h
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OLD_DIRS+=usr/include/gpib
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OLD_FILES+=usr/lib/libgpib.a
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OLD_FILES+=usr/lib/libgpib_p.a
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OLD_FILES+=usr/lib/libgpib.so
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OLD_LIBS+=usr/lib/libgpib.so.3
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OLD_FILES+=usr/lib/libgpib_p.a
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OLD_FILES+=share/man/man4/pcii.4.gz
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OLD_FILES+=share/man/man4/gpib.4.gz
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OLD_FILES+=share/man/man4/tnt4882.4.gz
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.if ${TARGET_ARCH} == "amd64" || ${TARGET_ARCH} == "powerpc64"
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OLD_FILES+=usr/lib32/libgpib.a
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OLD_FILES+=usr/lib32/libgpib_p.a
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OLD_FILES+=usr/lib32/libgpib.so
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OLD_LIBS+=usr/lib32/libgpib.so.3
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.endif
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# 20141224: libxo moved to /lib
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OLD_LIBS+=usr/lib/libxo.so.0
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# 20141223: remove in6_gif.h, in_gif.h and if_stf.h
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@ -42,7 +42,7 @@ LDIRS= bsm cam geom net net80211 netgraph netinet netinet6 \
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LSUBDIRS= cam/ata cam/scsi \
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dev/acpica dev/agp dev/an dev/bktr dev/ciss dev/filemon dev/firewire \
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dev/hwpmc \
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dev/ic dev/iicbus ${_dev_ieee488} dev/io dev/lmc dev/mfi dev/nvme \
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dev/ic dev/iicbus dev/io dev/lmc dev/mfi dev/nvme \
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dev/ofw dev/pbio dev/pci ${_dev_powermac_nvram} dev/ppbus dev/smbus \
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dev/speaker dev/usb dev/utopia dev/vkbd dev/wi \
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fs/cuse \
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@ -63,10 +63,6 @@ LSUBSUBDIRS= dev/mpt/mpilib
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_dev_powermac_nvram= dev/powermac_nvram
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.endif
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.if ${MK_GPIB} != "no"
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_dev_ieee488= dev/ieee488
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.endif
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.if ${MK_GSSAPI} != "no"
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SUBDIR+= gssapi
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INCS+= gssapi.h
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@ -52,7 +52,6 @@ SUBDIR= ${SUBDIR_ORDERED} \
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libfetch \
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libfigpar \
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libgeom \
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${_libgpib} \
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libgpio \
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${_libgssapi} \
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${_librpcsec_gss} \
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@ -195,10 +194,6 @@ _cuse= libcuse
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_libelftc= libelftc
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.endif
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.if ${MK_GPIB} != "no"
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_libgpib= libgpib
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.endif
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.if ${MK_GSSAPI} != "no"
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_libgssapi= libgssapi
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_librpcsec_gss= librpcsec_gss
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@ -156,7 +156,6 @@ MAN= aac.4 \
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geom_uncompress.4 \
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geom_uzip.4 \
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gif.4 \
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gpib.4 \
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gpio.4 \
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gpioiic.4 \
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gpioled.4 \
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@ -372,7 +371,6 @@ MAN= aac.4 \
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pci.4 \
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pcib.4 \
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pcic.4 \
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pcii.4 \
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pcm.4 \
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pcn.4 \
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${_pf.4} \
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@ -495,7 +493,6 @@ MAN= aac.4 \
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ti.4 \
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timecounters.4 \
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tl.4 \
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tnt4882.4 \
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${_tpm.4} \
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trm.4 \
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tty.4 \
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@ -1,100 +0,0 @@
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.\" Copyright (c) 2010, Joerg Wunsch
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd January 24, 2010
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.Dt GPIB 4
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.Os
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.Sh NAME
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.Nm gpib
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.Nd General-Purpose Instrument Bus (GPIB) driver
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.Sh SYNOPSIS
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Either of the
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.Xr pcii 4
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or
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.Xr tnt4882 4
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drivers use this driver as the backend.
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.Sh DESCRIPTION
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The
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.Nm
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driver provides support for driving an IEEE-488 bus, also called
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IEC-625 (or just "IEC bus"), or HP-IB (Hewlett Packard Instrument
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Bus), or GPIB (General Purpose Instrument Bus).
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The device can become either a listener, talker, controller, and
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in particular a master controller on the bus.
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.Ss Example
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The following example code queries the device provided as
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.Va argv[1]
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for its identification response.
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.Bd -literal
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/* compile with: cc -O -o ibtest ibtest.c -lgpib */
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#include <stdio.h>
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#include <stdlib.h>
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#include <err.h>
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#include <vis.h>
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#include <gpib/gpib.h>
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int
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main(int argc, char **argv)
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{
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int dmm;
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unsigned char buf[100];
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char vbuf[sizeof(buf) * 4];
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/* DVM */
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dmm = ibdev(0, (argc > 1? atoi(argv[1]): 7), 0,
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T10s, 1, 0);
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if (dmm < 0)
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errx(1, "ibdev = %d\\n", dmm);
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ibwrt(dmm, "*IDN?\\r\\n", 7);
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ibrd(dmm, buf, sizeof(buf) - 1);
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strvisx(vbuf, buf, ibcnt, VIS_WHITE | VIS_CSTYLE);
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printf("%s\\n", vbuf);
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return (0);
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}
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.Ed
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.Sh FILES
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.Bl -tag -width /dev/gpibNNib
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.It Pa /dev/gpib Ns Em N Ns "ib"
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Main device node to access the driver.
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.It Pa /dev/gpib Ns Em N Ns "l"
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Listen-only entry to the driver.
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When opening, an instrument can send data to this device on the
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bus in an unaddressed mode, for example hard-copy printer data.
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.El
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.Sh SEE ALSO
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.Xr gpib 3 ,
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.Xr pcii 4 ,
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.Xr tnt4882 4
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.Sh HISTORY
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The
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.Nm
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driver was written by Poul-Henning Kamp, and first appeared in
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.Fx 5.4 .
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.Sh AUTHORS
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This manual page was written by
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.An J\(:org Wunsch .
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@ -1,97 +0,0 @@
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.\" Copyright (c) 2010, Joerg Wunsch
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
|
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd January 24, 2010
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.Dt PCII 4
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.Os
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.Sh NAME
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.Nm pcii
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.Nd National Instruments PCIIA GPIB controller driver
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.Sh SYNOPSIS
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.Cd "device pcii"
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.Pp
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In
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.Pa /boot/device.hints :
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.Cd hint.pcii.0.at="isa"
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.Cd hint.pcii.0.port="0x2e1"
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.Cd hint.pcii.0.irq="7"
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.Cd hint.pcii.0.drq="1"
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.Sh DESCRIPTION
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The
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.Nm
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driver provides support for driving an IEEE-488 bus, also called
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IEC-625 (or just "IEC bus"), or HP-IB (Hewlett Packard Instrument
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Bus), or GPIB (General Purpose Instrument Bus).
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The driver supports National Instruments PCIIA cards (sometimes
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also referred to as PC2A) and compatibles.
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These cards use a NEC \(mcPD7210 controller IC as the main
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interface between the host computer and the instrument bus.
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.Ss IO memory space layout
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The PCIIA cards use a very specific IO memory space allocation layout.
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The address bits A0 through A9 (which have traditionally been the only
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address bits evaluated on IBM PC XT extension cards) are hardwired to
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address 0x2e1.
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Bits A10 through A12 are used by the \(mcPD7210 register select lines.
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This makes the individual 7210 registers being 0x400 bytes apart in the
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ISA bus address space.
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Address bits A13 and A14 are compared to a DIP switch setting on the
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card, allowing for up to 4 different cards being installed (at base
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addresses 0x2e1, 0x22e1, 0x42e1, and 0x62e1, respectively).
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A15 has been used to select an optional on-board time-of-day clock
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chip (MM58167A) on the original PCIIA rather than the \(mcPD7210
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(which is not implemented on later boards and clones).
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Finally, the IO addresses 0x2f0 ... 0x2f7 are used for a
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.Em special interrupt handling feature
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(re-enable interrupts so the IRQ can be shared), where actually only
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address 0x2f0 plus the actual IRQ level is required for each card.
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Some clones do not appear to require this special IRQ handling, and
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are thus likely to not support the shared IRQ feature.
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.Pp
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Only the base address of the card needs to be specified in the ISA
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device hints; the driver takes care to derive all other IO addresses
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needed during the probe phase.
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.Ss Supported cards
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The following cards are known to be supported:
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.Bl -bullet -offset indent
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.It
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B&C Microsystems PC488A-0
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.It
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National Instruments GPIB-PCII/PCIIA (in PCIIa mode)
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.It
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Axiom AX5488
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.El
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.Sh SEE ALSO
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.Xr gpib 3 ,
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.Xr gpib 4 ,
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.Xr device.hints 5
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.Sh HISTORY
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The
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.Nm
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driver was written by Poul-Henning Kamp, and first appeared in
|
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.Fx 5.4 .
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.Sh AUTHORS
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This manual page was written by
|
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.An J\(:org Wunsch .
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@ -1,55 +0,0 @@
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.\" Copyright (c) 2010, Joerg Wunsch
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.\" All rights reserved.
|
||||
.\"
|
||||
.\" Redistribution and use in source and binary forms, with or without
|
||||
.\" modification, are permitted provided that the following conditions
|
||||
.\" are met:
|
||||
.\" 1. Redistributions of source code must retain the above copyright
|
||||
.\" notice, this list of conditions and the following disclaimer.
|
||||
.\" 2. Redistributions in binary form must reproduce the above copyright
|
||||
.\" notice, this list of conditions and the following disclaimer in the
|
||||
.\" documentation and/or other materials provided with the distribution.
|
||||
.\"
|
||||
.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
.\" SUCH DAMAGE.
|
||||
.\"
|
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.\" $FreeBSD$
|
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.\"
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.Dd January 24, 2010
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.Dt TNT4882 4
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.Os
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.Sh NAME
|
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.Nm tnt4882
|
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.Nd National Instruments TNT4882A GPIB controller driver
|
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.Sh SYNOPSIS
|
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.Cd "device tnt4882"
|
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.Sh DESCRIPTION
|
||||
The
|
||||
.Nm
|
||||
driver provides support for driving an IEEE-488 bus, also called
|
||||
IEC-625 (or just "IEC bus"), or HP-IB (Hewlett Packard Instrument
|
||||
Bus), or GPIB (General Purpose Instrument Bus).
|
||||
The driver supports National Instruments PCI GPIB cards using
|
||||
the TNT4882 bus interface chip.
|
||||
This chip emulates a NEC \(mcPD7210 controller IC as the main
|
||||
interface between the host computer and the instrument bus.
|
||||
.Sh SEE ALSO
|
||||
.Xr gpib 3 ,
|
||||
.Xr gpib 4
|
||||
.Sh HISTORY
|
||||
The
|
||||
.Nm
|
||||
driver was written by Poul-Henning Kamp, and first appeared in
|
||||
.Fx 5.4 .
|
||||
.Sh AUTHORS
|
||||
This manual page was written by
|
||||
.An J\(:org Wunsch .
|
||||
@ -85,7 +85,6 @@ __DEFAULT_YES_OPTIONS = \
|
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GDB \
|
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GNU \
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GNU_GREP_COMPAT \
|
||||
GPIB \
|
||||
GPIO \
|
||||
GPL_DTC \
|
||||
GROFF \
|
||||
|
||||
@ -2353,19 +2353,6 @@ options SND_FEEDER_RATE_HP
|
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options SND_PCM_64
|
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options SND_OLDSTEREO
|
||||
|
||||
#
|
||||
# IEEE-488 hardware:
|
||||
# pcii: PCIIA cards (uPD7210 based isa cards)
|
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# tnt4882: National Instruments PCI-GPIB card.
|
||||
|
||||
device pcii
|
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hint.pcii.0.at="isa"
|
||||
hint.pcii.0.port="0x2e1"
|
||||
hint.pcii.0.irq="5"
|
||||
hint.pcii.0.drq="1"
|
||||
|
||||
device tnt4882
|
||||
|
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#
|
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# Miscellaneous hardware:
|
||||
#
|
||||
|
||||
@ -1448,10 +1448,6 @@ dev/ida/ida_eisa.c optional ida eisa
|
||||
dev/ida/ida_pci.c optional ida pci
|
||||
dev/ie/if_ie.c optional ie isa nowerror
|
||||
dev/ie/if_ie_isa.c optional ie isa
|
||||
dev/ieee488/ibfoo.c optional pcii | tnt4882
|
||||
dev/ieee488/pcii.c optional pcii
|
||||
dev/ieee488/tnt4882.c optional tnt4882
|
||||
dev/ieee488/upd7210.c optional pcii | tnt4882
|
||||
dev/iicbus/ad7418.c optional ad7418
|
||||
dev/iicbus/ds133x.c optional ds133x
|
||||
dev/iicbus/ds1374.c optional ds1374
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,147 +0,0 @@
|
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/*-
|
||||
* Copyright (c) 2005 Poul-Henning Kamp
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* This file defines the ABI between the userland gpib library and the
|
||||
* kernel. This file should not be used anywhere else.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#include <sys/ioccom.h>
|
||||
|
||||
typedef void ibsrq_t(void);
|
||||
enum ibfoo_id {
|
||||
__ID_INVALID = 0,
|
||||
__ID_IBASK,
|
||||
__ID_IBBNA,
|
||||
__ID_IBCAC,
|
||||
__ID_IBCLR,
|
||||
__ID_IBCMD,
|
||||
__ID_IBCMDA,
|
||||
__ID_IBCONFIG,
|
||||
__ID_IBDEV,
|
||||
__ID_IBDIAG,
|
||||
__ID_IBDMA,
|
||||
__ID_IBEOS,
|
||||
__ID_IBEOT,
|
||||
__ID_IBEVENT,
|
||||
__ID_IBFIND,
|
||||
__ID_IBGTS,
|
||||
__ID_IBIST,
|
||||
__ID_IBLINES,
|
||||
__ID_IBLLO,
|
||||
__ID_IBLN,
|
||||
__ID_IBLOC,
|
||||
__ID_IBONL,
|
||||
__ID_IBPAD,
|
||||
__ID_IBPCT,
|
||||
__ID_IBPOKE,
|
||||
__ID_IBPPC,
|
||||
__ID_IBRD,
|
||||
__ID_IBRDA,
|
||||
__ID_IBRDF,
|
||||
__ID_IBRDKEY,
|
||||
__ID_IBRPP,
|
||||
__ID_IBRSC,
|
||||
__ID_IBRSP,
|
||||
__ID_IBRSV,
|
||||
__ID_IBSAD,
|
||||
__ID_IBSGNL,
|
||||
__ID_IBSIC,
|
||||
__ID_IBSRE,
|
||||
__ID_IBSRQ,
|
||||
__ID_IBSTOP,
|
||||
__ID_IBTMO,
|
||||
__ID_IBTRAP,
|
||||
__ID_IBTRG,
|
||||
__ID_IBWAIT,
|
||||
__ID_IBWRT,
|
||||
__ID_IBWRTA,
|
||||
__ID_IBWRTF,
|
||||
__ID_IBWRTKEY,
|
||||
__ID_IBXTRC
|
||||
};
|
||||
|
||||
#define __F_HANDLE (1 << 0)
|
||||
#define __F_SPR (1 << 1)
|
||||
#define __F_BUFFER (1 << 2)
|
||||
#define __F_RETVAL (1 << 3)
|
||||
#define __F_BDNAME (1 << 4)
|
||||
#define __F_MASK (1 << 5)
|
||||
#define __F_PADVAL (1 << 6)
|
||||
#define __F_SADVAL (1 << 7)
|
||||
#define __F_CNT (1 << 8)
|
||||
#define __F_TMO (1 << 9)
|
||||
#define __F_EOS (1 << 10)
|
||||
#define __F_PPR (1 << 11)
|
||||
#define __F_EOT (1 << 12)
|
||||
#define __F_V (1 << 13)
|
||||
#define __F_VALUE (1 << 14)
|
||||
#define __F_SAD (1 << 15)
|
||||
#define __F_BOARDID (1 << 16)
|
||||
#define __F_OPTION (1 << 17)
|
||||
#define __F_FLNAME (1 << 18)
|
||||
#define __F_FUNC (1 << 19)
|
||||
#define __F_LINES (1 << 20)
|
||||
#define __F_PAD (1 << 21)
|
||||
#define __F_MODE (1 << 22)
|
||||
#define __F_LISTENFLAG (1 << 23)
|
||||
#define __F_EVENT (1 << 24)
|
||||
|
||||
struct ibarg {
|
||||
enum ibfoo_id __ident;
|
||||
unsigned int __field;
|
||||
int __retval;
|
||||
int __ibsta;
|
||||
int __iberr;
|
||||
int __ibcnt;
|
||||
int handle;
|
||||
char * spr;
|
||||
void * buffer;
|
||||
int * retval;
|
||||
char * bdname;
|
||||
int mask;
|
||||
int padval;
|
||||
int sadval;
|
||||
long cnt;
|
||||
int tmo;
|
||||
int eos;
|
||||
char * ppr;
|
||||
int eot;
|
||||
int v;
|
||||
int value;
|
||||
int sad;
|
||||
int boardID;
|
||||
int option;
|
||||
char * flname;
|
||||
ibsrq_t * func;
|
||||
short * lines;
|
||||
int pad;
|
||||
int mode;
|
||||
short * listenflag;
|
||||
short * event;
|
||||
};
|
||||
|
||||
#define GPIB_IBFOO _IOWR(4, 0, struct ibarg)
|
||||
@ -1,255 +0,0 @@
|
||||
/*-
|
||||
* Copyright (c) 2005 Poul-Henning Kamp <phk@FreeBSD.org>
|
||||
* Copyright (c) 2010 Joerg Wunsch <joerg@FreeBSD.org>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* Driver for GPIB cards based on NEC µPD7210 and compatibles.
|
||||
*
|
||||
* This driver just hooks up to the hardware and leaves all the interesting
|
||||
* stuff to upd7210.c.
|
||||
*
|
||||
* Supported hardware:
|
||||
* PCIIA compatible cards.
|
||||
*
|
||||
* Tested and known working:
|
||||
* "B&C Microsystems PC488A-0"
|
||||
* "National Instruments GPIB-PCII/PCIIA" (in PCIIa mode)
|
||||
* "Axiom AX5488"
|
||||
*
|
||||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__FBSDID("$FreeBSD$");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/lock.h>
|
||||
#include <sys/mutex.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/module.h>
|
||||
#include <sys/bus.h>
|
||||
#include <machine/bus.h>
|
||||
#include <machine/resource.h>
|
||||
#include <sys/rman.h>
|
||||
#include <isa/isavar.h>
|
||||
|
||||
#define UPD7210_HW_DRIVER
|
||||
#include <dev/ieee488/upd7210.h>
|
||||
|
||||
struct pcii_softc {
|
||||
int foo;
|
||||
struct resource *res[11];
|
||||
void *intr_handler;
|
||||
struct upd7210 upd7210;
|
||||
};
|
||||
|
||||
static devclass_t pcii_devclass;
|
||||
|
||||
static int pcii_probe(device_t dev);
|
||||
static int pcii_attach(device_t dev);
|
||||
|
||||
static device_method_t pcii_methods[] = {
|
||||
DEVMETHOD(device_probe, pcii_probe),
|
||||
DEVMETHOD(device_attach, pcii_attach),
|
||||
DEVMETHOD(device_suspend, bus_generic_suspend),
|
||||
DEVMETHOD(device_resume, bus_generic_resume),
|
||||
|
||||
{ 0, 0 }
|
||||
};
|
||||
|
||||
static struct resource_spec pcii_res_spec[] = {
|
||||
{ SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE},
|
||||
{ SYS_RES_DRQ, 0, RF_ACTIVE | RF_SHAREABLE | RF_OPTIONAL},
|
||||
{ SYS_RES_IOPORT, 0, RF_ACTIVE},
|
||||
{ SYS_RES_IOPORT, 1, RF_ACTIVE},
|
||||
{ SYS_RES_IOPORT, 2, RF_ACTIVE},
|
||||
{ SYS_RES_IOPORT, 3, RF_ACTIVE},
|
||||
{ SYS_RES_IOPORT, 4, RF_ACTIVE},
|
||||
{ SYS_RES_IOPORT, 5, RF_ACTIVE},
|
||||
{ SYS_RES_IOPORT, 6, RF_ACTIVE},
|
||||
{ SYS_RES_IOPORT, 7, RF_ACTIVE},
|
||||
{ SYS_RES_IOPORT, 8, RF_ACTIVE | RF_SHAREABLE},
|
||||
{ -1, 0, 0 }
|
||||
};
|
||||
|
||||
static driver_t pcii_driver = {
|
||||
"pcii",
|
||||
pcii_methods,
|
||||
sizeof(struct pcii_softc),
|
||||
};
|
||||
|
||||
static int
|
||||
pcii_probe(device_t dev)
|
||||
{
|
||||
int rid, i, j;
|
||||
u_long start, count, addr;
|
||||
int error = 0;
|
||||
struct pcii_softc *sc;
|
||||
|
||||
device_set_desc(dev, "PCII IEEE-4888 controller");
|
||||
sc = device_get_softc(dev);
|
||||
|
||||
rid = 0;
|
||||
if (bus_get_resource(dev, SYS_RES_IOPORT, rid, &start, &count) != 0)
|
||||
return ENXIO;
|
||||
/*
|
||||
* The PCIIA decodes a fixed pattern of 0x2e1 for the lower 10
|
||||
* address bits A0 ... A9. Bits A10 through A12 are used by
|
||||
* the µPD7210 register select lines. This makes the
|
||||
* individual 7210 register being 0x400 bytes apart in the ISA
|
||||
* bus address space. Address bits A13 and A14 are compared
|
||||
* to a DIP switch setting on the card, allowing for up to 4
|
||||
* different cards being installed (at base addresses 0x2e1,
|
||||
* 0x22e1, 0x42e1, and 0x62e1, respectively). A15 has been
|
||||
* used to select an optional on-board time-of-day clock chip
|
||||
* (MM58167A) on the original PCIIA rather than the µPD7210
|
||||
* (which is not implemented on later boards). The
|
||||
* documentation states the respective addresses for that chip
|
||||
* should be handled as reserved addresses, which we don't do
|
||||
* (right now). Finally, the IO addresses 0x2f0 ... 0x2f7 for
|
||||
* a "special interrupt handling feature" (re-enable
|
||||
* interrupts so the IRQ can be shared).
|
||||
*
|
||||
* Usually, the user will only set the base address in the
|
||||
* device hints, so we handle the rest here.
|
||||
*
|
||||
* (Source: GPIB-PCIIA Technical Reference Manual, September
|
||||
* 1989 Edition, National Instruments.)
|
||||
*/
|
||||
if ((start & 0x3ff) != 0x2e1) {
|
||||
if (bootverbose)
|
||||
printf("pcii_probe: PCIIA base address 0x%lx not "
|
||||
"0x2e1/0x22e1/0x42e1/0x62e1\n",
|
||||
start);
|
||||
return (ENXIO);
|
||||
}
|
||||
|
||||
for (rid = 0, addr = start; rid < 8; rid++, addr += 0x400) {
|
||||
if (bus_set_resource(dev, SYS_RES_IOPORT, rid, addr, 1) != 0) {
|
||||
printf("pcii_probe: could not set IO port 0x%lx\n",
|
||||
addr);
|
||||
return (ENXIO);
|
||||
}
|
||||
}
|
||||
if (bus_get_resource(dev, SYS_RES_IRQ, 0, &start, &count) != 0) {
|
||||
printf("pcii_probe: cannot obtain IRQ level\n");
|
||||
return ENXIO;
|
||||
}
|
||||
if (start > 7) {
|
||||
printf("pcii_probe: IRQ level %lu too high\n", start);
|
||||
return ENXIO;
|
||||
}
|
||||
|
||||
if (bus_set_resource(dev, SYS_RES_IOPORT, 8, 0x2f0 + start, 1) != 0) {
|
||||
printf("pcii_probe: could not set IO port 0x%3lx\n",
|
||||
0x2f0 + start);
|
||||
return (ENXIO);
|
||||
}
|
||||
|
||||
error = bus_alloc_resources(dev, pcii_res_spec, sc->res);
|
||||
if (error) {
|
||||
printf("pcii_probe: Could not allocate resources\n");
|
||||
return (error);
|
||||
}
|
||||
error = ENXIO;
|
||||
/*
|
||||
* Perform some basic tests on the µPD7210 registers. At
|
||||
* least *some* register must read different from 0x00 or
|
||||
* 0xff.
|
||||
*/
|
||||
for (i = 0; i < 8; i++) {
|
||||
j = bus_read_1(sc->res[2 + i], 0);
|
||||
if (j != 0x00 && j != 0xff)
|
||||
error = 0;
|
||||
}
|
||||
/* SPSR/SPMR read/write test */
|
||||
if (!error) {
|
||||
bus_write_1(sc->res[2 + 3], 0, 0x55);
|
||||
if (bus_read_1(sc->res[2 + 3], 0) != 0x55)
|
||||
error = ENXIO;
|
||||
}
|
||||
if (!error) {
|
||||
bus_write_1(sc->res[2 + 3], 0, 0xaa);
|
||||
if (bus_read_1(sc->res[2 + 3], 0) != 0xaa)
|
||||
error = ENXIO;
|
||||
}
|
||||
if (error)
|
||||
printf("pcii_probe: probe failure\n");
|
||||
|
||||
bus_release_resources(dev, pcii_res_spec, sc->res);
|
||||
return (error);
|
||||
}
|
||||
|
||||
static int
|
||||
pcii_attach(device_t dev)
|
||||
{
|
||||
struct pcii_softc *sc;
|
||||
u_long start, count;
|
||||
int unit;
|
||||
int rid;
|
||||
int error = 0;
|
||||
|
||||
unit = device_get_unit(dev);
|
||||
sc = device_get_softc(dev);
|
||||
memset(sc, 0, sizeof *sc);
|
||||
|
||||
device_set_desc(dev, "PCII IEEE-4888 controller");
|
||||
|
||||
if (bus_get_resource(dev, SYS_RES_IRQ, 0, &start, &count) != 0) {
|
||||
printf("pcii_attach: cannot obtain IRQ number\n");
|
||||
return ENXIO;
|
||||
}
|
||||
|
||||
error = bus_alloc_resources(dev, pcii_res_spec, sc->res);
|
||||
if (error)
|
||||
return (error);
|
||||
|
||||
error = bus_setup_intr(dev, sc->res[0],
|
||||
INTR_TYPE_MISC | INTR_MPSAFE, NULL,
|
||||
upd7210intr, &sc->upd7210, &sc->intr_handler);
|
||||
if (error) {
|
||||
bus_release_resources(dev, pcii_res_spec, sc->res);
|
||||
return (error);
|
||||
}
|
||||
|
||||
for (rid = 0; rid < 8; rid++) {
|
||||
sc->upd7210.reg_res[rid] = sc->res[2 + rid];
|
||||
sc->upd7210.reg_offset[rid] = 0;
|
||||
}
|
||||
sc->upd7210.irq_clear_res = sc->res[10];
|
||||
sc->upd7210.use_fifo = 0;
|
||||
|
||||
if (sc->res[1] == NULL)
|
||||
sc->upd7210.dmachan = -1;
|
||||
else
|
||||
sc->upd7210.dmachan = rman_get_start(sc->res[1]);
|
||||
|
||||
upd7210attach(&sc->upd7210);
|
||||
device_printf(dev, "attached gpib%d\n", sc->upd7210.unit);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
DRIVER_MODULE(pcii, isa, pcii_driver, pcii_devclass, 0, 0);
|
||||
DRIVER_MODULE(pcii, acpi, pcii_driver, pcii_devclass, 0, 0);
|
||||
@ -1,320 +0,0 @@
|
||||
/*-
|
||||
* Copyright (c) 2005 Poul-Henning Kamp
|
||||
* Copyright (c) 2010 Joerg Wunsch
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/module.h>
|
||||
#include <sys/bus.h>
|
||||
#include <dev/pci/pcireg.h>
|
||||
#include <dev/pci/pcivar.h>
|
||||
|
||||
#include <machine/bus.h>
|
||||
#include <machine/resource.h>
|
||||
#include <machine/stdarg.h>
|
||||
#include <sys/rman.h>
|
||||
|
||||
/* vtophys */
|
||||
#include <vm/vm.h>
|
||||
#include <vm/pmap.h>
|
||||
#include <machine/pmap.h>
|
||||
|
||||
#define UPD7210_HW_DRIVER 1
|
||||
#include <dev/ieee488/upd7210.h>
|
||||
#include <dev/ieee488/tnt4882.h>
|
||||
|
||||
struct tnt_softc {
|
||||
int foo;
|
||||
struct upd7210 upd7210;
|
||||
|
||||
struct resource *res[3];
|
||||
void *intr_handler;
|
||||
};
|
||||
|
||||
static struct resource_spec tnt_res_spec[] = {
|
||||
{ SYS_RES_MEMORY, PCIR_BAR(0), RF_ACTIVE},
|
||||
{ SYS_RES_MEMORY, PCIR_BAR(1), RF_ACTIVE},
|
||||
{ SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE},
|
||||
{ -1, 0 }
|
||||
};
|
||||
|
||||
struct tst {
|
||||
enum {RD, WT, xDELAY, END}
|
||||
action;
|
||||
enum tnt4882reg reg;
|
||||
uint8_t val;
|
||||
};
|
||||
|
||||
/*
|
||||
* From NI Application note 095:
|
||||
* Writing Functional Self-Tests for the TNT4882 GPIB Interface Chip
|
||||
* XXX: fill in the rest ?
|
||||
*/
|
||||
static struct tst tst_reset[] = {
|
||||
{WT, tauxcr, 0x80}, /* chip reset if in 9914 mode */
|
||||
{WT, auxmr, 0x80}, /* swrst if swapped */
|
||||
{WT, tauxcr, 0x99}, /* switch to 7210 mode */
|
||||
{WT, auxmr, 0x99}, /* switch to 7210 mode if swapped */
|
||||
{WT, auxmr, 0x02}, /* execute chip reset */
|
||||
{WT, keyreg, 0x00}, /* important! clear the swap bit */
|
||||
{WT, eosr, 0x00}, /* clear EOS register */
|
||||
{WT, cdor, 0x00}, /* clear data lines */
|
||||
{WT, imr1, 0x00}, /* disable all interrupts */
|
||||
{WT, imr2, 0x00},
|
||||
{WT, imr0, 0x80},
|
||||
{WT, adr, 0x80},
|
||||
{WT, adr, 0x00},
|
||||
{WT, admr, 0x00}, /* clear addressing modes */
|
||||
{WT, auxmr, 0x00}, /* release from idle state with pon */
|
||||
{WT, auxmr, 0x60}, /* reset ppr */
|
||||
{WT, bcr, 0x00}, /* reset bcr */
|
||||
{WT, misc, 0x04}, /* set wrap plug bit */
|
||||
{WT, cmdr, 0xB2}, /* issue soft reset */
|
||||
{WT, hssel, 0x00}, /* select two-chip mode */
|
||||
{END, 0, 0}
|
||||
};
|
||||
|
||||
static struct tst tst_read_reg[] = {
|
||||
{RD, isr1, 0x00}, /* Verify mask registers are clear */
|
||||
{RD, isr2, 0x00},
|
||||
{RD, adsr, 0x40}, /* Verify ATN is not asserted */
|
||||
{RD, adr0, 0x00}, /* Verify Primary address not set */
|
||||
{RD, adr1, 0x00}, /* Verify Secondary address not set */
|
||||
{RD, sts1, 0x8B}, /* Verify DONE, STOP, HALT, and GSYNC set */
|
||||
{RD, isr3, 0x19}, /* Verify STOP, Not Full FIFO, & DONE set */
|
||||
{RD, sts2, 0x9A}, /* Verify FIFO A/B is empty */
|
||||
{RD, sasr, 0x00}, /* Verify clear */
|
||||
{RD, isr0, 0x01}, /* Verify SYNC bit is set */
|
||||
{END, 0, 0}
|
||||
};
|
||||
|
||||
static struct tst tst_bsr_dcr[] = {
|
||||
{WT, bcr, 0x55}, /* Set DAV, NRFD, SRQ, and REN */
|
||||
{WT, dcr, 0xAA}, /* Write pattern to GPIB data lines */
|
||||
{RD, bsr, 0x55}, /* Verify DAV, NRFD, SRQ, and REN are set */
|
||||
{RD, dsr, 0xAA}, /* Verify data pattern written previously */
|
||||
{WT, bcr, 0xAA}, /* Set ATN, NDAC, EOI, & IFC */
|
||||
{WT, dcr, 0x55}, /* Write pattern to GPIB data lines */
|
||||
{RD, bsr, 0xAA}, /* Verify ATN, NDAC, EOI, & IFC are set */
|
||||
{RD, dsr, 0x55}, /* Verify data pattern written previously */
|
||||
{WT, bcr, 0x00}, /* Clear control lines */
|
||||
{WT, dcr, 0x00}, /* Clear data lines */
|
||||
{RD, bsr, 0x00}, /* Verify control lines are clear */
|
||||
{RD, dsr, 0x00}, /* Verify data lines are clear */
|
||||
{END, 0, 0}
|
||||
};
|
||||
|
||||
static struct tst tst_adr0_1[] = {
|
||||
{WT, adr, 0x55}, /* Set Primary talk address */
|
||||
{WT, adr, 0xAA}, /* Set Secondary listen address */
|
||||
{RD, adr0, 0x55}, /* Read Primary address */
|
||||
{RD, adr1, 0x2A}, /* Read Secondary address */
|
||||
{WT, adr, 0x2A}, /* Set Primay listen address */
|
||||
{WT, adr, 0xD5}, /* Set Secondary talk address */
|
||||
{RD, adr0, 0x2A}, /* Read Primary address */
|
||||
{RD, adr1, 0x55}, /* Read Secondary address */
|
||||
{END, 0, 0}
|
||||
};
|
||||
|
||||
static struct tst tst_cdor_dir[] = {
|
||||
{WT, admr, 0xF0}, /* program AT-GPIB as talker only and
|
||||
* listener only */
|
||||
{RD, isr1, 0x02}, /* check DO bit set */
|
||||
{RD, adsr, 0x46}, /* check AT-GPIB is both talker active
|
||||
* and listener active */
|
||||
{WT, cdor, 0xAA}, /* write out data byte */
|
||||
{xDELAY, 0, 1}, /* One ISA I/O Cycle (500-ns) */
|
||||
{RD, isr1, 0x03}, /* check DO and DI bits set */
|
||||
{RD, dir, 0xAA}, /* verify data received */
|
||||
{WT, cdor, 0x55}, /* write out data byte */
|
||||
{xDELAY, 0, 1}, /* One ISA I/O Cycle (500-ns) */
|
||||
{RD, dir, 0x55}, /* verify data received */
|
||||
{END, 0, 0}
|
||||
};
|
||||
|
||||
static struct tst tst_spmr_spsr[] = {
|
||||
{WT, spsr, 0x00}, /* Write pattern to SPSR register */
|
||||
{RD, spmr, 0x00}, /* Read back previously written pattern */
|
||||
{WT, spsr, 0xBF}, /* Write pattern to SPSR register */
|
||||
{RD, spmr, 0xBF}, /* Read back previously written pattern */
|
||||
{END, 0, 0}
|
||||
};
|
||||
|
||||
static struct tst tst_count0_1[] = {
|
||||
{WT, cnt0, 0x55}, /* Verify every other bit can be set */
|
||||
{WT, cnt1, 0xAA},
|
||||
{RD, cnt0, 0x55}, /* Read back previously written pattern */
|
||||
{RD, cnt1, 0xAA},
|
||||
{WT, cnt0, 0xAA}, /* Verify every other bit can be set */
|
||||
{WT, cnt1, 0x55},
|
||||
{RD, cnt0, 0xAA}, /* Read back previously written pattern */
|
||||
{RD, cnt1, 0x55},
|
||||
{END, 0, 0}
|
||||
};
|
||||
|
||||
static int
|
||||
tst_exec(struct tnt_softc *sc, struct tst *tp, const char *name)
|
||||
{
|
||||
uint8_t u;
|
||||
int step;
|
||||
|
||||
for (step = 0; tp->action != END; tp++, step++) {
|
||||
switch (tp->action) {
|
||||
case WT:
|
||||
bus_write_1(sc->res[1], tp->reg, tp->val);
|
||||
break;
|
||||
case RD:
|
||||
u = bus_read_1(sc->res[1], tp->reg);
|
||||
if (u != tp->val) {
|
||||
printf(
|
||||
"Test %s, step %d: reg(%02x) = %02x",
|
||||
name, step, tp->reg, u);
|
||||
printf( "should have been %02x\n", tp->val);
|
||||
return (1);
|
||||
}
|
||||
break;
|
||||
case xDELAY:
|
||||
DELAY(tp->val);
|
||||
break;
|
||||
default:
|
||||
printf("Unknown action in test %s, step %d: %d\n",
|
||||
name, step, tp->action);
|
||||
return (1);
|
||||
}
|
||||
}
|
||||
if (bootverbose)
|
||||
printf("Test %s passed\n", name);
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
tnt_probe(device_t dev)
|
||||
{
|
||||
|
||||
if (pci_get_vendor(dev) == 0x1093 && pci_get_device(dev) == 0xc801) {
|
||||
device_set_desc(dev, "NI PCI-GPIB");
|
||||
return (BUS_PROBE_DEFAULT);
|
||||
}
|
||||
return (ENXIO);
|
||||
}
|
||||
|
||||
static int
|
||||
tnt_attach(device_t dev)
|
||||
{
|
||||
struct tnt_softc *sc;
|
||||
int error, i;
|
||||
uint8_t version;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
|
||||
error = bus_alloc_resources(dev, tnt_res_spec, sc->res);
|
||||
if (error)
|
||||
return (error);
|
||||
|
||||
error = bus_setup_intr(dev, sc->res[2], INTR_TYPE_MISC | INTR_MPSAFE,
|
||||
NULL, upd7210intr, &sc->upd7210, &sc->intr_handler);
|
||||
|
||||
/* IO Device Window Base Size Register (IODWBSR) */
|
||||
bus_write_4(sc->res[0], 0xc0, rman_get_start(sc->res[1]) | 0x80);
|
||||
|
||||
tst_exec(sc, tst_reset, "Reset");
|
||||
tst_exec(sc, tst_read_reg, "Read registers");
|
||||
tst_exec(sc, tst_bsr_dcr, "BSR & DCR");
|
||||
tst_exec(sc, tst_adr0_1, "ADR0,1");
|
||||
tst_exec(sc, tst_cdor_dir, "CDOR/DIR");
|
||||
tst_exec(sc, tst_spmr_spsr, "CPMR/SPSR");
|
||||
tst_exec(sc, tst_count0_1, "COUNT0:1");
|
||||
tst_exec(sc, tst_reset, "Reset");
|
||||
|
||||
version = bus_read_1(sc->res[1], csr);
|
||||
version = (version >> 4) & 0x0f;
|
||||
device_printf(dev, "Chip version 0x%02x (TNT%s)\n",
|
||||
version,
|
||||
version >= 4? "5004 or above": "4882");
|
||||
if (version >= 4) {
|
||||
device_printf(dev, "Forcing FIFO mode\n");
|
||||
sc->upd7210.use_fifo = 1;
|
||||
} else {
|
||||
sc->upd7210.use_fifo = 0;
|
||||
}
|
||||
|
||||
/* pass 7210 interrupts through */
|
||||
bus_write_1(sc->res[1], imr3, 0x02);
|
||||
|
||||
for (i = 0; i < 8; i++) {
|
||||
sc->upd7210.reg_res[i] = sc->res[1];
|
||||
sc->upd7210.reg_offset[i] = i * 2;
|
||||
}
|
||||
|
||||
/* No DMA help */
|
||||
sc->upd7210.dmachan = -1;
|
||||
|
||||
/* No "special interrupt handling" needed here. */
|
||||
sc->upd7210.irq_clear_res = NULL;
|
||||
|
||||
upd7210attach(&sc->upd7210);
|
||||
device_printf(dev, "attached gpib%d\n", sc->upd7210.unit);
|
||||
|
||||
if (sc->upd7210.use_fifo)
|
||||
bus_write_1(sc->res[0], hssel, 0x01); /* one-chip mode */
|
||||
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
tnt_detach(device_t dev)
|
||||
{
|
||||
struct tnt_softc *sc;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
bus_teardown_intr(dev, sc->res[2], sc->intr_handler);
|
||||
upd7210detach(&sc->upd7210);
|
||||
|
||||
bus_release_resources(dev, tnt_res_spec, sc->res);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static device_method_t tnt4882_methods[] = {
|
||||
DEVMETHOD(device_probe, tnt_probe),
|
||||
DEVMETHOD(device_attach, tnt_attach),
|
||||
DEVMETHOD(device_detach, tnt_detach),
|
||||
{ 0, 0 }
|
||||
};
|
||||
|
||||
static driver_t pci_gpib_driver = {
|
||||
"tnt4882",
|
||||
tnt4882_methods,
|
||||
sizeof(struct tnt_softc)
|
||||
};
|
||||
|
||||
static devclass_t pci_gpib_devclass;
|
||||
|
||||
DRIVER_MODULE(pci_gpib, pci, pci_gpib_driver, pci_gpib_devclass, 0, 0);
|
||||
@ -1,77 +0,0 @@
|
||||
/*-
|
||||
* Copyright (c) 2010 Joerg Wunsch
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
enum tnt4882reg {
|
||||
dir = 0x00,
|
||||
cdor = 0x00,
|
||||
isr1 = 0x02,
|
||||
imr1 = 0x02,
|
||||
isr2 = 0x04,
|
||||
imr2 = 0x04,
|
||||
accwr = 0x05,
|
||||
spsr = 0x06,
|
||||
spmr = 0x06,
|
||||
intr = 0x07,
|
||||
adsr = 0x08,
|
||||
admr = 0x08,
|
||||
cnt2 = 0x09,
|
||||
cptr = 0x0a,
|
||||
auxmr = 0x0a,
|
||||
tauxcr = 0x0a, /* 9914 mode register */
|
||||
cnt3 = 0x0b,
|
||||
adr0 = 0x0c,
|
||||
adr = 0x0c,
|
||||
hssel = 0x0d,
|
||||
adr1 = 0x0e,
|
||||
eosr = 0x0e,
|
||||
sts1 = 0x10,
|
||||
cfg = 0x10,
|
||||
dsr = 0x11,
|
||||
sh_cnt = 0x11,
|
||||
imr3 = 0x12,
|
||||
hier = 0x13,
|
||||
cnt0 = 0x14,
|
||||
misc = 0x15,
|
||||
cnt1 = 0x16,
|
||||
csr = 0x17,
|
||||
keyreg = 0x17,
|
||||
fifob = 0x18,
|
||||
fifoa = 0x19,
|
||||
isr3 = 0x1a,
|
||||
ccr = 0x1a,
|
||||
sasr = 0x1b,
|
||||
dcr = 0x1b,
|
||||
sts2 = 0x1c,
|
||||
cmdr = 0x1c,
|
||||
isr0 = 0x1d,
|
||||
imr0 = 0x1d,
|
||||
timer = 0x1e,
|
||||
bsr = 0x1f,
|
||||
bcr = 0x1f
|
||||
};
|
||||
|
||||
@ -1,155 +0,0 @@
|
||||
/*-
|
||||
* Copyright (c) 2005 Poul-Henning Kamp <phk@FreeBSD.org>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _DEV_IEEE488_UGPIB_H_
|
||||
#define _DEV_IEEE488_UGPIB_H_
|
||||
|
||||
/* ibfoo() return values */
|
||||
#define EDVR 0 /* System error */
|
||||
#define ECIC 1 /* Not Active Controller */
|
||||
#define ENOL 2 /* Nobody listening */
|
||||
#define EADR 3 /* Controller not addressed */
|
||||
#define EARG 4 /* Invalid argument */
|
||||
#define ESAC 5 /* Not System Controller */
|
||||
#define EABO 6 /* I/O Aborted/Time out */
|
||||
#define ENEB 7 /* No such controller */
|
||||
#define EOIP 10 /* Async I/O in progress */
|
||||
#define ECAP 11 /* No such capability */
|
||||
#define EFSO 12 /* File system error */
|
||||
#define EBUS 14 /* Command byte xfer error */
|
||||
#define ESTB 15 /* Serial poll status byte lost */
|
||||
#define ESRQ 16 /* SRQ line stuck */
|
||||
#define ETAB 20 /* Table problem */
|
||||
|
||||
/* ibsta bits */
|
||||
#define ERR (1<<15) /* Error */
|
||||
#define TIMO (1<<14) /* Timeout */
|
||||
#define END (1<<13) /* EOI/EOS */
|
||||
#define SRQI (1<<12) /* SRQ */
|
||||
#define RQS (1<<11) /* Device requests service */
|
||||
#define SPOLL (1<<10) /* Serial Poll */
|
||||
#define EVENT (1<<9) /* Event occured */
|
||||
#define CMPL (1<<8) /* I/O complete */
|
||||
#define LOK (1<<7) /* Lockout */
|
||||
#define REM (1<<6) /* Remote */
|
||||
#define CIC (1<<5) /* CIC */
|
||||
#define ATN (1<<4) /* ATN */
|
||||
#define TACS (1<<3) /* Talker */
|
||||
#define LACS (1<<2) /* Listener */
|
||||
#define DTAS (1<<1) /* Device trigger status */
|
||||
#define DCAS (1<<0) /* Device clear state */
|
||||
|
||||
/* Timeouts */
|
||||
#define TNONE 0
|
||||
#define T10us 1
|
||||
#define T30us 2
|
||||
#define T100us 3
|
||||
#define T300us 4
|
||||
#define T1ms 5
|
||||
#define T3ms 6
|
||||
#define T10ms 7
|
||||
#define T30ms 8
|
||||
#define T100ms 9
|
||||
#define T300ms 10
|
||||
#define T1s 11
|
||||
#define T3s 12
|
||||
#define T10s 13
|
||||
#define T30s 14
|
||||
#define T100s 15
|
||||
#define T300s 16
|
||||
#define T1000s 17
|
||||
|
||||
/* EOS bits */
|
||||
#define REOS (1 << 10)
|
||||
#define XEOS (1 << 11)
|
||||
#define BIN (1 << 12)
|
||||
|
||||
/* Bus commands */
|
||||
#define GTL 0x01 /* Go To Local */
|
||||
#define SDC 0x04 /* Selected Device Clear */
|
||||
#define GET 0x08 /* Group Execute Trigger */
|
||||
#define LAD 0x20 /* Listen address */
|
||||
#define UNL 0x3F /* Unlisten */
|
||||
#define TAD 0x40 /* Talk address */
|
||||
#define UNT 0x5F /* Untalk */
|
||||
|
||||
#ifndef _KERNEL
|
||||
|
||||
extern int ibcnt, iberr, ibsta;
|
||||
|
||||
int ibask(int handle, int option, int *retval);
|
||||
int ibbna(int handle, char *bdname);
|
||||
int ibcac(int handle, int v);
|
||||
int ibclr(int handle);
|
||||
int ibcmd(int handle, void *buffer, long cnt);
|
||||
int ibcmda(int handle, void *buffer, long cnt);
|
||||
int ibconfig(int handle, int option, int value);
|
||||
int ibdev(int boardID, int pad, int sad, int tmo, int eot, int eos);
|
||||
int ibdiag(int handle, void *buffer, long cnt);
|
||||
int ibdma(int handle, int v);
|
||||
int ibeos(int handle, int eos);
|
||||
int ibeot(int handle, int eot);
|
||||
int ibevent(int handle, short *event);
|
||||
int ibfind(char *bdname);
|
||||
int ibgts(int handle, int v);
|
||||
int ibist(int handle, int v);
|
||||
int iblines(int handle, short *lines);
|
||||
int ibllo(int handle);
|
||||
int ibln(int handle, int padval, int sadval, short *listenflag);
|
||||
int ibloc(int handle);
|
||||
int ibonl(int handle, int v);
|
||||
int ibpad(int handle, int pad);
|
||||
int ibpct(int handle);
|
||||
int ibpoke(int handle, int option, int value);
|
||||
int ibppc(int handle, int v);
|
||||
int ibrd(int handle, void *buffer, long cnt);
|
||||
int ibrda(int handle, void *buffer, long cnt);
|
||||
int ibrdf(int handle, char *flname);
|
||||
int ibrdkey(int handle, void *buffer, int cnt);
|
||||
int ibrpp(int handle, char *ppr);
|
||||
int ibrsc(int handle, int v);
|
||||
int ibrsp(int handle, char *spr);
|
||||
int ibrsv(int handle, int v);
|
||||
int ibsad(int handle, int sad);
|
||||
int ibsgnl(int handle, int v);
|
||||
int ibsic(int handle);
|
||||
int ibsre(int handle, int v);
|
||||
int ibsrq(void (*func)(void));
|
||||
int ibstop(int handle);
|
||||
int ibtmo(int handle, int tmo);
|
||||
int ibtrap(int mask, int mode);
|
||||
int ibtrg(int handle);
|
||||
int ibwait(int handle, int mask);
|
||||
int ibwrt(int handle, const void *buffer, long cnt);
|
||||
int ibwrta(int handle, const void *buffer, long cnt);
|
||||
int ibwrtf(int handle, const char *flname);
|
||||
int ibwrtkey(int handle, const void *buffer, int cnt);
|
||||
int ibxtrc(int handle, void *buffer, long cnt);
|
||||
#endif /* _KERNEL */
|
||||
#endif /* _DEV_IEEE488_UGPIB_H_ */
|
||||
@ -1,369 +0,0 @@
|
||||
/*-
|
||||
* Copyright (c) 2005 Poul-Henning Kamp <phk@FreeBSD.org>
|
||||
* Copyright (c) 2010 Joerg Wunsch <joerg@FreeBSD.org>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* High-level driver for µPD7210 based GPIB cards.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__FBSDID("$FreeBSD$");
|
||||
|
||||
# define GPIB_DEBUG
|
||||
# undef GPIB_DEBUG
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/conf.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/limits.h>
|
||||
#include <sys/module.h>
|
||||
#include <sys/rman.h>
|
||||
#include <sys/bus.h>
|
||||
#include <sys/lock.h>
|
||||
#include <sys/mutex.h>
|
||||
#include <sys/uio.h>
|
||||
#include <sys/time.h>
|
||||
#include <machine/bus.h>
|
||||
#include <machine/resource.h>
|
||||
#include <isa/isavar.h>
|
||||
|
||||
#define UPD7210_HW_DRIVER
|
||||
#define UPD7210_SW_DRIVER
|
||||
#include <dev/ieee488/upd7210.h>
|
||||
#include <dev/ieee488/tnt4882.h>
|
||||
|
||||
static MALLOC_DEFINE(M_GPIB, "GPIB", "GPIB");
|
||||
|
||||
/* upd7210 generic stuff */
|
||||
|
||||
void
|
||||
upd7210_print_isr(u_int isr1, u_int isr2)
|
||||
{
|
||||
printf("isr1=0x%b isr2=0x%b",
|
||||
isr1, "\20\10CPT\7APT\6DET\5ENDRX\4DEC\3ERR\2DO\1DI",
|
||||
isr2, "\20\10INT\7SRQI\6LOK\5REM\4CO\3LOKC\2REMC\1ADSC");
|
||||
}
|
||||
|
||||
u_int
|
||||
upd7210_rd(struct upd7210 *u, enum upd7210_rreg reg)
|
||||
{
|
||||
u_int r;
|
||||
|
||||
r = bus_read_1(u->reg_res[reg], u->reg_offset[reg]);
|
||||
u->rreg[reg] = r;
|
||||
return (r);
|
||||
}
|
||||
|
||||
void
|
||||
upd7210_wr(struct upd7210 *u, enum upd7210_wreg reg, u_int val)
|
||||
{
|
||||
|
||||
bus_write_1(u->reg_res[reg], u->reg_offset[reg], val);
|
||||
u->wreg[reg] = val;
|
||||
if (reg == AUXMR)
|
||||
u->wreg[8 + (val >> 5)] = val & 0x1f;
|
||||
}
|
||||
|
||||
void
|
||||
upd7210intr(void *arg)
|
||||
{
|
||||
u_int isr_1, isr_2, isr_3;
|
||||
struct upd7210 *u;
|
||||
|
||||
u = arg;
|
||||
mtx_lock(&u->mutex);
|
||||
isr_1 = upd7210_rd(u, ISR1);
|
||||
isr_2 = upd7210_rd(u, ISR2);
|
||||
if (u->use_fifo) {
|
||||
isr_3 = bus_read_1(u->reg_res[0], isr3);
|
||||
} else {
|
||||
isr_3 = 0;
|
||||
}
|
||||
if (isr_1 != 0 || isr_2 != 0 || isr_3 != 0) {
|
||||
if (u->busy == 0 || u->irq == NULL || !u->irq(u, isr_3)) {
|
||||
#if 0
|
||||
printf("upd7210intr [%02x %02x %02x",
|
||||
upd7210_rd(u, DIR), isr1, isr2);
|
||||
printf(" %02x %02x %02x %02x %02x] ",
|
||||
upd7210_rd(u, SPSR),
|
||||
upd7210_rd(u, ADSR),
|
||||
upd7210_rd(u, CPTR),
|
||||
upd7210_rd(u, ADR0),
|
||||
upd7210_rd(u, ADR1));
|
||||
upd7210_print_isr(isr1, isr2);
|
||||
printf("\n");
|
||||
#endif
|
||||
}
|
||||
/*
|
||||
* "special interrupt handling"
|
||||
*
|
||||
* In order to implement shared IRQs, the original
|
||||
* PCIIa uses IO locations 0x2f0 + (IRQ#) as an output
|
||||
* location. If an ISR for a particular card has
|
||||
* detected this card triggered the IRQ, it must reset
|
||||
* the card's IRQ by writing (anything) to that IO
|
||||
* location.
|
||||
*
|
||||
* Some clones apparently don't implement this
|
||||
* feature, but National Instrument cards do.
|
||||
*/
|
||||
if (u->irq_clear_res != NULL)
|
||||
bus_write_1(u->irq_clear_res, 0, 42);
|
||||
}
|
||||
mtx_unlock(&u->mutex);
|
||||
}
|
||||
|
||||
int
|
||||
upd7210_take_ctrl_async(struct upd7210 *u)
|
||||
{
|
||||
int i;
|
||||
|
||||
upd7210_wr(u, AUXMR, AUXMR_TCA);
|
||||
|
||||
if (!(upd7210_rd(u, ADSR) & ADSR_ATN))
|
||||
return (0);
|
||||
for (i = 0; i < 20; i++) {
|
||||
DELAY(1);
|
||||
if (!(upd7210_rd(u, ADSR) & ADSR_ATN))
|
||||
return (0);
|
||||
}
|
||||
return (1);
|
||||
}
|
||||
|
||||
int
|
||||
upd7210_goto_standby(struct upd7210 *u)
|
||||
{
|
||||
int i;
|
||||
|
||||
upd7210_wr(u, AUXMR, AUXMR_GTS);
|
||||
|
||||
if (upd7210_rd(u, ADSR) & ADSR_ATN)
|
||||
return (0);
|
||||
for (i = 0; i < 20; i++) {
|
||||
DELAY(1);
|
||||
if (upd7210_rd(u, ADSR) & ADSR_ATN)
|
||||
return (0);
|
||||
}
|
||||
return (1);
|
||||
}
|
||||
|
||||
/* Unaddressed Listen Only mode */
|
||||
|
||||
static int
|
||||
gpib_l_irq(struct upd7210 *u, int isr_3)
|
||||
{
|
||||
int i;
|
||||
int have_data = 0;
|
||||
|
||||
if (u->use_fifo) {
|
||||
/* TNT5004 or TNT4882 in FIFO mode */
|
||||
if (isr_3 & 0x04) {
|
||||
/* FIFO not empty */
|
||||
i = bus_read_1(u->reg_res[0], fifob);
|
||||
have_data = 1;
|
||||
bus_write_1(u->reg_res[0], cnt0, -1);
|
||||
bus_write_1(u->reg_res[0], cnt1, (-1) >> 8);
|
||||
bus_write_1(u->reg_res[0], cnt2, (-1) >> 16);
|
||||
bus_write_1(u->reg_res[0], cnt3, (-1) >> 24);
|
||||
bus_write_1(u->reg_res[0], cmdr, 0x04); /* GO */
|
||||
}
|
||||
} else if (u->rreg[ISR1] & 1) {
|
||||
i = upd7210_rd(u, DIR);
|
||||
have_data = 1;
|
||||
}
|
||||
|
||||
if (have_data) {
|
||||
u->buf[u->buf_wp++] = i;
|
||||
u->buf_wp &= (u->bufsize - 1);
|
||||
i = (u->buf_rp + u->bufsize - u->buf_wp) & (u->bufsize - 1);
|
||||
if (i < 8) {
|
||||
if (u->use_fifo)
|
||||
bus_write_1(u->reg_res[0], imr3, 0x00);
|
||||
else
|
||||
upd7210_wr(u, IMR1, 0);
|
||||
}
|
||||
wakeup(u->buf);
|
||||
return (1);
|
||||
}
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
gpib_l_open(struct cdev *dev, int oflags, int devtype, struct thread *td)
|
||||
{
|
||||
struct upd7210 *u;
|
||||
|
||||
u = dev->si_drv1;
|
||||
|
||||
mtx_lock(&u->mutex);
|
||||
if (u->busy) {
|
||||
mtx_unlock(&u->mutex);
|
||||
return (EBUSY);
|
||||
}
|
||||
u->busy = 1;
|
||||
u->irq = gpib_l_irq;
|
||||
mtx_unlock(&u->mutex);
|
||||
|
||||
u->buf = malloc(PAGE_SIZE, M_GPIB, M_WAITOK);
|
||||
u->bufsize = PAGE_SIZE;
|
||||
u->buf_wp = 0;
|
||||
u->buf_rp = 0;
|
||||
|
||||
upd7210_wr(u, AUXMR, AUXMR_CRST); /* chip reset */
|
||||
DELAY(10000);
|
||||
upd7210_wr(u, AUXMR, C_ICR | 8); /* 8 MHz clock */
|
||||
DELAY(1000);
|
||||
upd7210_wr(u, ADR, 0x60); /* ADR0: disable listener and talker 0 */
|
||||
upd7210_wr(u, ADR, 0xe0); /* ADR1: disable listener and talker 1 */
|
||||
upd7210_wr(u, ADMR, 0x70); /* listen-only (lon) */
|
||||
upd7210_wr(u, AUXMR, AUXMR_PON); /* immediate execute power-on (pon) */
|
||||
if (u->use_fifo) {
|
||||
/* TNT5004 or TNT4882 in FIFO mode */
|
||||
bus_write_1(u->reg_res[0], cmdr, 0x10); /* reset FIFO */
|
||||
bus_write_1(u->reg_res[0], cfg, 0x20); /* xfer IN, 8-bit FIFO */
|
||||
bus_write_1(u->reg_res[0], cnt0, -1);
|
||||
bus_write_1(u->reg_res[0], cnt1, (-1) >> 8);
|
||||
bus_write_1(u->reg_res[0], cnt2, (-1) >> 16);
|
||||
bus_write_1(u->reg_res[0], cnt3, (-1) >> 24);
|
||||
bus_write_1(u->reg_res[0], cmdr, 0x04); /* GO */
|
||||
bus_write_1(u->reg_res[0], imr3, 0x04); /* NEF IE */
|
||||
} else {
|
||||
/* µPD7210/NAT7210, or TNT4882 in non-FIFO mode */
|
||||
upd7210_wr(u, IMR1, 0x01); /* data in interrupt enable */
|
||||
}
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
gpib_l_close(struct cdev *dev, int oflags, int devtype, struct thread *td)
|
||||
{
|
||||
struct upd7210 *u;
|
||||
|
||||
u = dev->si_drv1;
|
||||
|
||||
mtx_lock(&u->mutex);
|
||||
u->busy = 0;
|
||||
if (u->use_fifo) {
|
||||
/* TNT5004 or TNT4882 in FIFO mode */
|
||||
bus_write_1(u->reg_res[0], cmdr, 0x22); /* soft RESET */
|
||||
bus_write_1(u->reg_res[0], imr3, 0x00);
|
||||
}
|
||||
upd7210_wr(u, AUXMR, AUXMR_CRST);
|
||||
DELAY(10000);
|
||||
upd7210_wr(u, IMR1, 0x00);
|
||||
upd7210_wr(u, IMR2, 0x00);
|
||||
free(u->buf, M_GPIB);
|
||||
u->buf = NULL;
|
||||
mtx_unlock(&u->mutex);
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
gpib_l_read(struct cdev *dev, struct uio *uio, int ioflag)
|
||||
{
|
||||
struct upd7210 *u;
|
||||
int error;
|
||||
size_t z;
|
||||
|
||||
u = dev->si_drv1;
|
||||
error = 0;
|
||||
|
||||
mtx_lock(&u->mutex);
|
||||
while (u->buf_wp == u->buf_rp) {
|
||||
error = msleep(u->buf, &u->mutex, PZERO | PCATCH,
|
||||
"gpibrd", hz);
|
||||
if (error && error != EWOULDBLOCK) {
|
||||
mtx_unlock(&u->mutex);
|
||||
return (error);
|
||||
}
|
||||
}
|
||||
while (uio->uio_resid > 0 && u->buf_wp != u->buf_rp) {
|
||||
if (u->buf_wp < u->buf_rp)
|
||||
z = u->bufsize - u->buf_rp;
|
||||
else
|
||||
z = u->buf_wp - u->buf_rp;
|
||||
if (z > uio->uio_resid)
|
||||
z = uio->uio_resid;
|
||||
mtx_unlock(&u->mutex);
|
||||
error = uiomove(u->buf + u->buf_rp, z, uio);
|
||||
mtx_lock(&u->mutex);
|
||||
if (error)
|
||||
break;
|
||||
u->buf_rp += z;
|
||||
u->buf_rp &= (u->bufsize - 1);
|
||||
}
|
||||
if (u->use_fifo) {
|
||||
bus_write_1(u->reg_res[0], imr3, 0x04); /* NFF IE */
|
||||
} else {
|
||||
if (u->wreg[IMR1] == 0)
|
||||
upd7210_wr(u, IMR1, 0x01);
|
||||
}
|
||||
mtx_unlock(&u->mutex);
|
||||
return (error);
|
||||
}
|
||||
|
||||
static struct cdevsw gpib_l_cdevsw = {
|
||||
.d_version = D_VERSION,
|
||||
.d_name = "gpib_l",
|
||||
.d_open = gpib_l_open,
|
||||
.d_close = gpib_l_close,
|
||||
.d_read = gpib_l_read,
|
||||
};
|
||||
|
||||
/* Housekeeping */
|
||||
|
||||
static struct unrhdr *units;
|
||||
|
||||
void
|
||||
upd7210attach(struct upd7210 *u)
|
||||
{
|
||||
struct cdev *dev;
|
||||
|
||||
if (units == NULL)
|
||||
units = new_unrhdr(0, INT_MAX, NULL);
|
||||
u->unit = alloc_unr(units);
|
||||
mtx_init(&u->mutex, "gpib", NULL, MTX_DEF);
|
||||
u->cdev = make_dev(&gpib_l_cdevsw, u->unit,
|
||||
UID_ROOT, GID_WHEEL, 0444,
|
||||
"gpib%ul", u->unit);
|
||||
u->cdev->si_drv1 = u;
|
||||
|
||||
dev = make_dev(&gpib_ib_cdevsw, u->unit,
|
||||
UID_ROOT, GID_WHEEL, 0444,
|
||||
"gpib%uib", u->unit);
|
||||
dev->si_drv1 = u;
|
||||
dev_depends(u->cdev, dev);
|
||||
}
|
||||
|
||||
void
|
||||
upd7210detach(struct upd7210 *u)
|
||||
{
|
||||
|
||||
destroy_dev(u->cdev);
|
||||
mtx_destroy(&u->mutex);
|
||||
free_unr(units, u->unit);
|
||||
}
|
||||
@ -1,237 +0,0 @@
|
||||
/*-
|
||||
* Copyright (c) 2005 Poul-Henning Kamp <phk@FreeBSD.org>
|
||||
* Copyright (c) 2010 Joerg Wunsch <joerg@FreeBSD.org>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*
|
||||
* Locating an actual µPD7210 data book has proven quite impossible for me.
|
||||
* There are a fair number of newer chips which are supersets of the µPD7210
|
||||
* but they are particular eager to comprehensively mark what the extensions
|
||||
* are and what is in the base set. Some even give the registers and their
|
||||
* bits new names.
|
||||
*
|
||||
* The following information is based on a description of the µPD7210 found
|
||||
* in an old manual for a VME board which used the chip.
|
||||
*/
|
||||
|
||||
#ifndef _DEV_IEEE488_UPD7210_H_
|
||||
#define _DEV_IEEE488_UPD7210_H_
|
||||
#ifdef _KERNEL
|
||||
|
||||
struct upd7210;
|
||||
struct ibfoo;
|
||||
|
||||
/* upd7210 interface definitions for HW drivers */
|
||||
|
||||
typedef int upd7210_irq_t(struct upd7210 *, int);
|
||||
|
||||
struct upd7210 {
|
||||
struct resource *reg_res[8];
|
||||
struct resource *irq_clear_res;
|
||||
u_int reg_offset[8];
|
||||
int dmachan;
|
||||
int unit;
|
||||
int use_fifo;
|
||||
|
||||
/* private stuff */
|
||||
struct mtx mutex;
|
||||
uint8_t rreg[8];
|
||||
uint8_t wreg[8 + 8];
|
||||
|
||||
upd7210_irq_t *irq;
|
||||
|
||||
int busy;
|
||||
u_char *buf;
|
||||
size_t bufsize;
|
||||
u_int buf_wp;
|
||||
u_int buf_rp;
|
||||
struct cdev *cdev;
|
||||
|
||||
struct ibfoo *ibfoo;
|
||||
};
|
||||
|
||||
#ifdef UPD7210_HW_DRIVER
|
||||
void upd7210intr(void *);
|
||||
void upd7210attach(struct upd7210 *);
|
||||
void upd7210detach(struct upd7210 *);
|
||||
#endif
|
||||
|
||||
#ifdef UPD7210_SW_DRIVER
|
||||
|
||||
/* upd7210 hardware definitions. */
|
||||
|
||||
/* Write registers */
|
||||
enum upd7210_wreg {
|
||||
CDOR = 0, /* Command/Data Out Register */
|
||||
IMR1 = 1, /* Interrupt Mask Register 1 */
|
||||
IMR2 = 2, /* Interrupt Mask Register 2 */
|
||||
SPMR = 3, /* Serial Poll Mode Register */
|
||||
ADMR = 4, /* ADdress Mode Register */
|
||||
AUXMR = 5, /* AUXilliary Mode Register */
|
||||
ICR = 5, /* Internal Counter Register */
|
||||
PPR = 5, /* Parallel Poll Register */
|
||||
AUXRA = 5, /* AUXilliary Register A */
|
||||
AUXRB = 5, /* AUXilliary Register B */
|
||||
AUXRE = 5, /* AUXilliary Register E */
|
||||
ADR = 6, /* ADdress Register */
|
||||
EOSR = 7, /* End-Of-String Register */
|
||||
};
|
||||
|
||||
/* Read registers */
|
||||
enum upd7210_rreg {
|
||||
DIR = 0, /* Data In Register */
|
||||
ISR1 = 1, /* Interrupt Status Register 1 */
|
||||
ISR2 = 2, /* Interrupt Status Register 2 */
|
||||
SPSR = 3, /* Serial Poll Status Register */
|
||||
ADSR = 4, /* ADdress Status Register */
|
||||
CPTR = 5, /* Command Pass Though Register */
|
||||
ADR0 = 6, /* ADdress Register 0 */
|
||||
ADR1 = 7, /* ADdress Register 1 */
|
||||
};
|
||||
|
||||
/* Bits for ISR1 and IMR1 */
|
||||
#define IXR1_DI (1 << 0) /* Data In */
|
||||
#define IXR1_DO (1 << 1) /* Data Out */
|
||||
#define IXR1_ERR (1 << 2) /* Error */
|
||||
#define IXR1_DEC (1 << 3) /* Device Clear */
|
||||
#define IXR1_ENDRX (1 << 4) /* End Received */
|
||||
#define IXR1_DET (1 << 5) /* Device Execute Trigger */
|
||||
#define IXR1_APT (1 << 6) /* Address Pass-Through */
|
||||
#define IXR1_CPT (1 << 7) /* Command Pass-Through */
|
||||
|
||||
/* Bits for ISR2 and IMR2 */
|
||||
#define IXR2_ADSC (1 << 0) /* Addressed Status Change */
|
||||
#define IXR2_REMC (1 << 1) /* Remote Change */
|
||||
#define IXR2_LOKC (1 << 2) /* Lockout Change */
|
||||
#define IXR2_CO (1 << 3) /* Command Out */
|
||||
#define ISR2_REM (1 << 4) /* Remove */
|
||||
#define IMR2_DMAI (1 << 4) /* DMA In Enable */
|
||||
#define ISR2_LOK (1 << 5) /* Lockout */
|
||||
#define IMR2_DMAO (1 << 5) /* DMA Out Enable */
|
||||
#define IXR2_SRQI (1 << 6) /* Service Request Input */
|
||||
#define ISR2_INT (1 << 7) /* Interrupt */
|
||||
|
||||
#define SPSR_PEND (1 << 6) /* Pending */
|
||||
#define SPMR_RSV (1 << 6) /* Request SerVice */
|
||||
|
||||
#define ADSR_MJMN (1 << 0) /* MaJor MiNor */
|
||||
#define ADSR_TA (1 << 1) /* Talker Active */
|
||||
#define ADSR_LA (1 << 2) /* Listener Active */
|
||||
#define ADSR_TPAS (1 << 3) /* Talker Primary Addr. State */
|
||||
#define ADSR_LPAS (1 << 4) /* Listener Primary Addr. State */
|
||||
#define ADSR_SPMS (1 << 5) /* Serial Poll Mode State */
|
||||
#define ADSR_ATN (1 << 6) /* Attention */
|
||||
#define ADSR_CIC (1 << 7) /* Controller In Charge */
|
||||
|
||||
#define ADMR_ADM0 (1 << 0) /* Address Mode 0 */
|
||||
#define ADMR_ADM1 (1 << 1) /* Address Mode 1 */
|
||||
#define ADMR_TRM0 (1 << 4) /* Transmit/Receive Mode 0 */
|
||||
#define ADMR_TRM1 (1 << 5) /* Transmit/Receive Mode 1 */
|
||||
#define ADMR_LON (1 << 6) /* Listen Only */
|
||||
#define ADMR_TON (1 << 7) /* Talk Only */
|
||||
|
||||
/* Constant part of overloaded write registers */
|
||||
#define C_ICR 0x20
|
||||
#define C_PPR 0x60
|
||||
#define C_AUXA 0x80
|
||||
#define C_AUXB 0xa0
|
||||
#define C_AUXE 0xc0
|
||||
|
||||
#define AUXMR_PON 0x00 /* Immediate Execute pon */
|
||||
#define AUXMR_CPP 0x01 /* Clear Parallel Poll */
|
||||
#define AUXMR_CRST 0x02 /* Chip Reset */
|
||||
#define AUXMR_RFD 0x03 /* Finish Handshake */
|
||||
#define AUXMR_TRIG 0x04 /* Trigger */
|
||||
#define AUXMR_RTL 0x05 /* Return to local */
|
||||
#define AUXMR_SEOI 0x06 /* Send EOI */
|
||||
#define AUXMR_NVSA 0x07 /* Non-Valid Secondary cmd/addr */
|
||||
/* 0x08 undefined/unknown */
|
||||
#define AUXMR_SPP 0x09 /* Set Parallel Poll */
|
||||
/* 0x0a undefined/unknown */
|
||||
/* 0x0b undefined/unknown */
|
||||
/* 0x0c undefined/unknown */
|
||||
/* 0x0d undefined/unknown */
|
||||
/* 0x0e undefined/unknown */
|
||||
#define AUXMR_VSA 0x0f /* Valid Secondary cmd/addr */
|
||||
#define AUXMR_GTS 0x10 /* Go to Standby */
|
||||
#define AUXMR_TCA 0x11 /* Take Control Async (pulsed) */
|
||||
#define AUXMR_TCS 0x12 /* Take Control Synchronously */
|
||||
#define AUXMR_LISTEN 0x13 /* Listen */
|
||||
#define AUXMR_DSC 0x14 /* Disable System Control */
|
||||
/* 0x15 undefined/unknown */
|
||||
#define AUXMR_SIFC 0x16 /* Set IFC */
|
||||
#define AUXMR_CREN 0x17 /* Clear REN */
|
||||
/* 0x18 undefined/unknown */
|
||||
/* 0x19 undefined/unknown */
|
||||
#define AUXMR_TCSE 0x1a /* Take Control Sync on End */
|
||||
#define AUXMR_LCM 0x1b /* Listen Continuously Mode */
|
||||
#define AUXMR_LUNL 0x1c /* Local Unlisten */
|
||||
#define AUXMR_EPP 0x1d /* Execute Parallel Poll */
|
||||
#define AUXMR_CIFC 0x1e /* Clear IFC */
|
||||
#define AUXMR_SREN 0x1f /* Set REN */
|
||||
|
||||
#define PPR_U (1 << 4) /* Unconfigure */
|
||||
#define PPR_S (1 << 3) /* Status Polarity */
|
||||
|
||||
#define AUXA_HLDA (1 << 0) /* Holdoff on All */
|
||||
#define AUXA_HLDE (1 << 1) /* Holdoff on END */
|
||||
#define AUXA_REOS (1 << 2) /* End on EOS received */
|
||||
#define AUXA_XEOS (1 << 3) /* Transmit END with EOS */
|
||||
#define AUXA_BIN (1 << 4) /* Binary */
|
||||
|
||||
#define AUXB_CPTE (1 << 0) /* Cmd Pass Through Enable */
|
||||
#define AUXB_SPEOI (1 << 1) /* Send Serial Poll EOI */
|
||||
#define AUXB_TRI (1 << 2) /* Three-State Timing */
|
||||
#define AUXB_INV (1 << 3) /* Invert */
|
||||
#define AUXB_ISS (1 << 4) /* Individual Status Select */
|
||||
|
||||
#define AUXE_DHDT (1 << 0) /* DAC Holdoff on DTAS */
|
||||
#define AUXE_DHDC (1 << 1) /* DAC Holdoff on DCAS */
|
||||
|
||||
#define ADR0_DL0 (1 << 5) /* Disable Listener 0 */
|
||||
#define ADR0_DT0 (1 << 6) /* Disable Talker 0 */
|
||||
|
||||
#define ADR_DL (1 << 5) /* Disable Listener */
|
||||
#define ADR_DT (1 << 6) /* Disable Talker */
|
||||
#define ADR_ARS (1 << 7) /* Address Register Select */
|
||||
|
||||
#define ADR1_DL1 (1 << 5) /* Disable Listener 1 */
|
||||
#define ADR1_DT1 (1 << 6) /* Disable Talker 1 */
|
||||
#define ADR1_EOI (1 << 7) /* End or Identify */
|
||||
|
||||
/* Stuff from software drivers */
|
||||
extern struct cdevsw gpib_ib_cdevsw;
|
||||
|
||||
/* Stuff from upd7210.c */
|
||||
void upd7210_print_isr(u_int isr1, u_int isr2);
|
||||
u_int upd7210_rd(struct upd7210 *u, enum upd7210_rreg reg);
|
||||
void upd7210_wr(struct upd7210 *u, enum upd7210_wreg reg, u_int val);
|
||||
int upd7210_take_ctrl_async(struct upd7210 *u);
|
||||
int upd7210_goto_standby(struct upd7210 *u);
|
||||
|
||||
#endif /* UPD7210_SW_DRIVER */
|
||||
|
||||
#endif /* _KERNEL */
|
||||
#endif /* _DEV_IEEE488_UPD7210_H_ */
|
||||
@ -1331,26 +1331,6 @@ OLD_FILES+=usr/share/man/man1/gdbserver.1.gz
|
||||
OLD_FILES+=usr/share/man/man1/kgdb.1.gz
|
||||
.endif
|
||||
|
||||
.if ${MK_GPIB} == no
|
||||
OLD_FILES+=usr/include/dev/ieee488/ibfoo_int.h
|
||||
OLD_FILES+=usr/include/dev/ieee488/tnt4882.h
|
||||
OLD_FILES+=usr/include/dev/ieee488/ugpib.h
|
||||
OLD_FILES+=usr/include/dev/ieee488/upd7210.h
|
||||
OLD_DIRS+=usr/include/dev/ieee488
|
||||
OLD_FILES+=usr/include/gpib/gpib.h
|
||||
OLD_DIRS+=usr/include/gpib
|
||||
OLD_FILES+=usr/lib/libgpib.a
|
||||
OLD_FILES+=usr/lib/libgpib.so
|
||||
OLD_LIBS+=usr/lib/libgpib.so.3
|
||||
OLD_FILES+=usr/lib/libgpib_p.a
|
||||
.if ${TARGET_ARCH} == "amd64" || ${TARGET_ARCH} == "powerpc64"
|
||||
OLD_FILES+=usr/lib32/libgpib.a
|
||||
OLD_FILES+=usr/lib32/libgpib.so
|
||||
OLD_LIBS+=usr/lib32/libgpib.so.3
|
||||
OLD_FILES+=usr/lib32/libgpib_p.a
|
||||
.endif
|
||||
.endif
|
||||
|
||||
.if ${MK_GPIO} == no
|
||||
OLD_FILES+=usr/sbin/gpioctl
|
||||
OLD_FILES+=usr/share/man/man8/gpioctl.8.gz
|
||||
@ -3703,7 +3683,6 @@ OLD_FILES+=usr/lib/libformw_p.a
|
||||
OLD_FILES+=usr/lib/libgcc_p.a
|
||||
OLD_FILES+=usr/lib/libgeom_p.a
|
||||
OLD_FILES+=usr/lib/libgnuregex_p.a
|
||||
OLD_FILES+=usr/lib/libgpib_p.a
|
||||
OLD_FILES+=usr/lib/libgssapi_krb5_p.a
|
||||
OLD_FILES+=usr/lib/libgssapi_p.a
|
||||
OLD_FILES+=usr/lib/libhdb_p.a
|
||||
|
||||
@ -1,2 +0,0 @@
|
||||
.\" $FreeBSD$
|
||||
Set to not build GPIB bus support.
|
||||
Loading…
Reference in New Issue
Block a user