d/freebsd-dev
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

usb/dwc3: Only force USB2 based on the PHY register and IP version

Browse Source 
We shouldn't force USB2 only based on if we have an external PHY.
The internal PHY register tell us what link speed we can acheive
and we need to force USB2 only if it cannot do USB3.
This is only available after revision 0x290A of the dwc3 IP.

Reviewed by:	andrew
Differential Revision:	https://reviews.freebsd.org/D37394
Fixed:	1331c0f44b ("Add support for RockChip RK356X to DWC3 driver.")
Sponsored by:	Beckhoff Automation GmbH & Co. KG
This commit is contained in:
Emmanuel Vadot 2022-11-15 13:54:49 +01:00
parent 0e87f58bd7
commit d47f5f2886
2 changed files with 18 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
sys/dev/usb/controller/dwc3.c
View File

@ -458,12 +458,19 @@ snps_dwc3_common_attach(device_t dev, bool is_fdt)
error = phy_get_by_ofw_name(dev, node, "usb3-phy", &usb3_phy);
if (error == 0 && usb3_phy != NULL)
phy_enable(usb3_phy);
else {
reg = DWC3_READ(sc, DWC3_GUCTL1);
if (bootverbose)
device_printf(dev, "Forcing USB2 clock only\n");
reg |= DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK;
DWC3_WRITE(sc, DWC3_GUCTL1, reg);
if (sc->snpsversion == DWC3_IP_ID) {
if (sc->snpsrevision >= 0x290A) {
uint32_t hwparams3;
hwparams3 = DWC3_READ(sc, DWC3_GHWPARAMS3);
if (DWC3_HWPARAMS3_SSPHY(hwparams3) == DWC3_HWPARAMS3_SSPHY_DISABLE) {
reg = DWC3_READ(sc, DWC3_GUCTL1);
if (bootverbose)
device_printf(dev, "Forcing USB2 clock only\n");
reg |= DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK;
DWC3_WRITE(sc, DWC3_GUCTL1, reg);
}
}
}
snps_dwc3_configure_phy(sc, node);
skip_phys:

5
sys/dev/usb/controller/dwc3.h
View File

@ -110,6 +110,11 @@
#define DWC3_GUSB3PIPECTL0_DELAYP1TRANS (1 << 18)
#define DWC3_GUSB3PIPECTL0_SUSPENDUSB3 (1 << 17)
#define DWC3_HWPARAMS3_SSPHY(x) (x & 0x3)
#define DWC3_HWPARAMS3_SSPHY_DISABLE 0
#define DWC3_HWPARAMS3_SSPHY_GEN1 1
#define DWC3_HWPARAMS3_SSPHY_GEN2 2
#define DWC3_GTXFIFOSIZ(x) (0xc300 + 0x4 * (x))
#define DWC3_GRXFIFOSIZ(x) (0xc380 + 0x4 * (x))
#define DWC3_GEVNTADRLO0 0xc400