arm64: Add constants for decoding ISS fields for WF* exceptions
WFI and WFIT trap to EL2 when executed in a vmm guest. (Currently WFE/WFET are not configured to trap.) We only handle WFI at the moment, so these constants are useful when handling the exception. Reviewed by: andrew MFC after: 1 week Sponsored by: Innovate UK Differential Revision: https://reviews.freebsd.org/D41199
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@ -316,6 +316,26 @@
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#define ISS_INSN_S1PTW (0x01 << 7)
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#define ISS_INSN_IFSC_MASK (0x1f << 0)
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#define ISS_WFx_TI_SHIFT 0
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#define ISS_WFx_TI_MASK (0x03 << ISS_WFx_TI_SHIFT)
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#define ISS_WFx_TI_WFI (0x00 << ISS_WFx_TI_SHIFT)
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#define ISS_WFx_TI_WFE (0x01 << ISS_WFx_TI_SHIFT)
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#define ISS_WFx_TI_WFIT (0x02 << ISS_WFx_TI_SHIFT)
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#define ISS_WFx_TI_WFET (0x03 << ISS_WFx_TI_SHIFT)
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#define ISS_WFx_RV_SHIFT 2
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#define ISS_WFx_RV_MASK (0x01 << ISS_WFx_RV_SHIFT)
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#define ISS_WFx_RV_INVALID (0x00 << ISS_WFx_RV_SHIFT)
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#define ISS_WFx_RV_VALID (0x01 << ISS_WFx_RV_SHIFT)
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#define ISS_WFx_RN_SHIFT 5
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#define ISS_WFx_RN_MASK (0x1f << ISS_WFx_RN_SHIFT)
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#define ISS_WFx_RN(x) (((x) & ISS_WFx_RN_MASK) >> ISS_WFx_RN_SHIFT)
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#define ISS_WFx_COND_SHIFT 20
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#define ISS_WFx_COND_MASK (0x0f << ISS_WFx_COND_SHIFT)
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#define ISS_WFx_CV_SHIFT 24
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#define ISS_WFx_CV_MASK (0x01 << ISS_WFx_CV_SHIFT)
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#define ISS_WFx_CV_INVALID (0x00 << ISS_WFx_CV_SHIFT)
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#define ISS_WFx_CV_VALID (0x01 << ISS_WFx_CV_SHIFT)
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#define ISS_MSR_DIR_SHIFT 0
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#define ISS_MSR_DIR (0x01 << ISS_MSR_DIR_SHIFT)
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#define ISS_MSR_Rt_SHIFT 5
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