Commit Graph

177 Commits

Author SHA1 Message Date
Alan Cox
e3ef0d2fcf Push down the acquisition of the page queues lock into vm_page_unwire().
Update the comment describing which lock should be held on entry to
vm_page_wire().

Reviewed by:	kib
2010-05-05 03:45:46 +00:00
Alan Cox
5fdd0a335f Acquire the page lock around vm_page_unwire(). For consistency, extend the
scope of the object lock in agp_i810.c.  (In this specific case, the scope
of the object lock shouldn't matter, but I don't want to create a bad
example that might be copied to a case where it did matter.)

Reviewed by:	kib
2010-05-03 16:55:50 +00:00
Robert Noland
c7bbe8bdaf Add support of Intel Pineview chips, aka IGD.
MFC after:	3 days
2010-03-12 21:34:23 +00:00
Robert Noland
9ccf1d6a0b Add pci ids for Intel Ironlake chipsets.
These behave just like g45 for agp.

Tested by:	Torfinn Ingolfsen

MFC after:	3 days
2010-03-12 19:43:39 +00:00
Martin Blapp
c2ede4b379 Remove extraneous semicolons, no functional changes.
Submitted by:	Marc Balmer <marc@msys.ch>
MFC after:	1 week
2010-01-07 21:01:37 +00:00
Robert Noland
cfd7bacef2 Update d_mmap() to accept vm_ooffset_t and vm_memattr_t.
This replaces d_mmap() with the d_mmap2() implementation and also
changes the type of offset to vm_ooffset_t.

Purge d_mmap2().

All driver modules will need to be rebuilt since D_VERSION is also
bumped.

Reviewed by:	jhb@
MFC after:	Not in this lifetime...
2009-12-29 21:51:28 +00:00
Robert Noland
66ab1230f1 Fix a handful of issues with via agp support.
* Read the pci capability register to identify AGP 3 support
  * Add missing smaller aperture sizes for AGP3 chips.
  * Fix the aperture size calculation on AGP2 chips.
    All sizes between 32M and 256M reported as 256M.
  * Add \n to error string.

This all seems to get the CLE266 EPIA-M board agp working properly, now
back to work on drm.

MFC after:	2 weeks
2009-12-21 03:28:05 +00:00
Robert Noland
2d52bcc46b Add pci id's for Intel G41 chipset
Submitted by:	Artyom Mirgorodsky <man@email.com.ua>
MFC after:	3 days
2009-10-11 01:51:35 +00:00
Nick Hibma
c1a293abfc John Baldwin suggested that 'stolen memory' only happens in the case of
i810 and therefore is useful info there. Aperture size and stolen memory
are now printed on one line.

Submitted by:	jhb
2009-09-14 13:16:16 +00:00
Nick Hibma
3e3a2c6062 Move the printing of aperture size and stolen memory behind bootverbose.
None of the other AGP drivers actually displays this information at all,

MFC after:	1 week
2009-09-10 19:24:46 +00:00
Andriy Gapon
446188d1e6 strict kobj signatures: fixes in agp driver
offset parameter has vm_offset_t type in calling code and in kobj method

Reviewed by:	imp, rnoland, lulf, current@
Approved by:	jhb (mentor)
2009-06-11 17:06:07 +00:00
Ed Schouten
b7d9e67c45 Use si_drv1 instead of dev2unit() inside agp(4).
Reviewed by:	rnoland
2009-04-14 13:11:34 +00:00
Robert Noland
45d0290a5d vm_offset_t is unsigned and therefore can not be negative.
Avoid unnessecary compares.

Found with:	Coverity Prevent(tm)
CID:		2362,4215,4214,4209,4208,2363,4211,4210,4213,4212

MFC after:	3 days
2009-03-20 18:30:20 +00:00
Warner Losh
cd6d5177a7 Fix prototypes to be consistent. 2009-03-09 13:27:33 +00:00
Wojciech A. Koszek
c353491ad3 Fix AGP debugging code:
- correct format strings
- fill opt_agp.h if AGP_DEBUG is defined
- bring AGP_DEBUG to LINT by mentioning it in NOTES

This should hopefully fix a warning that was...

Found by:	Coverity Prevent(tm)
CID:		3676
Tested on:	amd64, i386
2009-02-06 20:57:10 +00:00
Jung-uk Kim
129dec4245 - Add few VIA bridges to agp_via.c and connect it to amd64 build
as they support Intel Core/Core 2 and VIA Nano processors.
- Align "optional agp" in conf/files.* for consistency while I am here.
2009-01-23 17:48:18 +00:00
Jung-uk Kim
7dcbc463ef Add support for AMD64 Family 10h processors.
PR:		kern/128331
MFC after:	3 days
2009-01-12 16:07:03 +00:00
Robert Noland
fc25498ad9 Fix up handling of Intel G4X chips some more.
Note that you need at least xf86-video-intel 2.4.3 for this to work.
The G4X doesn't put the GATT into the same area of stolen memory
as all the other chips and older versions of the driver didn't
handle that properly.

Tested by:	ganbold
Approved by:	kib
MFC after:	2 weeks
2008-12-23 16:16:30 +00:00
Konstantin Belousov
fc72031c5d Clear busy state on the pages which are after the one that failed the bind
attempt.

Reported and tested by:	ganbold
Reviewed by:	rnoland
MFC after:	2 weeks
2008-12-23 16:04:33 +00:00
Robert Noland
213ab42e6b Deal with 0 length args...
Approved by:	kib
2008-12-21 22:30:37 +00:00
Robert Noland
b02ae948bb Fix AGP_DEBUG macro to use c99 __VA_ARGS__ and build if enabled.
Approved by:	kib
2008-12-21 22:00:39 +00:00
Robert Noland
06aaad6aaa Correctly handle Intel g33 chips and add support for g45 chips
g33 based chips use a different method of identifying the gtt size.
g45 based chips gtt is located in a different area of stolen memory.

Approved by:	jhb (mentor)
MFC after:	2 weeks
2008-10-02 20:29:45 +00:00
Ed Schouten
6bfa9a2d66 Replace all calls to minor() with dev2unit().
After I removed all the unit2minor()/minor2unit() calls from the kernel
yesterday, I realised calling minor() everywhere is quite confusing.
Character devices now only have the ability to store a unit number, not
a minor number. Remove the confusion by using dev2unit() everywhere.

This commit could also be considered as a bug fix. A lot of drivers call
minor(), while they should actually be calling dev2unit(). In -CURRENT
this isn't a problem, but it turns out we never had any problem reports
related to that issue in the past. I suspect not many people connect
more than 256 pieces of the same hardware.

Reviewed by:	kib
2008-09-27 08:51:18 +00:00
Warner Losh
d444cd5f28 When device_get_children returns an error, ignore that bus' children. 2008-08-23 15:57:43 +00:00
John Baldwin
7b030859af Enable the support for G33/Q35/Q33 now that both the G33 and Q35 have been
tested:

PR:		amd64/126090
MFC after:	1 week
2008-08-01 13:11:23 +00:00
Oleksandr Tymoshenko
d614e99f2e Fix PCI id for 945GME Express Integrated Graphics Controller:
set to 8086:27AE

PR:     kern/124782
Event:  Bugathon#5
2008-06-20 22:23:41 +00:00
Remko Lodder
4ee0aeea8a Add resume support to the agp_i810 family.
Submitted by:	"Robert Noland" <rnoland at 2hip dot net>
Reviewed by:	anholt
Approved by:	anholt, imp (mentor)
MFC after:	1 week
2008-03-12 18:23:39 +00:00
John Baldwin
ce6d690203 Calculate the number of pages the GATT spans when reading from each page
to flush the TLB instead of hardcoding a size of 33 pages.  Apertures of
32MB and 64MB only use a 16 page GATT and an aperture of 128MB only uses
a 32 page GATT, so without this the code could walk off the end of the
pointer and cause a page fault if the next page was unmapped.  Also, for
aperture sizes > 128MB, not all of the pages would be read.  The Linux
driver has the same bug.

MFC after:	1 week
Tested by:	Frédéric PRACA  frederic.praca of freebsd-fr.org
2008-03-07 13:36:38 +00:00
Remko Lodder
64d0afa7f8 Add the 845M GMCH controller.
PR:		114802
Approved by:	imp (mentor), anholt (private mail)
Submitted by:	Alex Goncharov <algo1 at comcast dot net>
MFC After:	3 days
2007-11-26 18:17:07 +00:00
John Baldwin
dbac8ff400 Move the agp(4) driver from sys/pci to sys/dev/agp. __FreeBSD_version was
bumped to 800004 to note the change though userland apps should not be
affected since they use <sys/agpio.h> rather than the headers in
sys/dev/agp.

Discussed with:	anholt
Repocopy by:	simon
2007-11-12 21:51:38 +00:00
John Baldwin
f82a1d4987 Split agp_generic_detach() up into two routines: agp_free_cdev() destroys
/dev/agpgart and agp_free_res() frees resources like the BAR for the
aperture.  Splitting this up lets chipset-specific detach routines
manipulate the aperture during their detach routines without panicing.

MFC after:	1 week
Reviewed by:	anholt
2007-10-30 22:09:16 +00:00
Kevin Lo
d332abbac7 - Add the device ID for the VIA VT3324 (CX700) chipset.
- Set and Get aperture size correctly for VIA's AGP3 chipsets.

Approved by: re (kensmith)
2007-09-21 02:10:13 +00:00
Alan Cox
96e2b33657 Add the PCI id for the Intel 7221's integrated graphics controller. It is
similar to a 915G.

Approved by: re (kensmith)
Reviewed by: anholt
MFC after: 3 weeks
2007-09-15 18:16:35 +00:00
Eric Anholt
d450e052dc Add support for G965/Q965/GM965/GME965/GME945 AGP.
This adds a function to agp.c to set the aperture resource ID if it's
not the usual AGP_APBASE.  Previously, agp.c had been assuming
AGP_APBASE, which resulted in incorrect agp_info, and contortions by
agp_i810.c to work around it.

This also adds functions to agp.c for default AGP_GET_APERTURE() and
AGP_SET_APERTURE(), which return the aperture resource size and disallow
aperture size changes.  Moving to these for our AGP drivers will likely
result in stability improvements.  This should fix 855-class aperture
size detection.

Additionally, refuse to attach agp_i810 when some RAM is above 4GB and
the GART can't reference memory that high.  This should be very rare.
The correct solution would be bus_dma conversion for agp, which is
beyond the scope of this change.  Other AGP drivers could likely use
this change as well.

G33/Q35/Q33 AGP support is also included, but disconnected by default
due to lack of testing.

PR:             kern/109724 (855 aperture issue)
Submitted by:   FUJIMOTO Kou<fujimoto@j.dendai.ac.jp>
Approved by:	re (hrs)
2007-07-13 16:28:12 +00:00
Takanori Watanabe
230a9294b5 Restore agp aperture size after resume, in case it is modified after boot. 2007-01-06 08:31:31 +00:00
Jung-uk Kim
afadbf66cb - Clean up Aperture Access Global Enable (APEN) bit access.
- Rename confusing AGP_INTEL_I845_MCHCFG to AGP_INTEL_I845_AGPM.
- Move E7205 and E7505 from i8x5 to i8x0 family.  It probably worked
because the actual offset is the same.

In fact, all three families have the bit at the exact same place.  Only
differences are name and width of the registers, i.e., NBXCFG (0x50, dword),
RDCR (0x51, byte), AGPM (0x51, byte), MCHCFG (0x50, word) depending on
the family of the chipsets.
2007-01-05 22:55:19 +00:00
Jung-uk Kim
ea9b97d2bd Fix style(9). 2007-01-05 20:06:40 +00:00
Takanori Watanabe
9043d2778b Make agp_intel capable to work after resume from S3 state. 2007-01-05 14:46:18 +00:00
Alan Cox
2a53696fb8 The page queues lock is no longer required by vm_page_busy() or
vm_page_wakeup().  Reduce or eliminate its use accordingly.
2006-10-22 21:18:48 +00:00
Seigo Tanimura
7370bc7770 Fix the wraparound of memsize >=2GB. 2006-10-15 05:04:06 +00:00
Jung-uk Kim
2a9dc1317c Fix style(9) nits. 2006-10-09 20:26:32 +00:00
Jung-uk Kim
b5d9e49dcc Fix 32-bit PTE in the GART table.
Noticed by:	jmg
2006-10-09 20:24:49 +00:00
Eric Anholt
30e14d656c Add support for 945G/GM AGP chipsets.
The key problem was that the aperture size detection using the MSAC bit
doesn't work -- the bit appears to be set even when it shouldn't be.  Linux
takes a different approach, testing for a bit of the GMADR (PCIR_BAR(2)) being
set.  However, as I don't think that's a safe way to test aperture size, we
just allocate the resource and check its size.  This also pointed out that
agp_generic_attach hadn't been allocating our aperture resource, which may
have caused problems in some cases.

Also corrected is a minor copy-and-pasteo in an error case.

PR:		kern/103079
Submitted by:	mnag
Tested on:	i945GM, i915GM
MFC after:	2 weeks
2006-09-27 06:38:54 +00:00
Eric Anholt
c88bc907e7 Add support for another ATI IGP 340M (RS200M) AGP bridge.
PR:		kern/100958
Submitted by:	Kazuo Dohzono <dohzono@axion-software.com>
MFC after:	1 week
2006-09-01 02:22:17 +00:00
Jung-uk Kim
668e25a26c Use aperture base address from north bridge. Some BIOS does not encode
misc. control registers correctly and it is inconsistent with north bridge.
In fact, there are too many broken BIOS implementations out there and we
cannot fix every possible combination but at least it is consistent with
what we advertise with ioctl(2).
2006-08-21 19:10:58 +00:00
Jung-uk Kim
98935c581c Explicitly set v3 mode only when it is requested. Don't bother otherwise. 2006-08-11 19:16:50 +00:00
Eric Anholt
806baa6401 Fix breakage of CHIP_I855 in the last revision.
Submitted by:	Ted Faber <faber@ISI.EDU>
2006-06-27 14:05:11 +00:00
Eric Anholt
92d4d9230c Replace the three copies of the list of pci ids with a single centralized list.
Add the i945 PCI IDs commented out -- I think it should just work, but it hasn't
been tested yet.
2006-06-25 14:44:43 +00:00
Jung-uk Kim
08945e887f Move SiS 760 to where it belongs.
PR:		98094
Submitted by:	Mike M < mmcgus at yahoo dot com >
2006-05-30 18:41:26 +00:00
Eric Anholt
b78e627466 Add support for allocating one larger than page-sized contiguous block of memory
with a physical address.  This is used for hardware ARGB cursor support on newer
chipsets.
2006-05-16 16:19:48 +00:00